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authorAndrew Victor <linux@maxim.org.za>2009-02-11 21:39:05 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-02-14 16:03:36 +0000
commit2b768b6cdbcf7fa0761e6c35c6ea288297582c43 (patch)
treeceec6ba9cc96ce40cece468b614bd6cfe9902a85
parent2af29b78618ac8b3a8746337002f108f8fdf56ad (diff)
[ARM] 5391/1: AT91: Enable GPIO clocks earlier
Enable the GPIO clocks earlier in the initialization sequence. This allow the board-setup code to read and set GPIO pins. Signed-off-by: Marc Pignat <marc.pignat@hevs.ch> Signed-off-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/mach-at91/gpio.c15
1 files changed, 10 insertions, 5 deletions
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index 9b0447c3d59..2f7d4977dce 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -490,7 +490,8 @@ postcore_initcall(at91_gpio_debugfs_init);
/*--------------------------------------------------------------------------*/
-/* This lock class tells lockdep that GPIO irqs are in a different
+/*
+ * This lock class tells lockdep that GPIO irqs are in a different
* category than their parents, so it won't report false recursion.
*/
static struct lock_class_key gpio_lock_class;
@@ -509,9 +510,6 @@ void __init at91_gpio_irq_setup(void)
unsigned id = this->id;
unsigned i;
- /* enable PIO controller's clock */
- clk_enable(this->clock);
-
__raw_writel(~0, this->regbase + PIO_IDR);
for (i = 0, pin = this->chipbase; i < 32; i++, pin++) {
@@ -556,7 +554,14 @@ void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks)
data->chipbase = PIN_BASE + i * 32;
data->regbase = data->offset + (void __iomem *)AT91_VA_BASE_SYS;
- /* AT91SAM9263_ID_PIOCDE groups PIOC, PIOD, PIOE */
+ /* enable PIO controller's clock */
+ clk_enable(data->clock);
+
+ /*
+ * Some processors share peripheral ID between multiple GPIO banks.
+ * SAM9263 (PIOC, PIOD, PIOE)
+ * CAP9 (PIOA, PIOB, PIOC, PIOD)
+ */
if (last && last->id == data->id)
last->next = data;
}