diff options
| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-03-02 23:40:15 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-03-02 23:40:15 +0000 |
| commit | 882d01f96bc1909455696aae6eb7ce4df3e908c8 (patch) | |
| tree | 06e5789cb33d0547c2497fd4d0327dc9e8614d37 | |
| parent | 64ed28a87a0c075e91c1c5b0fe7d225a6cc6ae39 (diff) | |
| parent | d608c738bb8fb37e5fbfcdef9c566764f2fea086 (diff) | |
Merge branch 'for-rmk/samsung5' of git://git.fluff.org/bjdooks/linux into devel-stable
Conflicts:
arch/arm/Kconfig
arch/arm/Makefile
229 files changed, 7782 insertions, 1454 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ee74c3a0388..14b03684ba8 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -631,9 +631,24 @@ config ARCH_S3C2410 config ARCH_S3C64XX bool "Samsung S3C64XX" + select PLAT_SAMSUNG + select CPU_V6 select GENERIC_GPIO + select ARM_VIC select HAVE_CLK + select NO_IOPORT select ARCH_HAS_CPUFREQ + select ARCH_REQUIRE_GPIOLIB + select SAMSUNG_CLKSRC + select SAMSUNG_IRQ_VIC_TIMER + select SAMSUNG_IRQ_UART + select S3C_GPIO_TRACK + select S3C_GPIO_PULL_UPDOWN + select S3C_GPIO_CFG_S3C24XX + select S3C_GPIO_CFG_S3C64XX + select S3C_DEV_NAND + select USB_ARCH_HAS_OHCI + select SAMSUNG_GPIOLIB_4BIT help Samsung S3C64XX series based systems @@ -645,6 +660,14 @@ config ARCH_S5P6440 help Samsung S5P6440 CPU based systems +config ARCH_S5P6442 + bool "Samsung S5P6442" + select CPU_V6 + select GENERIC_GPIO + select HAVE_CLK + help + Samsung S5P6442 CPU based systems + config ARCH_S5PC1XX bool "Samsung S5PC1XX" select GENERIC_GPIO @@ -653,6 +676,15 @@ config ARCH_S5PC1XX help Samsung S5PC1XX series based systems +config ARCH_S5PV210 + bool "Samsung S5PV210/S5PC110" + select CPU_V7 + select GENERIC_GPIO + select HAVE_CLK + select ARM_L1_CACHE_SHIFT_6 + help + Samsung S5PV210/S5PC110 series based systems + config ARCH_SHARK bool "Shark" select CPU_SA110 @@ -816,8 +848,6 @@ source "arch/arm/mach-sa1100/Kconfig" source "arch/arm/plat-samsung/Kconfig" source "arch/arm/plat-s3c24xx/Kconfig" -source "arch/arm/plat-s3c64xx/Kconfig" -source "arch/arm/plat-s3c/Kconfig" source "arch/arm/plat-s5p/Kconfig" source "arch/arm/plat-s5pc1xx/Kconfig" @@ -826,25 +856,27 @@ source "arch/arm/mach-s3c2400/Kconfig" source "arch/arm/mach-s3c2410/Kconfig" source "arch/arm/mach-s3c2412/Kconfig" source "arch/arm/mach-s3c2440/Kconfig" -source "arch/arm/mach-s3c2442/Kconfig" source "arch/arm/mach-s3c2443/Kconfig" endif if ARCH_S3C64XX -source "arch/arm/mach-s3c6400/Kconfig" -source "arch/arm/mach-s3c6410/Kconfig" +source "arch/arm/mach-s3c64xx/Kconfig" endif source "arch/arm/mach-s5p6440/Kconfig" -source "arch/arm/mach-shmobile/Kconfig" - -source "arch/arm/plat-stmp3xxx/Kconfig" +source "arch/arm/mach-s5p6442/Kconfig" if ARCH_S5PC1XX source "arch/arm/mach-s5pc100/Kconfig" endif +source "arch/arm/mach-s5pv210/Kconfig" + +source "arch/arm/mach-shmobile/Kconfig" + +source "arch/arm/plat-stmp3xxx/Kconfig" + source "arch/arm/mach-u300/Kconfig" source "arch/arm/mach-ux500/Kconfig" @@ -1092,7 +1124,7 @@ source kernel/Kconfig.preempt config HZ int default 128 if ARCH_L7200 - default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 + default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PV210 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER default AT91_TIMER_HZ if ARCH_AT91 default 100 diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 5cb9326df7a..91344af75f3 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -117,7 +117,7 @@ config DEBUG_CLPS711X_UART2 cause the debug messages to appear on the first serial port. config DEBUG_S3C_UART - depends on PLAT_S3C + depends on PLAT_SAMSUNG int "S3C UART to use for low-level debug" default "0" help diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 10e933b2f40..2dca13f6016 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -160,11 +160,13 @@ machine-$(CONFIG_ARCH_PNX4008) := pnx4008 machine-$(CONFIG_ARCH_PXA) := pxa machine-$(CONFIG_ARCH_REALVIEW) := realview machine-$(CONFIG_ARCH_RPC) := rpc -machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 s3c2412 s3c2440 s3c2442 s3c2443 +machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 s3c2412 s3c2440 s3c2443 machine-$(CONFIG_ARCH_S3C24A0) := s3c24a0 -machine-$(CONFIG_ARCH_S3C64XX) := s3c6400 s3c6410 +machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx machine-$(CONFIG_ARCH_S5P6440) := s5p6440 +machine-$(CONFIG_ARCH_S5P6442) := s5p6442 machine-$(CONFIG_ARCH_S5PC1XX) := s5pc100 +machine-$(CONFIG_ARCH_S5PV210) := s5pv210 machine-$(CONFIG_ARCH_SA1100) := sa1100 machine-$(CONFIG_ARCH_SHARK) := shark machine-$(CONFIG_ARCH_SHMOBILE) := shmobile @@ -180,15 +182,15 @@ machine-$(CONFIG_FOOTBRIDGE) := footbridge # by CONFIG_* macro name. plat-$(CONFIG_ARCH_MXC) := mxc plat-$(CONFIG_ARCH_OMAP) := omap +plat-$(CONFIG_ARCH_S3C64XX) := samsung plat-$(CONFIG_ARCH_STMP3XXX) := stmp3xxx plat-$(CONFIG_PLAT_IOP) := iop plat-$(CONFIG_PLAT_NOMADIK) := nomadik plat-$(CONFIG_PLAT_ORION) := orion plat-$(CONFIG_PLAT_PXA) := pxa -plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx s3c samsung -plat-$(CONFIG_PLAT_S3C64XX) := s3c64xx s3c samsung -plat-$(CONFIG_PLAT_S5PC1XX) := s5pc1xx s3c samsung -plat-$(CONFIG_PLAT_S5P) := s5p samsung s3c +plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx samsung +plat-$(CONFIG_PLAT_S5PC1XX) := s5pc1xx samsung +plat-$(CONFIG_PLAT_S5P) := s5p samsung ifeq ($(CONFIG_ARCH_EBSA110),y) # This is what happens if you forget the IOCS16 line. diff --git a/arch/arm/configs/s3c6400_defconfig b/arch/arm/configs/s3c6400_defconfig index f56e50fab79..5e7d4c1b8fc 100644 --- a/arch/arm/configs/s3c6400_defconfig +++ b/arch/arm/configs/s3c6400_defconfig @@ -1,14 +1,11 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.28-rc3 -# Mon Nov 3 10:10:30 2008 +# Linux kernel version: 2.6.33-rc4 +# Tue Jan 19 13:12:40 2010 # CONFIG_ARM=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y CONFIG_GENERIC_GPIO=y -# CONFIG_GENERIC_TIME is not set -# CONFIG_GENERIC_CLOCKEVENTS is not set -CONFIG_MMU=y CONFIG_NO_IOPORT=y CONFIG_GENERIC_HARDIRQS=y CONFIG_STACKTRACE_SUPPORT=y @@ -18,13 +15,13 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y CONFIG_HARDIRQS_SW_RESEND=y CONFIG_GENERIC_IRQ_PROBE=y CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_ARCH_HAS_CPUFREQ=y CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y CONFIG_VECTORS_BASE=0xffff0000 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_CONSTRUCTORS=y # # General setup @@ -34,13 +31,30 @@ CONFIG_BROKEN_ON_SMP=y CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_LZO=y +CONFIG_KERNEL_GZIP=y +# CONFIG_KERNEL_BZIP2 is not set +# CONFIG_KERNEL_LZMA is not set +# CONFIG_KERNEL_LZO is not set CONFIG_SWAP=y # CONFIG_SYSVIPC is not set # CONFIG_BSD_PROCESS_ACCT is not set + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +# CONFIG_TREE_PREEMPT_RCU is not set +# CONFIG_TINY_RCU is not set +# CONFIG_RCU_TRACE is not set +CONFIG_RCU_FANOUT=32 +# CONFIG_RCU_FANOUT_EXACT is not set +# CONFIG_TREE_RCU_TRACE is not set # CONFIG_IKCONFIG is not set CONFIG_LOG_BUF_SHIFT=17 -# CONFIG_CGROUPS is not set # CONFIG_GROUP_SCHED is not set +# CONFIG_CGROUPS is not set CONFIG_SYSFS_DEPRECATED=y CONFIG_SYSFS_DEPRECATED_V2=y # CONFIG_RELAY is not set @@ -50,8 +64,13 @@ CONFIG_NAMESPACES=y # CONFIG_PID_NS is not set CONFIG_BLK_DEV_INITRD=y CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_RD_LZO=y CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y # CONFIG_EMBEDDED is not set CONFIG_UID16=y CONFIG_SYSCTL_SYSCALL=y @@ -62,32 +81,38 @@ CONFIG_HOTPLUG=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y -CONFIG_COMPAT_BRK=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y -CONFIG_ANON_INODES=y CONFIG_EPOLL=y CONFIG_SIGNALFD=y CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y CONFIG_AIO=y + +# +# Kernel Performance Events And Counters +# CONFIG_VM_EVENT_COUNTERS=y CONFIG_SLUB_DEBUG=y +CONFIG_COMPAT_BRK=y # CONFIG_SLAB is not set CONFIG_SLUB=y # CONFIG_SLOB is not set # CONFIG_PROFILING is not set -# CONFIG_MARKERS is not set CONFIG_HAVE_OPROFILE=y # CONFIG_KPROBES is not set CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y CONFIG_HAVE_CLK=y + +# +# GCOV-based kernel profiling +# +# CONFIG_SLOW_WORK is not set CONFIG_HAVE_GENERIC_DMA_COHERENT=y CONFIG_SLABINFO=y CONFIG_RT_MUTEXES=y -# CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 CONFIG_MODULES=y # CONFIG_MODULE_FORCE_LOAD is not set @@ -95,11 +120,8 @@ CONFIG_MODULE_UNLOAD=y # CONFIG_MODULE_FORCE_UNLOAD is not set # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_KMOD=y CONFIG_BLOCK=y -CONFIG_LBD=y -# CONFIG_BLK_DEV_IO_TRACE is not set -CONFIG_LSF=y +CONFIG_LBDAF=y # CONFIG_BLK_DEV_BSG is not set # CONFIG_BLK_DEV_INTEGRITY is not set @@ -107,33 +129,62 @@ CONFIG_LSF=y # IO Schedulers # CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y CONFIG_IOSCHED_DEADLINE=y CONFIG_IOSCHED_CFQ=y -# CONFIG_DEFAULT_AS is not set # CONFIG_DEFAULT_DEADLINE is not set CONFIG_DEFAULT_CFQ=y # CONFIG_DEFAULT_NOOP is not set CONFIG_DEFAULT_IOSCHED="cfq" -CONFIG_CLASSIC_RCU=y +# CONFIG_INLINE_SPIN_TRYLOCK is not set +# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK is not set +# CONFIG_INLINE_SPIN_LOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK_IRQ is not set +# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set +# CONFIG_INLINE_SPIN_UNLOCK is not set +# CONFIG_INLINE_SPIN_UNLOCK_BH is not set +# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set +# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_READ_TRYLOCK is not set +# CONFIG_INLINE_READ_LOCK is not set +# CONFIG_INLINE_READ_LOCK_BH is not set +# CONFIG_INLINE_READ_LOCK_IRQ is not set +# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set +# CONFIG_INLINE_READ_UNLOCK is not set +# CONFIG_INLINE_READ_UNLOCK_BH is not set +# CONFIG_INLINE_READ_UNLOCK_IRQ is not set +# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_WRITE_TRYLOCK is not set +# CONFIG_INLINE_WRITE_LOCK is not set +# CONFIG_INLINE_WRITE_LOCK_BH is not set +# CONFIG_INLINE_WRITE_LOCK_IRQ is not set +# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set +# CONFIG_INLINE_WRITE_UNLOCK is not set +# CONFIG_INLINE_WRITE_UNLOCK_BH is not set +# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set +# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set +# CONFIG_MUTEX_SPIN_ON_OWNER is not set # CONFIG_FREEZER is not set # # System Type # +CONFIG_MMU=y # CONFIG_ARCH_AAEC2000 is not set # CONFIG_ARCH_INTEGRATOR is not set # CONFIG_ARCH_REALVIEW is not set # CONFIG_ARCH_VERSATILE is not set # CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_CLPS7500 is not set # CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_GEMINI is not set # CONFIG_ARCH_EBSA110 is not set # CONFIG_ARCH_EP93XX is not set # CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_STMP3XXX is not set # CONFIG_ARCH_NETX is not set # CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_NOMADIK is not set # CONFIG_ARCH_IOP13XX is not set # CONFIG_ARCH_IOP32X is not set # CONFIG_ARCH_IOP33X is not set @@ -141,35 +192,62 @@ CONFIG_CLASSIC_RCU=y # CONFIG_ARCH_IXP2000 is not set # CONFIG_ARCH_IXP4XX is not set # CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_DOVE is not set # CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set # CONFIG_ARCH_LOKI is not set # CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_MXC is not set # CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_W90X900 is not set # CONFIG_ARCH_PNX4008 is not set # CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_MSM is not set # CONFIG_ARCH_RPC is not set # CONFIG_ARCH_SA1100 is not set # CONFIG_ARCH_S3C2410 is not set CONFIG_ARCH_S3C64XX=y +# CONFIG_ARCH_S5P6440 is not set +# CONFIG_ARCH_S5PC1XX is not set # CONFIG_ARCH_SHARK is not set # CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_U300 is not set # CONFIG_ARCH_DAVINCI is not set # CONFIG_ARCH_OMAP is not set -# CONFIG_ARCH_MSM is not set +# CONFIG_ARCH_BCMRING is not set +# CONFIG_ARCH_U8500 is not set +CONFIG_PLAT_SAMSUNG=y +CONFIG_SAMSUNG_CLKSRC=y +CONFIG_SAMSUNG_IRQ_VIC_TIMER=y +CONFIG_SAMSUNG_IRQ_UART=y +CONFIG_S3C_GPIO_CFG_S3C24XX=y +CONFIG_S3C_GPIO_CFG_S3C64XX=y +CONFIG_S3C_GPIO_PULL_UPDOWN=y +CONFIG_SAMSUNG_GPIO_EXTRA=0 +# CONFIG_S3C_ADC is not set +CONFIG_S3C_DEV_HSMMC=y +CONFIG_S3C_DEV_HSMMC1=y +CONFIG_S3C_DEV_I2C1=y +CONFIG_S3C_DEV_FB=y +CONFIG_S3C_DEV_USB_HOST=y +CONFIG_S3C_DEV_USB_HSOTG=y +CONFIG_S3C_DEV_NAND=y CONFIG_PLAT_S3C64XX=y CONFIG_CPU_S3C6400_INIT=y CONFIG_CPU_S3C6400_CLOCK=y +# CONFIG_S3C64XX_DMA is not set CONFIG_S3C64XX_SETUP_I2C0=y CONFIG_S3C64XX_SETUP_I2C1=y +CONFIG_S3C64XX_SETUP_FB_24BPP=y +CONFIG_S3C64XX_SETUP_SDHCI_GPIO=y CONFIG_PLAT_S3C=y # # Boot options # CONFIG_S3C_BOOT_ERROR_RESET=y +CONFIG_S3C_BOOT_UART_FORCE_FIFO=y # # Power management @@ -177,17 +255,16 @@ CONFIG_S3C_BOOT_ERROR_RESET=y CONFIG_S3C_LOWLEVEL_UART_PORT=0 CONFIG_S3C_GPIO_SPACE=0 CONFIG_S3C_GPIO_TRACK=y -CONFIG_S3C_GPIO_PULL_UPDOWN=y -CONFIG_S3C_GPIO_CFG_S3C24XX=y -CONFIG_S3C_GPIO_CFG_S3C64XX=y -CONFIG_S3C_DEV_HSMMC=y -CONFIG_S3C_DEV_HSMMC1=y -CONFIG_S3C_DEV_I2C1=y +# CONFIG_MACH_SMDK6400 is not set CONFIG_CPU_S3C6410=y CONFIG_S3C6410_SETUP_SDHCI=y +# CONFIG_MACH_ANW6410 is not set CONFIG_MACH_SMDK6410=y CONFIG_SMDK6410_SD_CH0=y # CONFIG_SMDK6410_SD_CH1 is not set +# CONFIG_SMDK6410_WM1190_EV1 is not set +# CONFIG_MACH_NCP is not set +# CONFIG_MACH_HMT is not set # # Processor Type @@ -196,7 +273,7 @@ CONFIG_CPU_V6=y CONFIG_CPU_32v6K=y CONFIG_CPU_32v6=y CONFIG_CPU_ABRT_EV6=y -CONFIG_CPU_PABRT_NOIFAR=y +CONFIG_CPU_PABRT_V6=y CONFIG_CPU_CACHE_V6=y CONFIG_CPU_CACHE_VIPT=y CONFIG_CPU_COPY_V6=y @@ -212,8 +289,10 @@ CONFIG_ARM_THUMB=y # CONFIG_CPU_ICACHE_DISABLE is not set # CONFIG_CPU_DCACHE_DISABLE is not set # CONFIG_CPU_BPREDICT_DISABLE is not set -# CONFIG_OUTER_CACHE is not set +CONFIG_ARM_L1_CACHE_SHIFT=5 +# CONFIG_ARM_ERRATA_411920 is not set CONFIG_ARM_VIC=y +CONFIG_ARM_VIC_NR=2 # # Bus support @@ -229,13 +308,15 @@ CONFIG_VMSPLIT_3G=y # CONFIG_VMSPLIT_2G is not set # CONFIG_VMSPLIT_1G is not set CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set # CONFIG_PREEMPT is not set CONFIG_HZ=100 CONFIG_AEABI=y CONFIG_OABI_COMPAT=y -CONFIG_ARCH_FLATMEM_HAS_HOLES=y # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +# CONFIG_HIGHMEM is not set CONFIG_SELECT_MEMORY_MODEL=y CONFIG_FLATMEM_MANUAL=y # CONFIG_DISCONTIGMEM_MANUAL is not set @@ -243,26 +324,28 @@ CONFIG_FLATMEM_MANUAL=y CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=4 -# CONFIG_RESOURCES_64BIT is not set +CONFIG_SPLIT_PTLOCK_CPUS=999999 # CONFIG_PHYS_ADDR_T_64BIT is not set CONFIG_ZONE_DMA_FLAG=0 CONFIG_VIRT_TO_BUS=y -CONFIG_UNEVICTABLE_LRU=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_ALIGNMENT_TRAP=y +# CONFIG_UACCESS_WITH_MEMCPY is not set # # Boot options # CONFIG_ZBOOT_ROM_TEXT=0 CONFIG_ZBOOT_ROM_BSS=0 -CONFIG_CMDLINE="console=ttySAC0,115200 root=/dev/ram init=/bin/bash initrd=0x51000000,4M" +CONFIG_CMDLINE="console=ttySAC0,115200 root=/dev/ram init=/linuxrc initrd=0x51000000,6M ramdisk_size=6144" # CONFIG_XIP_KERNEL is not set # CONFIG_KEXEC is not set # # CPU Power Management # +# CONFIG_CPU_FREQ is not set # CONFIG_CPU_IDLE is not set # @@ -300,6 +383,7 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y # Generic Driver Options # CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +# CONFIG_DEVTMPFS is not set CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y CONFIG_FW_LOADER=y @@ -314,14 +398,32 @@ CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_CRYPTOLOOP is not set + +# +# DRBD disabled because PROC_FS, INET or CONNECTOR not selected +# CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_BLK_DEV_RAM_SIZE=4096 # CONFIG_BLK_DEV_XIP is not set # CONFIG_CDROM_PKTCDVD is not set +# CONFIG_MG_DISK is not set CONFIG_MISC_DEVICES=y -# CONFIG_EEPROM_93CX6 is not set +# CONFIG_AD525X_DPOT is not set +# CONFIG_ICS932S401 is not set # CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_ISL29003 is not set +# CONFIG_DS1682 is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +CONFIG_EEPROM_AT24=y +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_IWMC3200TOP is not set CONFIG_HAVE_IDE=y # CONFIG_IDE is not set @@ -334,6 +436,7 @@ CONFIG_HAVE_IDE=y # CONFIG_SCSI_NETLINK is not set # CONFIG_ATA is not set # CONFIG_MD is not set +# CONFIG_PHONE is not set # # Input device support @@ -341,6 +444,7 @@ CONFIG_HAVE_IDE=y CONFIG_INPUT=y # CONFIG_INPUT_FF_MEMLESS is not set # CONFIG_INPUT_POLLDEV is not set +# CONFIG_INPUT_SPARSEKMAP is not set # # Userland interfaces @@ -357,27 +461,33 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 # Input Device Drivers # CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ADP5588 is not set CONFIG_KEYBOARD_ATKBD=y -# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_QT2160 is not set # CONFIG_KEYBOARD_LKKBD is not set -# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_GPIO is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_MAX7359 is not set # CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set # CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_GPIO is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set CONFIG_INPUT_MOUSE=y CONFIG_MOUSE_PS2=y CONFIG_MOUSE_PS2_ALPS=y CONFIG_MOUSE_PS2_LOGIPS2PP=y CONFIG_MOUSE_PS2_SYNAPTICS=y -CONFIG_MOUSE_PS2_LIFEBOOK=y CONFIG_MOUSE_PS2_TRACKPOINT=y # CONFIG_MOUSE_PS2_ELANTECH is not set +# CONFIG_MOUSE_PS2_SENTELIC is not set # CONFIG_MOUSE_PS2_TOUCHKIT is not set # CONFIG_MOUSE_SERIAL is not set # CONFIG_MOUSE_APPLETOUCH is not set # CONFIG_MOUSE_BCM5974 is not set # CONFIG_MOUSE_VSXXXAA is not set # CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_SYNAPTICS_I2C is not set # CONFIG_INPUT_JOYSTICK is not set # CONFIG_INPUT_TABLET is not set # CONFIG_INPUT_TOUCHSCREEN is not set @@ -390,6 +500,7 @@ CONFIG_SERIO=y CONFIG_SERIO_SERPORT=y CONFIG_SERIO_LIBPS2=y # CONFIG_SERIO_RAW is not set +# CONFIG_SERIO_ALTERA_PS2 is not set # CONFIG_GAMEPORT is not set # @@ -423,16 +534,18 @@ CONFIG_SERIAL_S3C6400=y CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=256 # CONFIG_IPMI_HANDLER is not set CONFIG_HW_RANDOM=y -# CONFIG_NVRAM is not set +# CONFIG_HW_RANDOM_TIMERIOMEM is not set # CONFIG_R3964 is not set # CONFIG_RAW_DRIVER is not set # CONFIG_TCG_TPM is not set CONFIG_I2C=y CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_HELPER_AUTO=y @@ -443,6 +556,7 @@ CONFIG_I2C_HELPER_AUTO=y # # I2C system bus drivers (mostly embedded / system-on-chip) # +# CONFIG_I2C_DESIGNWARE is not set # CONFIG_I2C_GPIO is not set # CONFIG_I2C_OCORES is not set CONFIG_I2C_S3C2410=y @@ -463,32 +577,33 @@ CONFIG_I2C_S3C2410=y # # Miscellaneous I2C Chip support # -# CONFIG_DS1682 is not set -CONFIG_EEPROM_AT24=y -# CONFIG_EEPROM_LEGACY is not set -# CONFIG_SENSORS_PCF8574 is not set -# CONFIG_PCF8575 is not set -# CONFIG_SENSORS_PCA9539 is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_TPS65010 is not set -# CONFIG_SENSORS_MAX6875 is not set # CONFIG_SENSORS_TSL2550 is not set # CONFIG_I2C_DEBUG_CORE is not set # CONFIG_I2C_DEBUG_ALGO is not set # CONFIG_I2C_DEBUG_BUS is not set # CONFIG_I2C_DEBUG_CHIP is not set # CONFIG_SPI is not set + +# +# PPS support +# +# CONFIG_PPS is not set CONFIG_ARCH_REQUIRE_GPIOLIB=y CONFIG_GPIOLIB=y # CONFIG_DEBUG_GPIO is not set # CONFIG_GPIO_SYSFS is not set # +# Memory mapped GPIO expanders: +# + +# # I2C GPIO expanders: # # CONFIG_GPIO_MAX732X is not set # CONFIG_GPIO_PCA953X is not set # CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_ADP5588 is not set # # PCI GPIO expanders: @@ -497,10 +612,19 @@ CONFIG_GPIOLIB=y # # SPI GPIO expanders: # + +# +# AC97 GPIO expanders: +# # CONFIG_W1 is not set # CONFIG_POWER_SUPPLY is not set CONFIG_HWMON=y # CONFIG_HWMON_VID is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# # CONFIG_SENSORS_AD7414 is not set # CONFIG_SENSORS_AD7418 is not set # CONFIG_SENSORS_ADM1021 is not set @@ -509,17 +633,21 @@ CONFIG_HWMON=y # CONFIG_SENSORS_ADM1029 is not set # CONFIG_SENSORS_ADM1031 is not set # CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7462 is not set # CONFIG_SENSORS_ADT7470 is not set # CONFIG_SENSORS_ADT7473 is not set +# CONFIG_SENSORS_ADT7475 is not set # CONFIG_SENSORS_ATXP1 is not set # CONFIG_SENSORS_DS1621 is not set # CONFIG_SENSORS_F71805F is not set # CONFIG_SENSORS_F71882FG is not set # CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_G760A is not set # CONFIG_SENSORS_GL518SM is not set # CONFIG_SENSORS_GL520SM is not set # CONFIG_SENSORS_IT87 is not set # CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM73 is not set # CONFIG_SENSORS_LM75 is not set # CONFIG_SENSORS_LM77 is not set # CONFIG_SENSORS_LM78 is not set @@ -530,16 +658,24 @@ CONFIG_HWMON=y # CONFIG_SENSORS_LM90 is not set # CONFIG_SENSORS_LM92 is not set # CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LM95241 is not set # CONFIG_SENSORS_MAX1619 is not set # CONFIG_SENSORS_MAX6650 is not set # CONFIG_SENSORS_PC87360 is not set # CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_SHT15 is not set # CONFIG_SENSORS_DME1737 is not set # CONFIG_SENSORS_SMSC47M1 is not set # CONFIG_SENSORS_SMSC47M192 is not set # CONFIG_SENSORS_SMSC47B397 is not set # CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_AMC6821 is not set # CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set # CONFIG_SENSORS_VT1211 is not set # CONFIG_SENSORS_W83781D is not set # CONFIG_SENSORS_W83791D is not set @@ -549,15 +685,14 @@ CONFIG_HWMON=y # CONFIG_SENSORS_W83L786NG is not set # CONFIG_SENSORS_W83627HF is not set # CONFIG_SENSORS_W83627EHF is not set -# CONFIG_HWMON_DEBUG_CHIP is not set +# CONFIG_SENSORS_LIS3_I2C is not set # CONFIG_THERMAL is not set -# CONFIG_THERMAL_HWMON is not set # CONFIG_WATCHDOG is not set +CONFIG_SSB_POSSIBLE=y # # Sonics Silicon Backplane # -CONFIG_SSB_POSSIBLE=y # CONFIG_SSB is not set # @@ -568,28 +703,22 @@ CONFIG_SSB_POSSIBLE=y # CONFIG_MFD_ASIC3 is not set # CONFIG_HTC_EGPIO is not set # CONFIG_HTC_PASIC3 is not set +# CONFIG_TPS65010 is not set +# CONFIG_TWL4030_CORE is not set # CONFIG_MFD_TMIO is not set # CONFIG_MFD_T7L66XB is not set # CONFIG_MFD_TC6387XB is not set # CONFIG_MFD_TC6393XB is not set # CONFIG_PMIC_DA903X is not set +# CONFIG_PMIC_ADP5520 is not set # CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X is not set # CONFIG_MFD_WM8350_I2C is not set - -# -# Multimedia devices -# - -# -# Multimedia core support -# -# CONFIG_VIDEO_DEV is not set -# CONFIG_VIDEO_MEDIA is not set - -# -# Multimedia drivers -# -# CONFIG_DAB is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_AB3100_CORE is not set +# CONFIG_MFD_88PM8607 is not set +# CONFIG_REGULATOR is not set +# CONFIG_MEDIA_SUPPORT is not set # # Graphics support @@ -612,17 +741,15 @@ CONFIG_DUMMY_CONSOLE=y # CONFIG_SOUND is not set CONFIG_HID_SUPPORT=y CONFIG_HID=y -CONFIG_HID_DEBUG=y # CONFIG_HIDRAW is not set # CONFIG_HID_PID is not set # # Special HID drivers # -# CONFIG_HID_COMPAT is not set CONFIG_USB_SUPPORT=y CONFIG_USB_ARCH_HAS_HCD=y -# CONFIG_USB_ARCH_HAS_OHCI is not set +CONFIG_USB_ARCH_HAS_OHCI=y # CONFIG_USB_ARCH_HAS_EHCI is not set # CONFIG_USB is not set @@ -631,9 +758,13 @@ CONFIG_USB_ARCH_HAS_HCD=y # # -# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may # # CONFIG_USB_GADGET is not set + +# +# OTG and related infrastructure +# CONFIG_MMC=y CONFIG_MMC_DEBUG=y CONFIG_MMC_UNSAFE_RESUME=y @@ -650,22 +781,24 @@ CONFIG_SDIO_UART=y # MMC/SD/SDIO Host Controller Drivers # CONFIG_MMC_SDHCI=y +# CONFIG_MMC_SDHCI_PLTFM is not set CONFIG_MMC_SDHCI_S3C=y +# CONFIG_MMC_SDHCI_S3C_DMA is not set +# CONFIG_MMC_AT91 is not set +# CONFIG_MMC_ATMELMCI is not set # CONFIG_MEMSTICK is not set -# CONFIG_ACCESSIBILITY is not set # CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set CONFIG_RTC_LIB=y # CONFIG_RTC_CLASS is not set # CONFIG_DMADEVICES is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set # -# Voltage and Current regulators +# TI VLYNQ # -# CONFIG_REGULATOR is not set -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_BQ24022 is not set -# CONFIG_UIO is not set +# CONFIG_STAGING is not set # # File systems @@ -674,6 +807,7 @@ CONFIG_EXT2_FS=y # CONFIG_EXT2_FS_XATTR is not set # CONFIG_EXT2_FS_XIP is not set CONFIG_EXT3_FS=y +# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set CONFIG_EXT3_FS_XATTR=y CONFIG_EXT3_FS_POSIX_ACL=y CONFIG_EXT3_FS_SECURITY=y @@ -683,9 +817,12 @@ CONFIG_FS_MBCACHE=y # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set CONFIG_FS_POSIX_ACL=y -CONFIG_FILE_LOCKING=y # CONFIG_XFS_FS is not set # CONFIG_GFS2_FS is not set +# CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y CONFIG_DNOTIFY=y CONFIG_INOTIFY=y CONFIG_INOTIFY_USER=y @@ -696,6 +833,11 @@ CONFIG_INOTIFY_USER=y CONFIG_GENERIC_ACL=y # +# Caches +# +# CONFIG_FSCACHE is not set + +# # CD-ROM/DVD Filesystems # # CONFIG_ISO9660_FS is not set @@ -719,10 +861,7 @@ CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y # CONFIG_HUGETLB_PAGE is not set # CONFIG_CONFIGFS_FS is not set - -# -# Miscellaneous filesystems -# +CONFIG_MISC_FILESYSTEMS=y # CONFIG_ADFS_FS is not set # CONFIG_AFFS_FS is not set # CONFIG_HFS_FS is not set @@ -731,12 +870,17 @@ CONFIG_TMPFS_POSIX_ACL=y # CONFIG_BFS_FS is not set # CONFIG_EFS_FS is not set CONFIG_CRAMFS=y +# CONFIG_SQUASHFS is not set # CONFIG_VXFS_FS is not set # CONFIG_MINIX_FS is not set # CONFIG_OMFS_FS is not set # CONFIG_HPFS_FS is not set # CONFIG_QNX4FS_FS is not set CONFIG_ROMFS_FS=y +CONFIG_ROMFS_BACKED_BY_BLOCK=y +# CONFIG_ROMFS_BACKED_BY_MTD is not set +# CONFIG_ROMFS_BACKED_BY_BOTH is not set +CONFIG_ROMFS_ON_BLOCK=y # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set @@ -755,6 +899,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y CONFIG_ENABLE_MUST_CHECK=y CONFIG_FRAME_WARN=1024 CONFIG_MAGIC_SYSRQ=y +# CONFIG_STRIP_ASM_SYMS is not set # CONFIG_UNUSED_SYMBOLS is not set # CONFIG_DEBUG_FS is not set # CONFIG_HEADERS_CHECK is not set @@ -763,12 +908,16 @@ CONFIG_DEBUG_KERNEL=y CONFIG_DETECT_SOFTLOCKUP=y # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +CONFIG_DETECT_HUNG_TASK=y +# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 CONFIG_SCHED_DEBUG=y # CONFIG_SCHEDSTATS is not set # CONFIG_TIMER_STATS is not set # CONFIG_DEBUG_OBJECTS is not set # CONFIG_SLUB_DEBUG_ON is not set # CONFIG_SLUB_STATS is not set +# CONFIG_DEBUG_KMEMLEAK is not set CONFIG_DEBUG_RT_MUTEXES=y CONFIG_DEBUG_PI_LIST=y # CONFIG_RT_MUTEX_TESTER is not set @@ -787,34 +936,43 @@ CONFIG_DEBUG_INFO=y CONFIG_DEBUG_MEMORY_INIT=y # CONFIG_DEBUG_LIST is not set # CONFIG_DEBUG_SG is not set -CONFIG_FRAME_POINTER=y +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_DEBUG_CREDENTIALS is not set # CONFIG_BOOT_PRINTK_DELAY is not set # CONFIG_RCU_TORTURE_TEST is not set # CONFIG_RCU_CPU_STALL_DETECTOR is not set # CONFIG_BACKTRACE_SELF_TEST is not set # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set # CONFIG_FAULT_INJECTION is not set # CONFIG_LATENCYTOP is not set CONFIG_SYSCTL_SYSCALL_CHECK=y +# CONFIG_PAGE_POISONING is not set CONFIG_HAVE_FUNCTION_TRACER=y - -# -# Tracers -# +CONFIG_TRACING_SUPPORT=y +CONFIG_FTRACE=y # CONFIG_FUNCTION_TRACER is not set # CONFIG_SCHED_TRACER is not set -# CONFIG_CONTEXT_SWITCH_TRACER is not set +# CONFIG_ENABLE_DEFAULT_TRACERS is not set # CONFIG_BOOT_TRACER is not set +CONFIG_BRANCH_PROFILE_NONE=y +# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set +# CONFIG_PROFILE_ALL_BRANCHES is not set # CONFIG_STACK_TRACER is not set -# CONFIG_DYNAMIC_PRINTK_DEBUG is not set +# CONFIG_KMEMTRACE is not set +# CONFIG_WORKQUEUE_TRACER is not set +# CONFIG_BLK_DEV_IO_TRACE is not set # CONFIG_SAMPLES is not set CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set +CONFIG_ARM_UNWIND=y CONFIG_DEBUG_USER=y CONFIG_DEBUG_ERRORS=y # CONFIG_DEBUG_STACK_USAGE is not set CONFIG_DEBUG_LL=y +# CONFIG_EARLY_PRINTK is not set # CONFIG_DEBUG_ICEDCC is not set +# CONFIG_OC_ETM is not set CONFIG_DEBUG_S3C_UART=0 # @@ -823,13 +981,19 @@ CONFIG_DEBUG_S3C_UART=0 # CONFIG_KEYS is not set # CONFIG_SECURITY is not set # CONFIG_SECURITYFS is not set -# CONFIG_SECURITY_FILE_CAPABILITIES is not set +# CONFIG_DEFAULT_SECURITY_SELINUX is not set +# CONFIG_DEFAULT_SECURITY_SMACK is not set +# CONFIG_DEFAULT_SECURITY_TOMOYO is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" # CONFIG_CRYPTO is not set +# CONFIG_BINARY_PRINTF is not set # # Library routines # CONFIG_BITREVERSE=y +CONFIG_GENERIC_FIND_LAST_BIT=y # CONFIG_CRC_CCITT is not set # CONFIG_CRC16 is not set # CONFIG_CRC_T10DIF is not set @@ -838,6 +1002,10 @@ CONFIG_CRC32=y # CONFIG_CRC7 is not set # CONFIG_LIBCRC32C is not set CONFIG_ZLIB_INFLATE=y -CONFIG_PLIST=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_DECOMPRESS_LZO=y CONFIG_HAS_IOMEM=y CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/s5p6442_defconfig b/arch/arm/configs/s5p6442_defconfig new file mode 100644 index 00000000000..74e20bfc048 --- /dev/null +++ b/arch/arm/configs/s5p6442_defconfig @@ -0,0 +1,883 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.33-rc4 +# Mon Jan 25 08:50:28 2010 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_NO_IOPORT=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_CONSTRUCTORS=y + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_LZO=y +CONFIG_KERNEL_GZIP=y +# CONFIG_KERNEL_BZIP2 is not set +# CONFIG_KERNEL_LZMA is not set +# CONFIG_KERNEL_LZO is not set +CONFIG_SWAP=y +# CONFIG_SYSVIPC is not set +# CONFIG_BSD_PROCESS_ACCT is not set + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +# CONFIG_TREE_PREEMPT_RCU is not set +# CONFIG_TINY_RCU is not set +# CONFIG_RCU_TRACE is not set +CONFIG_RCU_FANOUT=32 +# CONFIG_RCU_FANOUT_EXACT is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=17 +# CONFIG_GROUP_SCHED is not set +# CONFIG_CGROUPS is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_RD_LZO=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +# CONFIG_EMBEDDED is not set +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y + +# +# Kernel Performance Events And Counters +# +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +CONFIG_COMPAT_BRK=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_CLK=y + +# +# GCOV-based kernel profiling +# +# CONFIG_SLOW_WORK is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_BLOCK=y +CONFIG_LBDAF=y +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +# CONFIG_INLINE_SPIN_TRYLOCK is not set +# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK is not set +# CONFIG_INLINE_SPIN_LOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK_IRQ is not set +# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set +# CONFIG_INLINE_SPIN_UNLOCK is not set +# CONFIG_INLINE_SPIN_UNLOCK_BH is not set +# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set +# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_READ_TRYLOCK is not set +# CONFIG_INLINE_READ_LOCK is not set +# CONFIG_INLINE_READ_LOCK_BH is not set +# CONFIG_INLINE_READ_LOCK_IRQ is not set +# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set +# CONFIG_INLINE_READ_UNLOCK is not set +# CONFIG_INLINE_READ_UNLOCK_BH is not set +# CONFIG_INLINE_READ_UNLOCK_IRQ is not set +# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_WRITE_TRYLOCK is not set +# CONFIG_INLINE_WRITE_LOCK is not set +# CONFIG_INLINE_WRITE_LOCK_BH is not set +# CONFIG_INLINE_WRITE_LOCK_IRQ is not set +# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set +# CONFIG_INLINE_WRITE_UNLOCK is not set +# CONFIG_INLINE_WRITE_UNLOCK_BH is not set +# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set +# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set +# CONFIG_MUTEX_SPIN_ON_OWNER is not set +# CONFIG_FREEZER is not set + +# +# System Type +# +CONFIG_MMU=y +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_GEMINI is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_STMP3XXX is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_NOMADIK is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_DOVE is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_W90X900 is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_MSM is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_S5P6440 is not set +CONFIG_ARCH_S5P6442=y +# CONFIG_ARCH_S5PC1XX is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_U300 is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_BCMRING is not set +# CONFIG_ARCH_U8500 is not set +CONFIG_PLAT_SAMSUNG=y +CONFIG_SAMSUNG_CLKSRC=y +CONFIG_SAMSUNG_IRQ_VIC_TIMER=y +CONFIG_SAMSUNG_IRQ_UART=y +CONFIG_SAMSUNG_GPIOLIB_4BIT=y +CONFIG_S3C_GPIO_CFG_S3C24XX=y +CONFIG_S3C_GPIO_CFG_S3C64XX=y +CONFIG_S3C_GPIO_PULL_UPDOWN=y +CONFIG_SAMSUNG_GPIO_EXTRA=0 +# CONFIG_S3C_ADC is not set + +# +# Power management +# +CONFIG_PLAT_S3C=y + +# +# Boot options +# +# CONFIG_S3C_BOOT_ERROR_RESET is not set +CONFIG_S3C_BOOT_UART_FORCE_FIFO=y +CONFIG_S3C_LOWLEVEL_UART_PORT=1 +CONFIG_S3C_GPIO_SPACE=0 +CONFIG_S3C_GPIO_TRACK=y +CONFIG_PLAT_S5P=y +CONFIG_CPU_S5P6442=y +CONFIG_MACH_SMDK6442=y + +# +# Processor Type +# +CONFIG_CPU_V6=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_32v6=y +CONFIG_CPU_ABRT_EV6=y +CONFIG_CPU_PABRT_V6=y +CONFIG_CPU_CACHE_V6=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V6=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_ARM_L1_CACHE_SHIFT=5 +# CONFIG_ARM_ERRATA_411920 is not set +CONFIG_ARM_VIC=y +CONFIG_ARM_VIC_NR=2 + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +CONFIG_HZ=200 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +# CONFIG_HIGHMEM is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=999999 +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_VIRT_TO_BUS=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_UACCESS_WITH_MEMCPY is not set + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0 +CONFIG_ZBOOT_ROM_BSS=0 +CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# CPU Power Management +# +# CONFIG_CPU_IDLE is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set +# CONFIG_VFP is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_HAVE_AOUT=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +# CONFIG_PM is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# CONFIG_NET is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +# CONFIG_DEVTMPFS is not set +CONFIG_STANDALONE=y +# CONFIG_PREVENT_FIRMWARE_BUILD is not set +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_MTD is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set + +# +# DRBD disabled because PROC_FS, INET or CONNECTOR not selected +# +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=8192 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_MG_DISK is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +CONFIG_CHR_DEV_SG=y +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_LIBFC is not set +# CONFIG_LIBFCOE is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set +# CONFIG_INPUT_SPARSEKMAP is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_W90X900 is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_RAW is not set +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +# CONFIG_SERIAL_8250_CONSOLE is not set +CONFIG_SERIAL_8250_NR_UARTS=3 +CONFIG_SERIAL_8250_RUNTIME_UARTS=3 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_SAMSUNG=y +CONFIG_SERIAL_SAMSUNG_UARTS=3 +# CONFIG_SERIAL_SAMSUNG_DEBUG is not set +CONFIG_SERIAL_SAMSUNG_CONSOLE=y +CONFIG_SERIAL_S5PV210=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set + +# +# PPS support +# +# CONFIG_PPS is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_GPIO_SYSFS is not set + +# +# Memory mapped GPIO expanders: +# + +# +# I2C GPIO expanders: +# + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# + +# +# AC97 GPIO expanders: +# +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_WATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set +# CONFIG_REGULATOR is not set +# CONFIG_MEDIA_SUPPORT is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +# CONFIG_SOUND is not set +# CONFIG_HID_SUPPORT is not set +# CONFIG_USB_SUPPORT is not set +# CONFIG_MMC is not set +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set +# CONFIG_DMADEVICES is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set + +# +# TI VLYNQ +# +# CONFIG_STAGING is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set +CONFIG_GENERIC_ACL=y + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_CRAMFS=y +# CONFIG_SQUASHFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +CONFIG_ROMFS_FS=y +CONFIG_ROMFS_BACKED_BY_BLOCK=y +# CONFIG_ROMFS_BACKED_BY_MTD is not set +# CONFIG_ROMFS_BACKED_BY_BOTH is not set +CONFIG_ROMFS_ON_BLOCK=y +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_BSD_DISKLABEL=y +# CONFIG_MINIX_SUBPARTITION is not set +CONFIG_SOLARIS_X86_PARTITION=y +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +CONFIG_MAGIC_SYSRQ=y +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +CONFIG_DETECT_HUNG_TASK=y +# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 +CONFIG_SCHED_DEBUG=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +# CONFIG_DEBUG_KMEMLEAK is not set +CONFIG_DEBUG_RT_MUTEXES=y +CONFIG_DEBUG_PI_LIST=y +# CONFIG_RT_MUTEX_TESTER is not set +CONFIG_DEBUG_SPINLOCK=y +CONFIG_DEBUG_MUTEXES=y +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +CONFIG_DEBUG_SPINLOCK_SLEEP=y +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +CONFIG_DEBUG_MEMORY_INIT=y +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_DEBUG_CREDENTIALS is not set +CONFIG_FRAME_POINTER=y +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_SYSCTL_SYSCALL_CHECK=y +# CONFIG_PAGE_POISONING is not set +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_TRACING_SUPPORT=y +CONFIG_FTRACE=y +# CONFIG_FUNCTION_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_ENABLE_DEFAULT_TRACERS is not set +# CONFIG_BOOT_TRACER is not set +CONFIG_BRANCH_PROFILE_NONE=y +# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set +# CONFIG_PROFILE_ALL_BRANCHES is not set +# CONFIG_STACK_TRACER is not set +# CONFIG_KMEMTRACE is not set +# CONFIG_WORKQUEUE_TRACER is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +# CONFIG_ARM_UNWIND is not set +CONFIG_DEBUG_USER=y +CONFIG_DEBUG_ERRORS=y +# CONFIG_DEBUG_STACK_USAGE is not set +CONFIG_DEBUG_LL=y +# CONFIG_EARLY_PRINTK is not set +# CONFIG_DEBUG_ICEDCC is not set +# CONFIG_OC_ETM is not set +CONFIG_DEBUG_S3C_UART=1 + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +# CONFIG_DEFAULT_SECURITY_SELINUX is not set +# CONFIG_DEFAULT_SECURITY_SMACK is not set +# CONFIG_DEFAULT_SECURITY_TOMOYO is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" +# CONFIG_CRYPTO is not set +# CONFIG_BINARY_PRINTF is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_GENERIC_FIND_LAST_BIT=y +CONFIG_CRC_CCITT=y +# CONFIG_CRC16 is not set +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_DECOMPRESS_LZO=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/s5pc110_defconfig b/arch/arm/configs/s5pc110_defconfig new file mode 100644 index 00000000000..6ea636131ac --- /dev/null +++ b/arch/arm/configs/s5pc110_defconfig @@ -0,0 +1,894 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.33-rc4 +# Wed Feb 24 15:36:54 2010 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_NO_IOPORT=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_ARM_L1_CACHE_SHIFT_6=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_CONSTRUCTORS=y + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_LZO=y +CONFIG_KERNEL_GZIP=y +# CONFIG_KERNEL_BZIP2 is not set +# CONFIG_KERNEL_LZMA is not set +# CONFIG_KERNEL_LZO is not set +CONFIG_SWAP=y +# CONFIG_SYSVIPC is not set +# CONFIG_BSD_PROCESS_ACCT is not set + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +# CONFIG_TREE_PREEMPT_RCU is not set +# CONFIG_TINY_RCU is not set +# CONFIG_RCU_TRACE is not set +CONFIG_RCU_FANOUT=32 +# CONFIG_RCU_FANOUT_EXACT is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=17 +# CONFIG_GROUP_SCHED is not set +# CONFIG_CGROUPS is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_RD_LZO=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +# CONFIG_EMBEDDED is not set +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y + +# +# Kernel Performance Events And Counters +# +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +CONFIG_COMPAT_BRK=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_CLK=y + +# +# GCOV-based kernel profiling +# +# CONFIG_SLOW_WORK is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_BLOCK=y +CONFIG_LBDAF=y +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +# CONFIG_INLINE_SPIN_TRYLOCK is not set +# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK is not set +# CONFIG_INLINE_SPIN_LOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK_IRQ is not set +# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set +# CONFIG_INLINE_SPIN_UNLOCK is not set +# CONFIG_INLINE_SPIN_UNLOCK_BH is not set +# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set +# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_READ_TRYLOCK is not set +# CONFIG_INLINE_READ_LOCK is not set +# CONFIG_INLINE_READ_LOCK_BH is not set +# CONFIG_INLINE_READ_LOCK_IRQ is not set +# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set +# CONFIG_INLINE_READ_UNLOCK is not set +# CONFIG_INLINE_READ_UNLOCK_BH is not set +# CONFIG_INLINE_READ_UNLOCK_IRQ is not set +# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_WRITE_TRYLOCK is not set +# CONFIG_INLINE_WRITE_LOCK is not set +# CONFIG_INLINE_WRITE_LOCK_BH is not set +# CONFIG_INLINE_WRITE_LOCK_IRQ is not set +# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set +# CONFIG_INLINE_WRITE_UNLOCK is not set +# CONFIG_INLINE_WRITE_UNLOCK_BH is not set +# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set +# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set +# CONFIG_MUTEX_SPIN_ON_OWNER is not set +# CONFIG_FREEZER is not set + +# +# System Type +# +CONFIG_MMU=y +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_GEMINI is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_STMP3XXX is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_NOMADIK is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_DOVE is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_W90X900 is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_MSM is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_S5P6440 is not set +# CONFIG_ARCH_S5P6442 is not set +# CONFIG_ARCH_S5PC1XX is not set +CONFIG_ARCH_S5PV210=y +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_U300 is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_BCMRING is not set +# CONFIG_ARCH_U8500 is not set +CONFIG_PLAT_SAMSUNG=y + +# +# Boot options +# +# CONFIG_S3C_BOOT_ERROR_RESET is not set +CONFIG_S3C_BOOT_UART_FORCE_FIFO=y +CONFIG_S3C_LOWLEVEL_UART_PORT=1 +CONFIG_SAMSUNG_CLKSRC=y +CONFIG_SAMSUNG_IRQ_VIC_TIMER=y +CONFIG_SAMSUNG_IRQ_UART=y +CONFIG_SAMSUNG_GPIOLIB_4BIT=y +CONFIG_S3C_GPIO_CFG_S3C24XX=y +CONFIG_S3C_GPIO_CFG_S3C64XX=y +CONFIG_S3C_GPIO_PULL_UPDOWN=y +CONFIG_SAMSUNG_GPIO_EXTRA=0 +CONFIG_S3C_GPIO_SPACE=0 +CONFIG_S3C_GPIO_TRACK=y +# CONFIG_S3C_ADC is not set + +# +# Power management +# +CONFIG_PLAT_S5P=y +CONFIG_CPU_S5PV210=y +# CONFIG_MACH_SMDKV210 is not set +CONFIG_MACH_SMDKC110=y + +# +# Processor Type +# +CONFIG_CPU_32v6K=y +CONFIG_CPU_V7=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_PABRT_V7=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_ARM_THUMBEE is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_HAS_TLS_REG=y +CONFIG_ARM_L1_CACHE_SHIFT=6 +# CONFIG_ARM_ERRATA_430973 is not set +# CONFIG_ARM_ERRATA_458693 is not set +# CONFIG_ARM_ERRATA_460075 is not set +CONFIG_ARM_VIC=y +CONFIG_ARM_VIC_NR=2 + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +# CONFIG_VMSPLIT_3G is not set +CONFIG_VMSPLIT_2G=y +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0x80000000 +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREEMPT=y +CONFIG_HZ=200 +# CONFIG_THUMB2_KERNEL is not set +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +# CONFIG_HIGHMEM is not set +CONFIG_SELECT_MEMORY_MODEL=y +# CONFIG_FLATMEM_MANUAL is not set +# CONFIG_DISCONTIGMEM_MANUAL is not set +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_HAVE_MEMORY_PRESENT=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPLIT_PTLOCK_CPUS=999999 +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_VIRT_TO_BUS=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_UACCESS_WITH_MEMCPY is not set + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0 +CONFIG_ZBOOT_ROM_BSS=0 +CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# CPU Power Management +# +# CONFIG_CPU_IDLE is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +# CONFIG_FPE_NWFPE is not set +# CONFIG_FPE_FASTFPE is not set +CONFIG_VFP=y +CONFIG_VFPv3=y +CONFIG_NEON=y + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_HAVE_AOUT=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +# CONFIG_PM is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# CONFIG_NET is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +# CONFIG_DEVTMPFS is not set +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_MTD is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set + +# +# DRBD disabled because PROC_FS, INET or CONNECTOR not selected +# +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=8192 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_MG_DISK is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +CONFIG_CHR_DEV_SG=y +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_LIBFC is not set +# CONFIG_LIBFCOE is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set +# CONFIG_INPUT_SPARSEKMAP is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_W90X900 is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_RAW is not set +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +# CONFIG_SERIAL_8250_CONSOLE is not set +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_SAMSUNG=y +CONFIG_SERIAL_SAMSUNG_UARTS_4=y +CONFIG_SERIAL_SAMSUNG_UARTS=4 +# CONFIG_SERIAL_SAMSUNG_DEBUG is not set +CONFIG_SERIAL_SAMSUNG_CONSOLE=y +CONFIG_SERIAL_S5PV210=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set + +# +# PPS support +# +# CONFIG_PPS is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_GPIO_SYSFS is not set + +# +# Memory mapped GPIO expanders: +# + +# +# I2C GPIO expanders: +# + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# + +# +# AC97 GPIO expanders: +# +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_WATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set +# CONFIG_REGULATOR is not set +# CONFIG_MEDIA_SUPPORT is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +# CONFIG_SOUND is not set +# CONFIG_HID_SUPPORT is not set +# CONFIG_USB_SUPPORT is not set +# CONFIG_MMC is not set +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set +# CONFIG_DMADEVICES is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set + +# +# TI VLYNQ +# +# CONFIG_STAGING is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set +CONFIG_GENERIC_ACL=y + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_CRAMFS=y +# CONFIG_SQUASHFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +CONFIG_ROMFS_FS=y +CONFIG_ROMFS_BACKED_BY_BLOCK=y +# CONFIG_ROMFS_BACKED_BY_MTD is not set +# CONFIG_ROMFS_BACKED_BY_BOTH is not set +CONFIG_ROMFS_ON_BLOCK=y +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_BSD_DISKLABEL=y +# CONFIG_MINIX_SUBPARTITION is not set +CONFIG_SOLARIS_X86_PARTITION=y +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +CONFIG_MAGIC_SYSRQ=y +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +CONFIG_DETECT_HUNG_TASK=y +# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 +CONFIG_SCHED_DEBUG=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_PREEMPT is not set +CONFIG_DEBUG_RT_MUTEXES=y +CONFIG_DEBUG_PI_LIST=y +# CONFIG_RT_MUTEX_TESTER is not set +CONFIG_DEBUG_SPINLOCK=y +CONFIG_DEBUG_MUTEXES=y +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +CONFIG_DEBUG_SPINLOCK_SLEEP=y +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +CONFIG_DEBUG_MEMORY_INIT=y +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_DEBUG_CREDENTIALS is not set +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_SYSCTL_SYSCALL_CHECK=y +# CONFIG_PAGE_POISONING is not set +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_TRACING_SUPPORT=y +CONFIG_FTRACE=y +# CONFIG_FUNCTION_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_ENABLE_DEFAULT_TRACERS is not set +# CONFIG_BOOT_TRACER is not set +CONFIG_BRANCH_PROFILE_NONE=y +# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set +# CONFIG_PROFILE_ALL_BRANCHES is not set +# CONFIG_STACK_TRACER is not set +# CONFIG_KMEMTRACE is not set +# CONFIG_WORKQUEUE_TRACER is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +CONFIG_ARM_UNWIND=y +CONFIG_DEBUG_USER=y +CONFIG_DEBUG_ERRORS=y +# CONFIG_DEBUG_STACK_USAGE is not set +CONFIG_DEBUG_LL=y +CONFIG_EARLY_PRINTK=y +# CONFIG_DEBUG_ICEDCC is not set +# CONFIG_OC_ETM is not set +CONFIG_DEBUG_S3C_UART=1 + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +# CONFIG_DEFAULT_SECURITY_SELINUX is not set +# CONFIG_DEFAULT_SECURITY_SMACK is not set +# CONFIG_DEFAULT_SECURITY_TOMOYO is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" +# CONFIG_CRYPTO is not set +# CONFIG_BINARY_PRINTF is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_GENERIC_FIND_LAST_BIT=y +CONFIG_CRC_CCITT=y +# CONFIG_CRC16 is not set +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_DECOMPRESS_LZO=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/s5pv210_defconfig b/arch/arm/configs/s5pv210_defconfig new file mode 100644 index 00000000000..3f7d47491b5 --- /dev/null +++ b/arch/arm/configs/s5pv210_defconfig @@ -0,0 +1,894 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.33-rc4 +# Wed Feb 24 15:36:16 2010 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_NO_IOPORT=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_ARM_L1_CACHE_SHIFT_6=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_CONSTRUCTORS=y + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_LZO=y +CONFIG_KERNEL_GZIP=y +# CONFIG_KERNEL_BZIP2 is not set +# CONFIG_KERNEL_LZMA is not set +# CONFIG_KERNEL_LZO is not set +CONFIG_SWAP=y +# CONFIG_SYSVIPC is not set +# CONFIG_BSD_PROCESS_ACCT is not set + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +# CONFIG_TREE_PREEMPT_RCU is not set +# CONFIG_TINY_RCU is not set +# CONFIG_RCU_TRACE is not set +CONFIG_RCU_FANOUT=32 +# CONFIG_RCU_FANOUT_EXACT is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=17 +# CONFIG_GROUP_SCHED is not set +# CONFIG_CGROUPS is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_RD_LZO=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +# CONFIG_EMBEDDED is not set +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y + +# +# Kernel Performance Events And Counters +# +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +CONFIG_COMPAT_BRK=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_CLK=y + +# +# GCOV-based kernel profiling +# +# CONFIG_SLOW_WORK is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_BLOCK=y +CONFIG_LBDAF=y +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +# CONFIG_INLINE_SPIN_TRYLOCK is not set +# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK is not set +# CONFIG_INLINE_SPIN_LOCK_BH is not set +# CONFIG_INLINE_SPIN_LOCK_IRQ is not set +# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set +# CONFIG_INLINE_SPIN_UNLOCK is not set +# CONFIG_INLINE_SPIN_UNLOCK_BH is not set +# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set +# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_READ_TRYLOCK is not set +# CONFIG_INLINE_READ_LOCK is not set +# CONFIG_INLINE_READ_LOCK_BH is not set +# CONFIG_INLINE_READ_LOCK_IRQ is not set +# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set +# CONFIG_INLINE_READ_UNLOCK is not set +# CONFIG_INLINE_READ_UNLOCK_BH is not set +# CONFIG_INLINE_READ_UNLOCK_IRQ is not set +# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set +# CONFIG_INLINE_WRITE_TRYLOCK is not set +# CONFIG_INLINE_WRITE_LOCK is not set +# CONFIG_INLINE_WRITE_LOCK_BH is not set +# CONFIG_INLINE_WRITE_LOCK_IRQ is not set +# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set +# CONFIG_INLINE_WRITE_UNLOCK is not set +# CONFIG_INLINE_WRITE_UNLOCK_BH is not set +# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set +# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set +# CONFIG_MUTEX_SPIN_ON_OWNER is not set +# CONFIG_FREEZER is not set + +# +# System Type +# +CONFIG_MMU=y +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_GEMINI is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_STMP3XXX is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_NOMADIK is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_DOVE is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_W90X900 is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_MSM is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_S5P6440 is not set +# CONFIG_ARCH_S5P6442 is not set +# CONFIG_ARCH_S5PC1XX is not set +CONFIG_ARCH_S5PV210=y +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_U300 is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_BCMRING is not set +# CONFIG_ARCH_U8500 is not set +CONFIG_PLAT_SAMSUNG=y + +# +# Boot options +# +# CONFIG_S3C_BOOT_ERROR_RESET is not set +CONFIG_S3C_BOOT_UART_FORCE_FIFO=y +CONFIG_S3C_LOWLEVEL_UART_PORT=1 +CONFIG_SAMSUNG_CLKSRC=y +CONFIG_SAMSUNG_IRQ_VIC_TIMER=y +CONFIG_SAMSUNG_IRQ_UART=y +CONFIG_SAMSUNG_GPIOLIB_4BIT=y +CONFIG_S3C_GPIO_CFG_S3C24XX=y +CONFIG_S3C_GPIO_CFG_S3C64XX=y +CONFIG_S3C_GPIO_PULL_UPDOWN=y +CONFIG_SAMSUNG_GPIO_EXTRA=0 +CONFIG_S3C_GPIO_SPACE=0 +CONFIG_S3C_GPIO_TRACK=y +# CONFIG_S3C_ADC is not set + +# +# Power management +# +CONFIG_PLAT_S5P=y +CONFIG_CPU_S5PV210=y +CONFIG_MACH_SMDKV210=y +# CONFIG_MACH_SMDKC110 is not set + +# +# Processor Type +# +CONFIG_CPU_32v6K=y +CONFIG_CPU_V7=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_PABRT_V7=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_ARM_THUMBEE is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_HAS_TLS_REG=y +CONFIG_ARM_L1_CACHE_SHIFT=6 +# CONFIG_ARM_ERRATA_430973 is not set +# CONFIG_ARM_ERRATA_458693 is not set +# CONFIG_ARM_ERRATA_460075 is not set +CONFIG_ARM_VIC=y +CONFIG_ARM_VIC_NR=2 + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +# CONFIG_VMSPLIT_3G is not set +CONFIG_VMSPLIT_2G=y +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0x80000000 +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREEMPT=y +CONFIG_HZ=200 +# CONFIG_THUMB2_KERNEL is not set +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +# CONFIG_HIGHMEM is not set +CONFIG_SELECT_MEMORY_MODEL=y +# CONFIG_FLATMEM_MANUAL is not set +# CONFIG_DISCONTIGMEM_MANUAL is not set +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_HAVE_MEMORY_PRESENT=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPLIT_PTLOCK_CPUS=999999 +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_VIRT_TO_BUS=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_UACCESS_WITH_MEMCPY is not set + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0 +CONFIG_ZBOOT_ROM_BSS=0 +CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# CPU Power Management +# +# CONFIG_CPU_IDLE is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +# CONFIG_FPE_NWFPE is not set +# CONFIG_FPE_FASTFPE is not set +CONFIG_VFP=y +CONFIG_VFPv3=y +CONFIG_NEON=y + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_HAVE_AOUT=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +# CONFIG_PM is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# CONFIG_NET is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +# CONFIG_DEVTMPFS is not set +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_MTD is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set + +# +# DRBD disabled because PROC_FS, INET or CONNECTOR not selected +# +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=8192 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_MG_DISK is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +CONFIG_CHR_DEV_SG=y +# CONFIG_CHR_DEV_SCH is not set +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_LIBFC is not set +# CONFIG_LIBFCOE is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_DH is not set +# CONFIG_SCSI_OSD_INITIATOR is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set +# CONFIG_INPUT_SPARSEKMAP is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_W90X900 is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_RAW is not set +# CONFIG_SERIO_ALTERA_PS2 is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +# CONFIG_SERIAL_8250_CONSOLE is not set +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_SAMSUNG=y +CONFIG_SERIAL_SAMSUNG_UARTS_4=y +CONFIG_SERIAL_SAMSUNG_UARTS=4 +# CONFIG_SERIAL_SAMSUNG_DEBUG is not set +CONFIG_SERIAL_SAMSUNG_CONSOLE=y +CONFIG_SERIAL_S5PV210=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_HW_RANDOM_TIMERIOMEM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set + +# +# PPS support +# +# CONFIG_PPS is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_GPIO_SYSFS is not set + +# +# Memory mapped GPIO expanders: +# + +# +# I2C GPIO expanders: +# + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# + +# +# AC97 GPIO expanders: +# +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_WATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set +# CONFIG_REGULATOR is not set +# CONFIG_MEDIA_SUPPORT is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +# CONFIG_SOUND is not set +# CONFIG_HID_SUPPORT is not set +# CONFIG_USB_SUPPORT is not set +# CONFIG_MMC is not set +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set +# CONFIG_DMADEVICES is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set + +# +# TI VLYNQ +# +# CONFIG_STAGING is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set +CONFIG_GENERIC_ACL=y + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_CRAMFS=y +# CONFIG_SQUASHFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +CONFIG_ROMFS_FS=y +CONFIG_ROMFS_BACKED_BY_BLOCK=y +# CONFIG_ROMFS_BACKED_BY_MTD is not set +# CONFIG_ROMFS_BACKED_BY_BOTH is not set +CONFIG_ROMFS_ON_BLOCK=y +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_BSD_DISKLABEL=y +# CONFIG_MINIX_SUBPARTITION is not set +CONFIG_SOLARIS_X86_PARTITION=y +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +CONFIG_MAGIC_SYSRQ=y +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +CONFIG_DETECT_HUNG_TASK=y +# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 +CONFIG_SCHED_DEBUG=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_PREEMPT is not set +CONFIG_DEBUG_RT_MUTEXES=y +CONFIG_DEBUG_PI_LIST=y +# CONFIG_RT_MUTEX_TESTER is not set +CONFIG_DEBUG_SPINLOCK=y +CONFIG_DEBUG_MUTEXES=y +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +CONFIG_DEBUG_SPINLOCK_SLEEP=y +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +CONFIG_DEBUG_MEMORY_INIT=y +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_DEBUG_CREDENTIALS is not set +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_SYSCTL_SYSCALL_CHECK=y +# CONFIG_PAGE_POISONING is not set +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_TRACING_SUPPORT=y +CONFIG_FTRACE=y +# CONFIG_FUNCTION_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_ENABLE_DEFAULT_TRACERS is not set +# CONFIG_BOOT_TRACER is not set +CONFIG_BRANCH_PROFILE_NONE=y +# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set +# CONFIG_PROFILE_ALL_BRANCHES is not set +# CONFIG_STACK_TRACER is not set +# CONFIG_KMEMTRACE is not set +# CONFIG_WORKQUEUE_TRACER is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +CONFIG_ARM_UNWIND=y +CONFIG_DEBUG_USER=y +CONFIG_DEBUG_ERRORS=y +# CONFIG_DEBUG_STACK_USAGE is not set +CONFIG_DEBUG_LL=y +CONFIG_EARLY_PRINTK=y +# CONFIG_DEBUG_ICEDCC is not set +# CONFIG_OC_ETM is not set +CONFIG_DEBUG_S3C_UART=1 + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +# CONFIG_DEFAULT_SECURITY_SELINUX is not set +# CONFIG_DEFAULT_SECURITY_SMACK is not set +# CONFIG_DEFAULT_SECURITY_TOMOYO is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" +# CONFIG_CRYPTO is not set +# CONFIG_BINARY_PRINTF is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_GENERIC_FIND_LAST_BIT=y +CONFIG_CRC_CCITT=y +# CONFIG_CRC16 is not set +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_DECOMPRESS_LZO=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c index 63b753f56c6..0d8e043804c 100644 --- a/arch/arm/mach-s3c2410/dma.c +++ b/arch/arm/mach-s3c2410/dma.c @@ -21,7 +21,7 @@ #include <mach/dma.h> #include <plat/cpu.h> -#include <plat/dma-plat.h> +#include <plat/dma-s3c24xx.h> #include <plat/regs-serial.h> #include <mach/regs-gpio.h> diff --git a/arch/arm/plat-s3c24xx/include/plat/pm-core.h b/arch/arm/mach-s3c2410/include/mach/pm-core.h index fb45dd9adca..70a83b209e2 100644 --- a/arch/arm/plat-s3c24xx/include/plat/pm-core.h +++ b/arch/arm/mach-s3c2410/include/mach/pm-core.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c24xx/include/plat/pll.h +/* linux/arch/arm/mach-s3c2410/include/pm-core.h * * Copyright 2008 Simtec Electronics * Ben Dooks <ben@simtec.co.uk> diff --git a/arch/arm/mach-s3c2410/include/mach/regs-gpio.h b/arch/arm/mach-s3c2410/include/mach/regs-gpio.h index ebc85c6dadb..fd672f330bf 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-gpio.h +++ b/arch/arm/mach-s3c2410/include/mach/regs-gpio.h @@ -406,31 +406,31 @@ #define S3C2443_GPE5_SD1_CLK (0x02 << 10) #define S3C2400_GPE5_EINT5 (0x02 << 10) #define S3C2400_GPE5_TCLK1 (0x03 << 10) +#define S3C2443_GPE5_AC_BITCLK (0x03 << 10) #define S3C2410_GPE6_SDCMD (0x02 << 12) #define S3C2443_GPE6_SD1_CMD (0x02 << 12) -#define S3C2443_GPE6_AC_BITCLK (0x03 << 12) +#define S3C2443_GPE6_AC_SDI (0x03 << 12) #define S3C2400_GPE6_EINT6 (0x02 << 12) #define S3C2410_GPE7_SDDAT0 (0x02 << 14) #define S3C2443_GPE5_SD1_DAT0 (0x02 << 14) -#define S3C2443_GPE7_AC_SDI (0x03 << 14) +#define S3C2443_GPE7_AC_SDO (0x03 << 14) #define S3C2400_GPE7_EINT7 (0x02 << 14) #define S3C2410_GPE8_SDDAT1 (0x02 << 16) #define S3C2443_GPE8_SD1_DAT1 (0x02 << 16) -#define S3C2443_GPE8_AC_SDO (0x03 << 16) +#define S3C2443_GPE8_AC_SYNC (0x03 << 16) #define S3C2400_GPE8_nXDACK0 (0x02 << 16) #define S3C2410_GPE9_SDDAT2 (0x02 << 18) #define S3C2443_GPE9_SD1_DAT2 (0x02 << 18) -#define S3C2443_GPE9_AC_SYNC (0x03 << 18) +#define S3C2443_GPE9_AC_nRESET (0x03 << 18) #define S3C2400_GPE9_nXDACK1 (0x02 << 18) #define S3C2400_GPE9_nXBACK (0x03 << 18) #define S3C2410_GPE10_SDDAT3 (0x02 << 20) #define S3C2443_GPE10_SD1_DAT3 (0x02 << 20) -#define S3C2443_GPE10_AC_nRESET (0x03 << 20) #define S3C2400_GPE10_nXDREQ0 (0x02 << 20) #define S3C2410_GPE11_SPIMISO0 (0x02 << 22) diff --git a/arch/arm/plat-s3c/include/mach/timex.h b/arch/arm/mach-s3c2410/include/mach/timex.h index 2a425ed0a7e..fe9ca1ffd51 100644 --- a/arch/arm/plat-s3c/include/mach/timex.h +++ b/arch/arm/mach-s3c2410/include/mach/timex.h @@ -19,8 +19,6 @@ * for the time conversion functions to/from jiffies is acceptable. */ - #define CLOCK_TICK_RATE 12000000 - #endif /* __ASM_ARCH_TIMEX_H */ diff --git a/arch/arm/plat-s3c/include/mach/vmalloc.h b/arch/arm/mach-s3c2410/include/mach/vmalloc.h index bfd2ca6e307..315b0078a34 100644 --- a/arch/arm/plat-s3c/include/mach/vmalloc.h +++ b/arch/arm/mach-s3c2410/include/mach/vmalloc.h @@ -1,4 +1,4 @@ -/* arch/arm/plat-s3c/include/mach/vmalloc.h +/* arch/arm/mach-s3c2410/include/mach/vmalloc.h * * from arch/arm/mach-iop3xx/include/mach/vmalloc.h * diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c index f8d16fc10bc..e880524904e 100644 --- a/arch/arm/mach-s3c2412/dma.c +++ b/arch/arm/mach-s3c2412/dma.c @@ -20,7 +20,7 @@ #include <mach/dma.h> -#include <plat/dma-plat.h> +#include <plat/dma-s3c24xx.h> #include <plat/cpu.h> #include <plat/regs-serial.h> diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig index 80879358eb2..7f465265cf0 100644 --- a/arch/arm/mach-s3c2440/Kconfig +++ b/arch/arm/mach-s3c2440/Kconfig @@ -15,14 +15,67 @@ config CPU_S3C2440 help Support for S3C2440 Samsung Mobile CPU based systems. +config CPU_S3C2442 + bool + depends on ARCH_S3C2410 + select CPU_ARM920T + select S3C2410_CLOCK + select S3C2410_GPIO + select S3C2410_PM if PM + select CPU_S3C244X + select CPU_LLSERIAL_S3C2440 + help + Support for S3C2442 Samsung Mobile CPU based systems. + +config CPU_S3C244X + bool + depends on ARCH_S3C2410 && (CPU_S3C2440 || CPU_S3C2442) + help + Support for S3C2440 and S3C2442 Samsung Mobile CPU based systems. + + + +config S3C2440_CPUFREQ + bool "S3C2440/S3C2442 CPU Frequency scaling support" + depends on CPU_FREQ_S3C24XX && (CPU_S3C2440 || CPU_S3C2442) + select S3C2410_CPUFREQ_UTILS + default y + help + CPU Frequency scaling support for S3C2440 and S3C2442 SoC CPUs. + +config S3C2440_XTAL_12000000 + bool + help + Indicate that the build needs to support 12MHz system + crystal. + +config S3C2440_XTAL_16934400 + bool + help + Indicate that the build needs to support 16.9344MHz system + crystal. + +config S3C2440_PLL_12000000 + bool + depends on S3C2440_CPUFREQ && S3C2440_XTAL_12000000 + default y if CPU_FREQ_S3C24XX_PLL + help + PLL tables for S3C2440 or S3C2442 CPUs with 12MHz crystals. + +config S3C2440_PLL_16934400 + bool + depends on S3C2440_CPUFREQ && S3C2440_XTAL_16934400 + default y if CPU_FREQ_S3C24XX_PLL + help + PLL tables for S3C2440 or S3C2442 CPUs with 16.934MHz crystals. + config S3C2440_DMA bool depends on ARCH_S3C2410 && CPU_S3C24405B help Support for S3C2440 specific DMA code5A - -menu "S3C2440 Machines" +menu "S3C2440 and S3C2442 Machines" config MACH_ANUBIS bool "Simtec Electronics ANUBIS" @@ -37,6 +90,18 @@ config MACH_ANUBIS Say Y here if you are using the Simtec Electronics ANUBIS development system +config MACH_NEO1973_GTA02 + bool "Openmoko GTA02 / Freerunner phone" + select CPU_S3C2442 + select MFD_PCF50633 + select PCF50633_GPIO + select I2C + select POWER_SUPPLY + select MACH_NEO1973 + select S3C2410_PWM + help + Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone + config MACH_OSIRIS bool "Simtec IM2440D20 (OSIRIS) module" select CPU_S3C2440 @@ -94,11 +159,14 @@ config MACH_NEXCODER_2440 config SMDK2440_CPU2440 bool "SMDK2440 with S3C2440 CPU module" - depends on ARCH_S3C2440 default y if ARCH_S3C2440 select S3C2440_XTAL_16934400 select CPU_S3C2440 +config SMDK2440_CPU2442 + bool "SMDM2440 with S3C2442 CPU module" + select CPU_S3C2442 + config MACH_AT2440EVB bool "Avantech AT2440EVB development board" select CPU_S3C2440 diff --git a/arch/arm/mach-s3c2440/Makefile b/arch/arm/mach-s3c2440/Makefile index 5f322453188..c85ba32d895 100644 --- a/arch/arm/mach-s3c2440/Makefile +++ b/arch/arm/mach-s3c2440/Makefile @@ -10,10 +10,20 @@ obj-n := obj- := obj-$(CONFIG_CPU_S3C2440) += s3c2440.o dsc.o +obj-$(CONFIG_CPU_S3C2442) += s3c2442.o + obj-$(CONFIG_CPU_S3C2440) += irq.o obj-$(CONFIG_CPU_S3C2440) += clock.o obj-$(CONFIG_S3C2440_DMA) += dma.o +obj-$(CONFIG_CPU_S3C244X) += s3c244x.o +obj-$(CONFIG_CPU_S3C244X) += s3c244x-irq.o +obj-$(CONFIG_CPU_S3C244X) += s3c244x-clock.o +obj-$(CONFIG_S3C2440_CPUFREQ) += s3c2440-cpufreq.o + +obj-$(CONFIG_S3C2440_PLL_12000000) += s3c2440-pll-12000000.o +obj-$(CONFIG_S3C2440_PLL_16934400) += s3c2440-pll-16934400.o + # Machine support obj-$(CONFIG_MACH_ANUBIS) += mach-anubis.o @@ -23,6 +33,7 @@ obj-$(CONFIG_ARCH_S3C2440) += mach-smdk2440.o obj-$(CONFIG_MACH_NEXCODER_2440) += mach-nexcoder.o obj-$(CONFIG_MACH_AT2440EVB) += mach-at2440evb.o obj-$(CONFIG_MACH_MINI2440) += mach-mini2440.o +obj-$(CONFIG_MACH_NEO1973_GTA02) += mach-gta02.o # extra machine support diff --git a/arch/arm/mach-s3c2440/dma.c b/arch/arm/mach-s3c2440/dma.c index e08e081430f..3b0529f54e9 100644 --- a/arch/arm/mach-s3c2440/dma.c +++ b/arch/arm/mach-s3c2440/dma.c @@ -20,7 +20,7 @@ #include <mach/map.h> #include <mach/dma.h> -#include <plat/dma-plat.h> +#include <plat/dma-s3c24xx.h> #include <plat/cpu.h> #include <plat/regs-serial.h> diff --git a/arch/arm/mach-s3c2440/dsc.c b/arch/arm/mach-s3c2440/dsc.c index 55404427277..9ea66e31f62 100644 --- a/arch/arm/mach-s3c2440/dsc.c +++ b/arch/arm/mach-s3c2440/dsc.c @@ -28,7 +28,7 @@ #include <mach/regs-dsc.h> #include <plat/cpu.h> -#include <plat/s3c2440.h> +#include <plat/s3c244x.h> int s3c2440_set_dsc(unsigned int pin, unsigned int value) { diff --git a/arch/arm/mach-s3c2442/include/mach/gta02.h b/arch/arm/mach-s3c2440/include/mach/gta02.h index 953331d8d56..953331d8d56 100644 --- a/arch/arm/mach-s3c2442/include/mach/gta02.h +++ b/arch/arm/mach-s3c2440/include/mach/gta02.h diff --git a/arch/arm/mach-s3c2442/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c index 45799c608d8..45799c608d8 100644 --- a/arch/arm/mach-s3c2442/mach-gta02.c +++ b/arch/arm/mach-s3c2440/mach-gta02.c diff --git a/arch/arm/mach-s3c2440/mach-nexcoder.c b/arch/arm/mach-s3c2440/mach-nexcoder.c index 86a243b3e37..342041593f2 100644 --- a/arch/arm/mach-s3c2440/mach-nexcoder.c +++ b/arch/arm/mach-s3c2440/mach-nexcoder.c @@ -41,7 +41,7 @@ #include <plat/iic.h> #include <plat/s3c2410.h> -#include <plat/s3c2440.h> +#include <plat/s3c244x.h> #include <plat/clock.h> #include <plat/devs.h> #include <plat/cpu.h> diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c index df3e9a3be82..3ac3d636d61 100644 --- a/arch/arm/mach-s3c2440/mach-smdk2440.c +++ b/arch/arm/mach-s3c2440/mach-smdk2440.c @@ -40,7 +40,7 @@ #include <plat/iic.h> #include <plat/s3c2410.h> -#include <plat/s3c2440.h> +#include <plat/s3c244x.h> #include <plat/clock.h> #include <plat/devs.h> #include <plat/cpu.h> diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c index ac1f7ea5f40..2b68f7ea45a 100644 --- a/arch/arm/mach-s3c2440/s3c2440.c +++ b/arch/arm/mach-s3c2440/s3c2440.c @@ -29,9 +29,9 @@ #include <mach/hardware.h> #include <asm/irq.h> -#include <plat/s3c2440.h> #include <plat/devs.h> #include <plat/cpu.h> +#include <plat/s3c244x.h> static struct sys_device s3c2440_sysdev = { .cls = &s3c2440_sysclass, diff --git a/arch/arm/mach-s3c2442/clock.c b/arch/arm/mach-s3c2440/s3c2442.c index d9b692a1248..188ad1e57dc 100644 --- a/arch/arm/mach-s3c2442/clock.c +++ b/arch/arm/mach-s3c2440/s3c2442.c @@ -1,10 +1,10 @@ -/* linux/arch/arm/mach-s3c2442/clock.c +/* linux/arch/arm/mach-s3c2442/s3c2442.c * * Copyright (c) 2004-2005 Simtec Electronics * http://armlinux.simtec.co.uk/ * Ben Dooks <ben@simtec.co.uk> * - * S3C2442 Clock support + * S3C2442 core and lock support * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -151,3 +151,15 @@ static __init int s3c2442_clk_init(void) } arch_initcall(s3c2442_clk_init); + + +static struct sys_device s3c2442_sysdev = { + .cls = &s3c2442_sysclass, +}; + +int __init s3c2442_init(void) +{ + printk("S3C2442: Initialising architecture\n"); + + return sysdev_register(&s3c2442_sysdev); +} diff --git a/arch/arm/plat-s3c24xx/s3c244x-clock.c b/arch/arm/mach-s3c2440/s3c244x-clock.c index f8d96130d1d..f8d96130d1d 100644 --- a/arch/arm/plat-s3c24xx/s3c244x-clock.c +++ b/arch/arm/mach-s3c2440/s3c244x-clock.c diff --git a/arch/arm/plat-s3c24xx/s3c244x-irq.c b/arch/arm/mach-s3c2440/s3c244x-irq.c index a75c0c2431e..a75c0c2431e 100644 --- a/arch/arm/plat-s3c24xx/s3c244x-irq.c +++ b/arch/arm/mach-s3c2440/s3c244x-irq.c diff --git a/arch/arm/plat-s3c24xx/s3c244x.c b/arch/arm/mach-s3c2440/s3c244x.c index 12623a474b5..5e4a97e7653 100644 --- a/arch/arm/plat-s3c24xx/s3c244x.c +++ b/arch/arm/mach-s3c2440/s3c244x.c @@ -38,8 +38,7 @@ #include <mach/regs-dsc.h> #include <plat/s3c2410.h> -#include <plat/s3c2440.h> -#include "s3c244x.h" +#include <plat/s3c244x.h> #include <plat/clock.h> #include <plat/devs.h> #include <plat/cpu.h> diff --git a/arch/arm/mach-s3c2442/Kconfig b/arch/arm/mach-s3c2442/Kconfig deleted file mode 100644 index 8d3811852fc..00000000000 --- a/arch/arm/mach-s3c2442/Kconfig +++ /dev/null @@ -1,37 +0,0 @@ -# Copyright 2007 Simtec Electronics -# -# Licensed under GPLv2 - -config CPU_S3C2442 - bool - depends on ARCH_S3C2410 - select CPU_ARM920T - select S3C2410_CLOCK - select S3C2410_GPIO - select S3C2410_PM if PM - select CPU_S3C244X - select CPU_LLSERIAL_S3C2440 - help - Support for S3C2442 Samsung Mobile CPU based systems. - - -menu "S3C2442 Machines" - -config SMDK2440_CPU2442 - bool "SMDM2440 with S3C2442 CPU module" - depends on ARCH_S3C2440 - select CPU_S3C2442 - -config MACH_NEO1973_GTA02 - bool "Openmoko GTA02 / Freerunner phone" - select CPU_S3C2442 - select MFD_PCF50633 - select PCF50633_GPIO - select I2C - select POWER_SUPPLY - select MACH_NEO1973 - select S3C2410_PWM - help - Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone - -endmenu diff --git a/arch/arm/mach-s3c2442/Makefile b/arch/arm/mach-s3c2442/Makefile deleted file mode 100644 index 2a19113a576..00000000000 --- a/arch/arm/mach-s3c2442/Makefile +++ /dev/null @@ -1,18 +0,0 @@ -# arch/arm/mach-s3c2442/Makefile -# -# Copyright 2007 Simtec Electronics -# -# Licensed under GPLv2 - -obj-y := -obj-m := -obj-n := -obj- := - -obj-$(CONFIG_CPU_S3C2442) += s3c2442.o -obj-$(CONFIG_CPU_S3C2442) += clock.o - -obj-$(CONFIG_MACH_NEO1973_GTA02) += mach-gta02.o - -# Machine support - diff --git a/arch/arm/mach-s3c2442/s3c2442.c b/arch/arm/mach-s3c2442/s3c2442.c deleted file mode 100644 index 4663bdc7fff..00000000000 --- a/arch/arm/mach-s3c2442/s3c2442.c +++ /dev/null @@ -1,34 +0,0 @@ -/* linux/arch/arm/mach-s3c2442/s3c2442.c - * - * Copyright (c) 2006 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * Samsung S3C2442 Mobile CPU support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/serial_core.h> -#include <linux/sysdev.h> - -#include <plat/s3c2442.h> -#include <plat/cpu.h> - -static struct sys_device s3c2442_sysdev = { - .cls = &s3c2442_sysclass, -}; - -int __init s3c2442_init(void) -{ - printk("S3C2442: Initialising architecture\n"); - - return sysdev_register(&s3c2442_sysdev); -} diff --git a/arch/arm/mach-s3c2443/dma.c b/arch/arm/mach-s3c2443/dma.c index 397f3b5c0b4..3f658685ec1 100644 --- a/arch/arm/mach-s3c2443/dma.c +++ b/arch/arm/mach-s3c2443/dma.c @@ -20,7 +20,7 @@ #include <mach/dma.h> -#include <plat/dma-plat.h> +#include <plat/dma-s3c24xx.h> #include <plat/cpu.h> #include <plat/regs-serial.h> diff --git a/arch/arm/mach-s3c2443/mach-smdk2443.c b/arch/arm/mach-s3c2443/mach-smdk2443.c index 039a4624310..e2e362bda9b 100644 --- a/arch/arm/mach-s3c2443/mach-smdk2443.c +++ b/arch/arm/mach-s3c2443/mach-smdk2443.c @@ -40,7 +40,7 @@ #include <plat/iic.h> #include <plat/s3c2410.h> -#include <plat/s3c2440.h> +#include <plat/s3c2443.h> #include <plat/clock.h> #include <plat/devs.h> #include <plat/cpu.h> @@ -106,6 +106,9 @@ static struct platform_device *smdk2443_devices[] __initdata = { &s3c_device_wdt, &s3c_device_i2c0, &s3c_device_hsmmc0, +#ifdef CONFIG_SND_SOC_SMDK2443_WM9710 + &s3c_device_ac97, +#endif }; static void __init smdk2443_map_io(void) @@ -118,6 +121,11 @@ static void __init smdk2443_map_io(void) static void __init smdk2443_machine_init(void) { s3c_i2c0_set_platdata(NULL); + +#ifdef CONFIG_SND_SOC_SMDK2443_WM9710 + s3c24xx_ac97_setup_gpio(S3C24XX_AC97_GPE0); +#endif + platform_add_devices(smdk2443_devices, ARRAY_SIZE(smdk2443_devices)); smdk_machine_init(); } diff --git a/arch/arm/plat-s3c/include/mach/io.h b/arch/arm/mach-s3c24a0/include/mach/io.h index f6a53631b66..4326c30fabc 100644 --- a/arch/arm/plat-s3c/include/mach/io.h +++ b/arch/arm/mach-s3c24a0/include/mach/io.h @@ -1,9 +1,9 @@ -/* arch/arm/plat-s3c/include/mach/io.h +/* arch/arm/mach-s3c24a0/include/mach/io.h * * Copyright 2008 Simtec Electronics * Ben Dooks <ben-linux@fluff.org> * - * Default IO routines for plat-s3c based systems, such as S3C24A0 + * Default IO routines for S3C24A0 */ #ifndef __ASM_ARM_ARCH_IO_H diff --git a/arch/arm/mach-s3c6400/Kconfig b/arch/arm/mach-s3c6400/Kconfig deleted file mode 100644 index a250bf68709..00000000000 --- a/arch/arm/mach-s3c6400/Kconfig +++ /dev/null @@ -1,30 +0,0 @@ -# Copyright 2008 Openmoko, Inc. -# Simtec Electronics, Ben Dooks <ben@simtec.co.uk> -# -# Licensed under GPLv2 - -# Configuration options for the S3C6410 CPU - -config CPU_S3C6400 - bool - select CPU_S3C6400_INIT - select CPU_S3C6400_CLOCK - help - Enable S3C6400 CPU support - -config S3C6400_SETUP_SDHCI - bool - help - Internal configuration for default SDHCI - setup for S3C6400. - -# S36400 Macchine support - -config MACH_SMDK6400 - bool "SMDK6400" - select CPU_S3C6400 - select S3C_DEV_HSMMC - select S3C_DEV_NAND - select S3C6400_SETUP_SDHCI - help - Machine support for the Samsung SMDK6400 diff --git a/arch/arm/mach-s3c6400/Makefile b/arch/arm/mach-s3c6400/Makefile deleted file mode 100644 index df1ce4aa03e..00000000000 --- a/arch/arm/mach-s3c6400/Makefile +++ /dev/null @@ -1,23 +0,0 @@ -# arch/arm/mach-s3c6400/Makefile -# -# Copyright 2008 Openmoko, Inc. -# Copyright 2008 Simtec Electronics -# -# Licensed under GPLv2 - -obj-y := -obj-m := -obj-n := -obj- := - -# Core support for S3C6400 system - -obj-$(CONFIG_CPU_S3C6400) += s3c6400.o - -# setup support - -obj-$(CONFIG_S3C6400_SETUP_SDHCI) += setup-sdhci.o - -# Machine support - -obj-$(CONFIG_MACH_SMDK6400) += mach-smdk6400.o diff --git a/arch/arm/mach-s3c6400/include/mach/dma.h b/arch/arm/mach-s3c6400/include/mach/dma.h deleted file mode 100644 index 6723860748b..00000000000 --- a/arch/arm/mach-s3c6400/include/mach/dma.h +++ /dev/null @@ -1,70 +0,0 @@ -/* linux/arch/arm/mach-s3c6400/include/mach/dma.h - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * S3C6400 - DMA support - */ - -#ifndef __ASM_ARCH_DMA_H -#define __ASM_ARCH_DMA_H __FILE__ - -#define S3C_DMA_CHANNELS (16) - -/* see mach-s3c2410/dma.h for notes on dma channel numbers */ - -/* Note, for the S3C64XX architecture we keep the DMACH_ - * defines in the order they are allocated to [S]DMA0/[S]DMA1 - * so that is easy to do DHACH_ -> DMA controller conversion - */ -enum dma_ch { - /* DMA0/SDMA0 */ - DMACH_UART0 = 0, - DMACH_UART0_SRC2, - DMACH_UART1, - DMACH_UART1_SRC2, - DMACH_UART2, - DMACH_UART2_SRC2, - DMACH_UART3, - DMACH_UART3_SRC2, - DMACH_PCM0_TX, - DMACH_PCM0_RX, - DMACH_I2S0_OUT, - DMACH_I2S0_IN, - DMACH_SPI0_TX, - DMACH_SPI0_RX, - DMACH_HSI_I2SV40_TX, - DMACH_HSI_I2SV40_RX, - - /* DMA1/SDMA1 */ - DMACH_PCM1_TX = 16, - DMACH_PCM1_RX, - DMACH_I2S1_OUT, - DMACH_I2S1_IN, - DMACH_SPI1_TX, - DMACH_SPI1_RX, - DMACH_AC97_PCMOUT, - DMACH_AC97_PCMIN, - DMACH_AC97_MICIN, - DMACH_PWM, - DMACH_IRDA, - DMACH_EXTERNAL, - DMACH_RES1, - DMACH_RES2, - DMACH_SECURITY_RX, /* SDMA1 only */ - DMACH_SECURITY_TX, /* SDMA1 only */ - DMACH_MAX /* the end */ -}; - -static __inline__ bool s3c_dma_has_circular(void) -{ - return true; -} - -#define S3C2410_DMAF_CIRCULAR (1 << 0) - -#include <plat/dma.h> - -#endif /* __ASM_ARCH_IRQ_H */ diff --git a/arch/arm/mach-s3c6400/include/mach/irqs.h b/arch/arm/mach-s3c6400/include/mach/irqs.h deleted file mode 100644 index 4c97f9a4370..00000000000 --- a/arch/arm/mach-s3c6400/include/mach/irqs.h +++ /dev/null @@ -1,16 +0,0 @@ -/* linux/arch/arm/mach-s3c6400/include/mach/irqs.h - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * S3C6400 - IRQ definitions - */ - -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H __FILE__ - -#include <plat/irqs.h> - -#endif /* __ASM_ARCH_IRQ_H */ diff --git a/arch/arm/mach-s3c6400/include/mach/regs-clock.h b/arch/arm/mach-s3c6400/include/mach/regs-clock.h deleted file mode 100644 index a6c7f4eb3a1..00000000000 --- a/arch/arm/mach-s3c6400/include/mach/regs-clock.h +++ /dev/null @@ -1,16 +0,0 @@ -/* linux/arch/arm/mach-s3c6400/include/mach/regs-clock.h - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks <ben@simtec.co.uk> - * - * S3C64XX - clock register compatibility with s3c24xx - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <plat/regs-clock.h> - diff --git a/arch/arm/mach-s3c6410/Makefile b/arch/arm/mach-s3c6410/Makefile deleted file mode 100644 index 3e48c3dbf97..00000000000 --- a/arch/arm/mach-s3c6410/Makefile +++ /dev/null @@ -1,26 +0,0 @@ -# arch/arm/plat-s3c6410/Makefile -# -# Copyright 2008 Openmoko, Inc. -# Copyright 2008 Simtec Electronics -# -# Licensed under GPLv2 - -obj-y := -obj-m := -obj-n := -obj- := - -# Core support for S3C6410 system - -obj-$(CONFIG_CPU_S3C6410) += cpu.o - -# Helper and device support - -obj-$(CONFIG_S3C6410_SETUP_SDHCI) += setup-sdhci.o - -# machine support - -obj-$(CONFIG_MACH_ANW6410) += mach-anw6410.o -obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o -obj-$(CONFIG_MACH_NCP) += mach-ncp.o -obj-$(CONFIG_MACH_HMT) += mach-hmt.o diff --git a/arch/arm/mach-s3c6410/setup-sdhci.c b/arch/arm/mach-s3c6410/setup-sdhci.c deleted file mode 100644 index 816d2d9f9ef..00000000000 --- a/arch/arm/mach-s3c6410/setup-sdhci.c +++ /dev/null @@ -1,68 +0,0 @@ -/* linux/arch/arm/mach-s3c6410/setup-sdhci.c - * - * Copyright 2008 Simtec Electronics - * Copyright 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/platform_device.h> -#include <linux/io.h> - -#include <linux/mmc/card.h> -#include <linux/mmc/host.h> - -#include <plat/regs-sdhci.h> -#include <plat/sdhci.h> - -/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ - -char *s3c6410_hsmmc_clksrcs[4] = { - [0] = "hsmmc", - [1] = "hsmmc", - [2] = "mmc_bus", - /* [3] = "48m", - note not successfully used yet */ -}; - - -void s3c6410_setup_sdhci0_cfg_card(struct platform_device *dev, - void __iomem *r, - struct mmc_ios *ios, - struct mmc_card *card) -{ - u32 ctrl2, ctrl3; - - /* don't need to alter anything acording to card-type */ - - writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4); - - ctrl2 = readl(r + S3C_SDHCI_CONTROL2); - ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK; - ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR | - S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK | - S3C_SDHCI_CTRL2_ENFBCLKRX | - S3C_SDHCI_CTRL2_DFCNT_NONE | - S3C_SDHCI_CTRL2_ENCLKOUTHOLD); - - if (ios->clock < 25 * 1000000) - ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 | - S3C_SDHCI_CTRL3_FCSEL2 | - S3C_SDHCI_CTRL3_FCSEL1 | - S3C_SDHCI_CTRL3_FCSEL0); - else - ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0); - - printk(KERN_INFO "%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3); - writel(ctrl2, r + S3C_SDHCI_CONTROL2); - writel(ctrl3, r + S3C_SDHCI_CONTROL3); -} - diff --git a/arch/arm/mach-s3c6410/Kconfig b/arch/arm/mach-s3c64xx/Kconfig index 162f4561f80..959df3840de 100644 --- a/arch/arm/mach-s3c6410/Kconfig +++ b/arch/arm/mach-s3c64xx/Kconfig @@ -1,22 +1,78 @@ # Copyright 2008 Openmoko, Inc. -# Copyright 2008 Simtec Electronics +# Simtec Electronics, Ben Dooks <ben@simtec.co.uk> # # Licensed under GPLv2 +# temporary until we can eliminate all drivers using it. +config PLAT_S3C64XX + bool + depends on ARCH_S3C64XX + default y + help + Base platform code for any Samsung S3C64XX device + + # Configuration options for the S3C6410 CPU +config CPU_S3C6400 + bool + help + Enable S3C6400 CPU support + config CPU_S3C6410 bool - select CPU_S3C6400_INIT - select CPU_S3C6400_CLOCK help Enable S3C6410 CPU support -config S3C6410_SETUP_SDHCI - bool +config S3C64XX_DMA + bool "S3C64XX DMA" + select S3C_DMA + +config S3C64XX_SETUP_SDHCI select S3C64XX_SETUP_SDHCI_GPIO + bool help - Internal helper functions for S3C6410 based SDHCI systems + Internal configuration for default SDHCI setup for S3C6400 and + S3C6410 SoCs. + +# platform specific device setup + +config S3C64XX_SETUP_I2C0 + bool + default y + help + Common setup code for i2c bus 0. + + Note, currently since i2c0 is always compiled, this setup helper + is always compiled with it. + +config S3C64XX_SETUP_I2C1 + bool + help + Common setup code for i2c bus 1. + +config S3C64XX_SETUP_FB_24BPP + bool + help + Common setup code for S3C64XX with an 24bpp RGB display helper. + +config S3C64XX_SETUP_SDHCI_GPIO + bool + help + Common setup code for S3C64XX SDHCI GPIO configurations + +# S36400 Macchine support + +config MACH_SMDK6400 + bool "SMDK6400" + select CPU_S3C6400 + select S3C_DEV_HSMMC + select S3C_DEV_NAND + select S3C64XX_SETUP_SDHCI + help + Machine support for the Samsung SMDK6400 + +# S3C6410 machine support config MACH_ANW6410 bool "A&W6410" @@ -35,7 +91,7 @@ config MACH_SMDK6410 select S3C_DEV_FB select S3C_DEV_USB_HOST select S3C_DEV_USB_HSOTG - select S3C6410_SETUP_SDHCI + select S3C64XX_SETUP_SDHCI select S3C64XX_SETUP_I2C1 select S3C64XX_SETUP_FB_24BPP help @@ -58,7 +114,7 @@ config SMDK6410_SD_CH0 at least some SMDK6410 boards come with the resistors fitted so that the card detects for channels 0 and 1 are the same. - + config SMDK6410_SD_CH1 bool "Use channel 1 only" depends on MACH_SMDK6410 @@ -88,6 +144,21 @@ config SMDK6410_WM1190_EV1 detected at runtime so the the resulting kernel can be used with or without the 1190-EV1 fitted. +config SMDK6410_WM1192_EV1 + bool "Support Wolfson Microelectronics 1192-EV1 PMIC card" + depends on MACH_SMDK6410 + select REGULATOR + select REGULATOR_WM831X + select S3C24XX_GPIO_EXTRA64 + select MFD_WM831X + help + The Wolfson Microelectronics 1192-EV1 is a WM831x based PMIC + daughtercard for the Samsung SMDK6410 reference platform. + Enabling this option will build support for this module into + the kernel. The presence of the daughtercard will be + detected at runtime so the the resulting kernel can be used + with or without the 1192-EV1 fitted. + config MACH_NCP bool "NCP" select CPU_S3C6410 diff --git a/arch/arm/plat-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile index 80255a5e178..d1d341a14f7 100644 --- a/arch/arm/plat-s3c64xx/Makefile +++ b/arch/arm/mach-s3c64xx/Makefile @@ -1,4 +1,4 @@ -# arch/arm/plat-s3c64xx/Makefile +# arch/arm/mach-s3c64xx/Makefile # # Copyright 2008 Openmoko, Inc. # Copyright 2008 Simtec Electronics @@ -7,44 +7,56 @@ obj-y := obj-m := -obj-n := dummy.o +obj-n := obj- := # Core files - -obj-y += dev-uart.o -obj-y += dev-rtc.o obj-y += cpu.o -obj-y += irq.o -obj-y += irq-eint.o obj-y += clock.o obj-y += gpiolib.o -# CPU support +# Core support for S3C6400 system -obj-$(CONFIG_CPU_S3C6400_INIT) += s3c6400-init.o -obj-$(CONFIG_CPU_S3C6400_CLOCK) += s3c6400-clock.o -obj-$(CONFIG_CPU_FREQ_S3C64XX) += cpufreq.o +obj-$(CONFIG_CPU_S3C6400) += s3c6400.o +obj-$(CONFIG_CPU_S3C6410) += s3c6410.o + +obj-y += irq.o +obj-y += irq-eint.o -# PM support +# CPU frequency scaling -obj-$(CONFIG_PM) += pm.o -obj-$(CONFIG_PM) += sleep.o -obj-$(CONFIG_PM) += irq-pm.o +obj-$(CONFIG_CPU_FREQ_S3C64XX) += cpufreq.o # DMA support obj-$(CONFIG_S3C64XX_DMA) += dma.o -# ADC support - -obj-$(CONFIG_S3C_ADC) += dev-adc.o - # Device setup obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o +obj-$(CONFIG_S3C64XX_SETUP_SDHCI) += setup-sdhci.o obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o -obj-$(CONFIG_SND_S3C24XX_SOC) += dev-audio.o -obj-$(CONFIG_SPI_S3C64XX) += dev-spi.o + +# PM + +obj-$(CONFIG_PM) += pm.o +obj-$(CONFIG_PM) += sleep.o +obj-$(CONFIG_PM) += irq-pm.o + +# Machine support + +obj-$(CONFIG_MACH_ANW6410) += mach-anw6410.o +obj-$(CONFIG_MACH_SMDK6400) += mach-smdk6400.o +obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o +obj-$(CONFIG_MACH_NCP) += mach-ncp.o +obj-$(CONFIG_MACH_HMT) += mach-hmt.o + +# device support + +obj-y += dev-uart.o +obj-y += dev-rtc.o +obj-$(CONFIG_S3C_ADC) += dev-adc.o +obj-$(CONFIG_SND_S3C24XX_SOC) += dev-audio.o +obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o diff --git a/arch/arm/mach-s3c6400/Makefile.boot b/arch/arm/mach-s3c64xx/Makefile.boot index ba41fdc0a58..ba41fdc0a58 100644 --- a/arch/arm/mach-s3c6400/Makefile.boot +++ b/arch/arm/mach-s3c64xx/Makefile.boot diff --git a/arch/arm/plat-s3c64xx/s3c6400-clock.c b/arch/arm/mach-s3c64xx/clock.c index cb2bf4bff05..2ac2e7d73e5 100644 --- a/arch/arm/plat-s3c64xx/s3c6400-clock.c +++ b/arch/arm/mach-s3c64xx/clock.c @@ -1,11 +1,11 @@ -/* linux/arch/arm/plat-s3c64xx/s3c6400-clock.c +/* linux/arch/arm/plat-s3c64xx/clock.c * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics * Ben Dooks <ben@simtec.co.uk> * http://armlinux.simtec.co.uk/ * - * S3C6400 based common clock support + * S3C64XX Base clock support * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -14,24 +14,24 @@ #include <linux/init.h> #include <linux/module.h> -#include <linux/kernel.h> -#include <linux/list.h> -#include <linux/errno.h> -#include <linux/err.h> +#include <linux/interrupt.h> +#include <linux/ioport.h> #include <linux/clk.h> -#include <linux/sysdev.h> +#include <linux/err.h> #include <linux/io.h> #include <mach/hardware.h> #include <mach/map.h> -#include <plat/cpu-freq.h> +#include <mach/regs-sys.h> +#include <mach/regs-clock.h> +#include <mach/pll.h> -#include <plat/regs-clock.h> +#include <plat/cpu.h> +#include <plat/devs.h> +#include <plat/cpu-freq.h> #include <plat/clock.h> #include <plat/clock-clksrc.h> -#include <plat/cpu.h> -#include <plat/pll.h> /* fin_apll, fin_mpll and fin_epll are all the same clock, which we call * ext_xtal_mux for want of an actual name from the manual. @@ -49,6 +49,259 @@ static struct clk clk_ext_xtal_mux = { #define clk_fout_mpll clk_mpll #define clk_fout_epll clk_epll +struct clk clk_h2 = { + .name = "hclk2", + .id = -1, + .rate = 0, +}; + +struct clk clk_27m = { + .name = "clk_27m", + .id = -1, + .rate = 27000000, +}; + +static int clk_48m_ctrl(struct clk *clk, int enable) +{ + unsigned long flags; + u32 val; + + /* can't rely on clock lock, this register has other usages */ + local_irq_save(flags); + + val = __raw_readl(S3C64XX_OTHERS); + if (enable) + val |= S3C64XX_OTHERS_USBMASK; + else + val &= ~S3C64XX_OTHERS_USBMASK; + + __raw_writel(val, S3C64XX_OTHERS); + local_irq_restore(flags); + + return 0; +} + +struct clk clk_48m = { + .name = "clk_48m", + .id = -1, + .rate = 48000000, + .enable = clk_48m_ctrl, +}; + +static int inline s3c64xx_gate(void __iomem *reg, + struct clk *clk, + int enable) +{ + unsigned int ctrlbit = clk->ctrlbit; + u32 con; + + con = __raw_readl(reg); + + if (enable) + con |= ctrlbit; + else + con &= ~ctrlbit; + + __raw_writel(con, reg); + return 0; +} + +static int s3c64xx_pclk_ctrl(struct clk *clk, int enable) +{ + return s3c64xx_gate(S3C_PCLK_GATE, clk, enable); +} + +static int s3c64xx_hclk_ctrl(struct clk *clk, int enable) +{ + return s3c64xx_gate(S3C_HCLK_GATE, clk, enable); +} + +int s3c64xx_sclk_ctrl(struct clk *clk, int enable) +{ + return s3c64xx_gate(S3C_SCLK_GATE, clk, enable); +} + +static struct clk init_clocks_disable[] = { + { + .name = "nand", + .id = -1, + .parent = &clk_h, + }, { + .name = "adc", + .id = -1, + .parent = &clk_p, + .enable = s3c64xx_pclk_ctrl, + .ctrlbit = S3C_CLKCON_PCLK_TSADC, + }, { + .name = "i2c", + .id = -1, + .parent = &clk_p, + .enable = s3c64xx_pclk_ctrl, + .ctrlbit = S3C_CLKCON_PCLK_IIC, + }, { + .name = "iis", + .id = 0, + .parent = &clk_p, + .enable = s3c64xx_pclk_ctrl, + .ctrlbit = S3C_CLKCON_PCLK_IIS0, + }, { + .name = "iis", + .id = 1, + .parent = &clk_p, + .enable = s3c64xx_pclk_ctrl, + .ctrlbit = S3C_CLKCON_PCLK_IIS1, + }, { +#ifdef CONFIG_CPU_S3C6410 + .name = "iis", + .id = -1, /* There's only one IISv4 port */ + .parent = &clk_p, + .enable = s3c64xx_pclk_ctrl, + .ctrlbit = S3C6410_CLKCON_PCLK_IIS2, + }, { +#endif + .name = "spi", + .id = 0, + .parent = &clk_p, + .enable = s3c64xx_pclk_ctrl, + .ctrlbit = S3C_CLKCON_PCLK_SPI0, + }, { + .name = "spi", + .id = 1, + .parent = &clk_p, + .enable = s3c64xx_pclk_ctrl, + .ctrlbit = S3C_CLKCON_PCLK_SPI1, + }, { + .name = "spi_48m", + .id = 0, + .parent = &clk_48m, + .enable = s3c64xx_sclk_ctrl, + .ctrlbit = S3C_CLKCON_SCLK_SPI0_48, + }, { + .name = "spi_48m", + .id = 1, + .parent = &clk_48m, + .enable = s3c64xx_sclk_ctrl, + .ctrlbit = S3C_CLKCON_SCLK_SPI1_48, + }, { + .name = "48m", + .id = 0, + .parent = &clk_48m, + .enable = s3c64xx_sclk_ctrl, + .ctrlbit = S3C_CLKCON_SCLK_MMC0_48, + }, { + .name = "48m", + .id = 1, + .parent = &clk_48m, + .enable = s3c64xx_sclk_ctrl, + .ctrlbit = S3C_CLKCON_SCLK_MMC1_48, + }, { + .name = "48m", + .id = 2, + .parent = &clk_48m, + .enable = s3c64xx_sclk_ctrl, + .ctrlbit = S3C_CLKCON_SCLK_MMC2_48, + }, { + .name = "dma0", + .id = -1, + .parent = &clk_h, + .enable = s3c64xx_hclk_ctrl, + .ctrlbit = S3C_CLKCON_HCLK_DMA0, + }, { + .name = "dma1", + .id = -1, + .parent = &clk_h, + .enable = s3c64xx_hclk_ctrl, + .ctrlbit = S3C_CLKCON_HCLK_DMA1, + }, +}; + +static struct clk init_clocks[] = { + { + .name = "lcd", + .id = -1, + .parent = &clk_h, + .enable = s3c64xx_hclk_ctrl, + .ctrlbit = S3C_CLKCON_HCLK_LCD, + }, { + .name = "gpio", + .id = -1, + .parent = &clk_p, + .enable = s3c64xx_pclk_ctrl, + .ctrlbit = S3C_CLKCON_PCLK_GPIO, + }, { + .name = "usb-host", + .id = -1, + .parent = &clk_h, + .enable = s3c64xx_hclk_ctrl, + .ctrlbit = S3C_CLKCON_HCLK_UHOST, + }, { + .name = "hsmmc", + .id = 0, + .parent = &clk_h, + .enable = s3c64xx_hclk_ctrl, + .ctrlbit = S3C_CLKCON_HCLK_HSMMC0, + }, { + .name = "hsmmc", + .id = 1, + .parent = &clk_h, + .enable = s3c64xx_hclk_ctrl, + .ctrlbit = S3C_CLKCON_HCLK_HSMMC1, + }, { + .name = "hsmmc", + .id = 2, + .parent = &clk_h, + .enable = s3c64xx_hclk_ctrl, + .ctrlbit = S3C_CLKCON_HCLK_HSMMC2, + }, { + .name = "timers", + .id = -1, + .parent = &clk_p, + .enable = s3c64xx_pclk_ctrl, + .ctrlbit = S3C_CLKCON_PCLK_PWM, + }, { + .name = "uart", + .id = 0, + .parent = &clk_p, + .enable = s3c64xx_pclk_ctrl, + .ctrlbit = S3C_CLKCON_PCLK_UART0, + }, { + .name = "uart", + .id = 1, + .parent = &clk_p, + .enable = s3c64xx_pclk_ctrl, + .ctrlbit = S3C_CLKCON_PCLK_UART1, + }, { + .name = "uart", + .id = 2, + .parent = &clk_p, + .enable = s3c64xx_pclk_ctrl, + .ctrlbit = S3C_CLKCON_PCLK_UART2, + }, { + .name = "uart", + .id = 3, + .parent = &clk_p, + .enable = s3c64xx_pclk_ctrl, + .ctrlbit = S3C_CLKCON_PCLK_UART3, + }, { + .name = "rtc", + .id = -1, + .parent = &clk_p, + .enable = s3c64xx_pclk_ctrl, + .ctrlbit = S3C_CLKCON_PCLK_RTC, + }, { + .name = "watchdog", + .id = -1, + .parent = &clk_p, + .ctrlbit = S3C_CLKCON_PCLK_WDT, + }, { + .name = "ac97", + .id = -1, + .parent = &clk_p, + .ctrlbit = S3C_CLKCON_PCLK_AC97, + } +}; + + static struct clk clk_fout_apll = { .name = "fout_apll", .id = -1, @@ -492,7 +745,7 @@ void __init_or_cpufreq s3c6400_setup_clocks(void) s3c_set_clksrc(&clksrcs[ptr], true); } -static struct clk *clks[] __initdata = { +static struct clk *clks1[] __initdata = { &clk_ext_xtal_mux, &clk_iis_cd0, &clk_iis_cd1, @@ -503,19 +756,29 @@ static struct clk *clks[] __initdata = { &clk_arm, }; +static struct clk *clks[] __initdata = { + &clk_ext, + &clk_epll, + &clk_27m, + &clk_48m, + &clk_h2, +}; + /** - * s3c6400_register_clocks - register clocks for s3c6400 and above - * @armclk_divlimit: Divisor mask for ARMCLK + * s3c64xx_register_clocks - register clocks for s3c6400 and s3c6410 + * @xtal: The rate for the clock crystal feeding the PLLs. + * @armclk_divlimit: Divisor mask for ARMCLK. * - * Register the clocks for the S3C6400 and above SoC range, such - * as ARMCLK and the clocks which have divider chains attached. + * Register the clocks for the S3C6400 and S3C6410 SoC range, such + * as ARMCLK as well as the necessary parent clocks. * * This call does not setup the clocks, which is left to the * s3c6400_setup_clocks() call which may be needed by the cpufreq * or resume code to re-set the clocks if the bootloader has changed * them. */ -void __init s3c6400_register_clocks(unsigned armclk_divlimit) +void __init s3c64xx_register_clocks(unsigned long xtal, + unsigned armclk_divlimit) { struct clk *clkp; int ret; @@ -523,14 +786,24 @@ void __init s3c6400_register_clocks(unsigned armclk_divlimit) armclk_mask = armclk_divlimit; - for (ptr = 0; ptr < ARRAY_SIZE(clks); ptr++) { - clkp = clks[ptr]; + s3c24xx_register_baseclocks(xtal); + s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); + + s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); + + clkp = init_clocks_disable; + for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { + ret = s3c24xx_register_clock(clkp); if (ret < 0) { printk(KERN_ERR "Failed to register clock %s (%d)\n", clkp->name, ret); } + + (clkp->enable)(clkp, 0); } + s3c24xx_register_clocks(clks1, ARRAY_SIZE(clks1)); s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); + s3c_pwmclk_init(); } diff --git a/arch/arm/plat-s3c64xx/cpu.c b/arch/arm/mach-s3c64xx/cpu.c index bc7ca1812e3..374e45e566b 100644 --- a/arch/arm/plat-s3c64xx/cpu.c +++ b/arch/arm/mach-s3c64xx/cpu.c @@ -33,8 +33,8 @@ #include <plat/devs.h> #include <plat/clock.h> -#include <plat/s3c6400.h> -#include <plat/s3c6410.h> +#include <mach/s3c6400.h> +#include <mach/s3c6410.h> /* table of supported CPUs */ @@ -129,6 +129,12 @@ static struct sys_device s3c64xx_sysdev = { .cls = &s3c64xx_sysclass, }; +/* uart registration process */ + +void __init s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) +{ + s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no); +} /* read cpu identification code */ diff --git a/arch/arm/plat-s3c64xx/cpufreq.c b/arch/arm/mach-s3c64xx/cpufreq.c index 74c0e8347de..74c0e8347de 100644 --- a/arch/arm/plat-s3c64xx/cpufreq.c +++ b/arch/arm/mach-s3c64xx/cpufreq.c diff --git a/arch/arm/plat-s3c64xx/dev-adc.c b/arch/arm/mach-s3c64xx/dev-adc.c index fafef9b6bcf..fafef9b6bcf 100644 --- a/arch/arm/plat-s3c64xx/dev-adc.c +++ b/arch/arm/mach-s3c64xx/dev-adc.c diff --git a/arch/arm/plat-s3c64xx/dev-audio.c b/arch/arm/mach-s3c64xx/dev-audio.c index f6b7bfb519d..c3e9e73bd0f 100644 --- a/arch/arm/plat-s3c64xx/dev-audio.c +++ b/arch/arm/mach-s3c64xx/dev-audio.c @@ -11,6 +11,7 @@ #include <linux/kernel.h> #include <linux/string.h> #include <linux/platform_device.h> +#include <linux/dma-mapping.h> #include <mach/irqs.h> #include <mach/map.h> @@ -19,12 +20,13 @@ #include <plat/devs.h> #include <plat/audio.h> -#include <plat/gpio-bank-c.h> -#include <plat/gpio-bank-d.h> -#include <plat/gpio-bank-e.h> -#include <plat/gpio-bank-h.h> #include <plat/gpio-cfg.h> +#include <mach/gpio-bank-c.h> +#include <mach/gpio-bank-d.h> +#include <mach/gpio-bank-e.h> +#include <mach/gpio-bank-h.h> + static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev) { switch (pdev->id) { @@ -254,3 +256,80 @@ struct platform_device s3c64xx_device_pcm1 = { }, }; EXPORT_SYMBOL(s3c64xx_device_pcm1); + +/* AC97 Controller platform devices */ + +static int s3c64xx_ac97_cfg_gpd(struct platform_device *pdev) +{ + s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_AC97_BITCLK); + s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_AC97_nRESET); + s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_AC97_SYNC); + s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_AC97_SDI); + s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_AC97_SDO); + + return 0; +} + +static int s3c64xx_ac97_cfg_gpe(struct platform_device *pdev) +{ + s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_AC97_BITCLK); + s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_AC97_nRESET); + s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_AC97_SYNC); + s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_AC97_SDI); + s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_AC97_SDO); + + return 0; +} + +static struct resource s3c64xx_ac97_resource[] = { + [0] = { + .start = S3C64XX_PA_AC97, + .end = S3C64XX_PA_AC97 + 0x100 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = DMACH_AC97_PCMOUT, + .end = DMACH_AC97_PCMOUT, + .flags = IORESOURCE_DMA, + }, + [2] = { + .start = DMACH_AC97_PCMIN, + .end = DMACH_AC97_PCMIN, + .flags = IORESOURCE_DMA, + }, + [3] = { + .start = DMACH_AC97_MICIN, + .end = DMACH_AC97_MICIN, + .flags = IORESOURCE_DMA, + }, + [4] = { + .start = IRQ_AC97, + .end = IRQ_AC97, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct s3c_audio_pdata s3c_ac97_pdata; + +static u64 s3c64xx_ac97_dmamask = DMA_BIT_MASK(32); + +struct platform_device s3c64xx_device_ac97 = { + .name = "s3c-ac97", + .id = -1, + .num_resources = ARRAY_SIZE(s3c64xx_ac97_resource), + .resource = s3c64xx_ac97_resource, + .dev = { + .platform_data = &s3c_ac97_pdata, + .dma_mask = &s3c64xx_ac97_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, +}; +EXPORT_SYMBOL(s3c64xx_device_ac97); + +void __init s3c64xx_ac97_setup_gpio(int num) +{ + if (num == S3C64XX_AC97_GPD) + s3c_ac97_pdata.cfg_gpio = s3c64xx_ac97_cfg_gpd; + else + s3c_ac97_pdata.cfg_gpio = s3c64xx_ac97_cfg_gpe; +} diff --git a/arch/arm/plat-s3c64xx/dev-rtc.c b/arch/arm/mach-s3c64xx/dev-rtc.c index b9e7a05f012..b9e7a05f012 100644 --- a/arch/arm/plat-s3c64xx/dev-rtc.c +++ b/arch/arm/mach-s3c64xx/dev-rtc.c diff --git a/arch/arm/plat-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c index ca10388d7ed..29c32d08851 100644 --- a/arch/arm/plat-s3c64xx/dev-spi.c +++ b/arch/arm/mach-s3c64xx/dev-spi.c @@ -16,11 +16,10 @@ #include <mach/dma.h> #include <mach/map.h> #include <mach/gpio.h> - -#include <plat/spi-clocks.h> +#include <mach/gpio-bank-c.h> +#include <mach/spi-clocks.h> #include <plat/s3c64xx-spi.h> -#include <plat/gpio-bank-c.h> #include <plat/gpio-cfg.h> #include <plat/irqs.h> diff --git a/arch/arm/plat-s3c64xx/dev-uart.c b/arch/arm/mach-s3c64xx/dev-uart.c index f797f748b99..f797f748b99 100644 --- a/arch/arm/plat-s3c64xx/dev-uart.c +++ b/arch/arm/mach-s3c64xx/dev-uart.c diff --git a/arch/arm/plat-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c index d554b936fcf..b62bdf18dca 100644 --- a/arch/arm/plat-s3c64xx/dma.c +++ b/arch/arm/mach-s3c64xx/dma.c @@ -27,8 +27,7 @@ #include <mach/map.h> #include <mach/irqs.h> -#include <plat/dma-plat.h> -#include <plat/regs-sys.h> +#include <mach/regs-sys.h> #include <asm/hardware/pl080.h> diff --git a/arch/arm/plat-s3c64xx/gpiolib.c b/arch/arm/mach-s3c64xx/gpiolib.c index b6e3f55321f..66e6794481d 100644 --- a/arch/arm/plat-s3c64xx/gpiolib.c +++ b/arch/arm/mach-s3c64xx/gpiolib.c @@ -22,7 +22,7 @@ #include <plat/gpio-core.h> #include <plat/gpio-cfg.h> #include <plat/gpio-cfg-helpers.h> -#include <plat/regs-gpio.h> +#include <mach/regs-gpio.h> /* GPIO bank summary: * diff --git a/arch/arm/mach-s3c6400/include/mach/debug-macro.S b/arch/arm/mach-s3c64xx/include/mach/debug-macro.S index b18ac5266df..b18ac5266df 100644 --- a/arch/arm/mach-s3c6400/include/mach/debug-macro.S +++ b/arch/arm/mach-s3c64xx/include/mach/debug-macro.S diff --git a/arch/arm/plat-s3c64xx/include/plat/dma-plat.h b/arch/arm/mach-s3c64xx/include/mach/dma.h index 8f76a1e474d..0a5d9268a23 100644 --- a/arch/arm/plat-s3c64xx/include/plat/dma-plat.h +++ b/arch/arm/mach-s3c64xx/include/mach/dma.h @@ -1,16 +1,71 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/dma-plat.h +/* linux/arch/arm/mach-s3c6400/include/mach/dma.h * - * Copyright 2009 Openmoko, Inc. - * Copyright 2009 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * http://armlinux.simtec.co.uk/ * - * S3C64XX DMA core - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ + * S3C6400 - DMA support + */ + +#ifndef __ASM_ARCH_DMA_H +#define __ASM_ARCH_DMA_H __FILE__ + +#define S3C_DMA_CHANNELS (16) + +/* see mach-s3c2410/dma.h for notes on dma channel numbers */ + +/* Note, for the S3C64XX architecture we keep the DMACH_ + * defines in the order they are allocated to [S]DMA0/[S]DMA1 + * so that is easy to do DHACH_ -> DMA controller conversion + */ +enum dma_ch { + /* DMA0/SDMA0 */ + DMACH_UART0 = 0, + DMACH_UART0_SRC2, + DMACH_UART1, + DMACH_UART1_SRC2, + DMACH_UART2, + DMACH_UART2_SRC2, + DMACH_UART3, + DMACH_UART3_SRC2, + DMACH_PCM0_TX, + DMACH_PCM0_RX, + DMACH_I2S0_OUT, + DMACH_I2S0_IN, + DMACH_SPI0_TX, + DMACH_SPI0_RX, + DMACH_HSI_I2SV40_TX, + DMACH_HSI_I2SV40_RX, + + /* DMA1/SDMA1 */ + DMACH_PCM1_TX = 16, + DMACH_PCM1_RX, + DMACH_I2S1_OUT, + DMACH_I2S1_IN, + DMACH_SPI1_TX, + DMACH_SPI1_RX, + DMACH_AC97_PCMOUT, + DMACH_AC97_PCMIN, + DMACH_AC97_MICIN, + DMACH_PWM, + DMACH_IRDA, + DMACH_EXTERNAL, + DMACH_RES1, + DMACH_RES2, + DMACH_SECURITY_RX, /* SDMA1 only */ + DMACH_SECURITY_TX, /* SDMA1 only */ + DMACH_MAX /* the end */ +}; + +static __inline__ bool s3c_dma_has_circular(void) +{ + return true; +} + +#define S3C2410_DMAF_CIRCULAR (1 << 0) + +#include <plat/dma.h> #define DMACH_LOW_LEVEL (1<<28) /* use this to specifiy hardware ch no */ @@ -68,3 +123,5 @@ struct s3c2410_dma_chan { }; #include <plat/dma-core.h> + +#endif /* __ASM_ARCH_IRQ_H */ diff --git a/arch/arm/mach-s3c6400/include/mach/entry-macro.S b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S index 33a8fe24088..dd362604dcc 100644 --- a/arch/arm/mach-s3c6400/include/mach/entry-macro.S +++ b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S @@ -13,6 +13,6 @@ */ #include <mach/map.h> -#include <plat/irqs.h> +#include <mach/irqs.h> #include <asm/entry-macro-vic2.S> diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-a.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h index 9aa0e427d11..34212e1a7e8 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-a.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-a.h +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-b.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h index 3933adb4d50..7232c037e64 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-b.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-b.h +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-c.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h index e22b49f4f98..db189ab1639 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-c.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-c.h +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-d.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h index 6fe4a49c26f..1a01cee7aca 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-d.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-d.h +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-e.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h index 7fcf3d8e0a4..f057adb627d 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-e.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-e.h +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-f.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h index f3faff974a1..62ab8f5e783 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-f.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-f.h +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-g.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h index 35bbd2378e5..b94954af159 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-g.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-g.h +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h index 2ba1767512d..5d75aaad865 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h index ce9ebe33556..4ceaa6098bc 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-j.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h index 21a906299d3..6f25cd079a4 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-j.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-j.h +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-n.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h index 569e7612088..d0aeda1cd9d 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-n.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-n.h +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-o.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h index b09e12954b5..21868fa102d 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-o.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-o.h +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-p.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h index 92f00517926..46bcfb63b8d 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-p.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-p.h +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-q.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h index 565e60aaee4..1712223487b 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-q.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-q.h +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/mach-s3c6400/include/mach/gpio.h b/arch/arm/mach-s3c64xx/include/mach/gpio.h index e8e35e8fe73..0d46e994048 100644 --- a/arch/arm/mach-s3c6400/include/mach/gpio.h +++ b/arch/arm/mach-s3c64xx/include/mach/gpio.h @@ -91,6 +91,10 @@ enum s3c_gpio_number { #define S3C_GPIO_END S3C64XX_GPIO_END /* define the number of gpios we need to the one after the GPQ() range */ -#define ARCH_NR_GPIOS (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1) +#define GPIO_BOARD_START (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1) + +#define BOARD_NR_GPIOS 16 + +#define ARCH_NR_GPIOS (GPIO_BOARD_START + BOARD_NR_GPIOS) #include <asm-generic/gpio.h> diff --git a/arch/arm/mach-s3c6400/include/mach/hardware.h b/arch/arm/mach-s3c64xx/include/mach/hardware.h index 862d033e57a..862d033e57a 100644 --- a/arch/arm/mach-s3c6400/include/mach/hardware.h +++ b/arch/arm/mach-s3c64xx/include/mach/hardware.h diff --git a/arch/arm/mach-s3c64xx/include/mach/io.h b/arch/arm/mach-s3c64xx/include/mach/io.h new file mode 100644 index 00000000000..de5716dbbd6 --- /dev/null +++ b/arch/arm/mach-s3c64xx/include/mach/io.h @@ -0,0 +1,18 @@ +/* arch/arm/mach-s3c64xxinclude/mach/io.h + * + * Copyright 2008 Simtec Electronics + * Ben Dooks <ben-linux@fluff.org> + * + * Default IO routines for S3C64XX based + */ + +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H + +/* No current ISA/PCI bus support. */ +#define __io(a) __typesafe_io(a) +#define __mem_pci(a) (a) + +#define IO_SPACE_LIMIT (0xFFFFFFFF) + +#endif diff --git a/arch/arm/plat-s3c64xx/include/plat/irqs.h b/arch/arm/mach-s3c64xx/include/mach/irqs.h index a22758194e6..e9ab4ac0b9a 100644 --- a/arch/arm/plat-s3c64xx/include/plat/irqs.h +++ b/arch/arm/mach-s3c64xx/include/mach/irqs.h @@ -1,15 +1,15 @@ -/* linux/arch/arm/plat-s3c64xx/include/mach/irqs.h +/* linux/arch/arm/mach-s3c64xx/include/mach/irqs.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics * Ben Dooks <ben@simtec.co.uk> * http://armlinux.simtec.co.uk/ * - * S3C64XX - Common IRQ support + * S3C64XX - IRQ support */ -#ifndef __ASM_PLAT_S3C64XX_IRQS_H -#define __ASM_PLAT_S3C64XX_IRQS_H __FILE__ +#ifndef __ASM_MACH_S3C64XX_IRQS_H +#define __ASM_MACH_S3C64XX_IRQS_H __FILE__ /* we keep the first set of CPU IRQs out of the range of * the ISA space, so that the PC104 has them to itself @@ -200,6 +200,8 @@ #ifdef CONFIG_SMDK6410_WM1190_EV1 #define IRQ_BOARD_NR 64 +#elif defined(CONFIG_SMDK6410_WM1192_EV1) +#define IRQ_BOARD_NR 64 #else #define IRQ_BOARD_NR 16 #endif @@ -210,5 +212,5 @@ #define NR_IRQS (IRQ_BOARD_END + 1) -#endif /* __ASM_PLAT_S3C64XX_IRQS_H */ +#endif /* __ASM_MACH_S3C64XX_IRQS_H */ diff --git a/arch/arm/mach-s3c6400/include/mach/map.h b/arch/arm/mach-s3c64xx/include/mach/map.h index 801c1c0f3a9..801c1c0f3a9 100644 --- a/arch/arm/mach-s3c6400/include/mach/map.h +++ b/arch/arm/mach-s3c64xx/include/mach/map.h diff --git a/arch/arm/mach-s3c6400/include/mach/memory.h b/arch/arm/mach-s3c64xx/include/mach/memory.h index a3ac84a6548..a3ac84a6548 100644 --- a/arch/arm/mach-s3c6400/include/mach/memory.h +++ b/arch/arm/mach-s3c64xx/include/mach/memory.h diff --git a/arch/arm/plat-s3c64xx/include/plat/pll.h b/arch/arm/mach-s3c64xx/include/mach/pll.h index 90bbd72fdc4..90bbd72fdc4 100644 --- a/arch/arm/plat-s3c64xx/include/plat/pll.h +++ b/arch/arm/mach-s3c64xx/include/mach/pll.h diff --git a/arch/arm/plat-s3c64xx/include/plat/pm-core.h b/arch/arm/mach-s3c64xx/include/mach/pm-core.h index d347de3ba0d..1e9f20f0bb7 100644 --- a/arch/arm/plat-s3c64xx/include/plat/pm-core.h +++ b/arch/arm/mach-s3c64xx/include/mach/pm-core.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/pm-core.h +/* linux/arch/arm/mach-s3c64xx/include/mach/pm-core.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics @@ -12,7 +12,7 @@ * published by the Free Software Foundation. */ -#include <plat/regs-gpio.h> +#include <mach/regs-gpio.h> static inline void s3c_pm_debug_init_uart(void) { diff --git a/arch/arm/mach-s3c6400/include/mach/pwm-clock.h b/arch/arm/mach-s3c64xx/include/mach/pwm-clock.h index b25bedee0d5..b25bedee0d5 100644 --- a/arch/arm/mach-s3c6400/include/mach/pwm-clock.h +++ b/arch/arm/mach-s3c64xx/include/mach/pwm-clock.h diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-clock.h b/arch/arm/mach-s3c64xx/include/mach/regs-clock.h index 3ef62741e5d..3ef62741e5d 100644 --- a/arch/arm/plat-s3c64xx/include/plat/regs-clock.h +++ b/arch/arm/mach-s3c64xx/include/mach/regs-clock.h diff --git a/arch/arm/mach-s3c6400/include/mach/regs-fb.h b/arch/arm/mach-s3c64xx/include/mach/regs-fb.h index f56611526c6..f56611526c6 100644 --- a/arch/arm/mach-s3c6400/include/mach/regs-fb.h +++ b/arch/arm/mach-s3c64xx/include/mach/regs-fb.h diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-gpio-memport.h b/arch/arm/mach-s3c64xx/include/mach/regs-gpio-memport.h index 82342f6fd27..82342f6fd27 100644 --- a/arch/arm/plat-s3c64xx/include/plat/regs-gpio-memport.h +++ b/arch/arm/mach-s3c64xx/include/mach/regs-gpio-memport.h diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-gpio.h b/arch/arm/mach-s3c64xx/include/mach/regs-gpio.h index 81f7f6e6832..81f7f6e6832 100644 --- a/arch/arm/plat-s3c64xx/include/plat/regs-gpio.h +++ b/arch/arm/mach-s3c64xx/include/mach/regs-gpio.h diff --git a/arch/arm/mach-s3c6400/include/mach/regs-irq.h b/arch/arm/mach-s3c64xx/include/mach/regs-irq.h index bcce68a0bb7..bcce68a0bb7 100644 --- a/arch/arm/mach-s3c6400/include/mach/regs-irq.h +++ b/arch/arm/mach-s3c64xx/include/mach/regs-irq.h diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-modem.h b/arch/arm/mach-s3c64xx/include/mach/regs-modem.h index 49f7759dedf..49f7759dedf 100644 --- a/arch/arm/plat-s3c64xx/include/plat/regs-modem.h +++ b/arch/arm/mach-s3c64xx/include/mach/regs-modem.h diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-srom.h b/arch/arm/mach-s3c64xx/include/mach/regs-srom.h index 756731b3629..756731b3629 100644 --- a/arch/arm/plat-s3c64xx/include/plat/regs-srom.h +++ b/arch/arm/mach-s3c64xx/include/mach/regs-srom.h diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-sys.h b/arch/arm/mach-s3c64xx/include/mach/regs-sys.h index 69b78d9f83b..69b78d9f83b 100644 --- a/arch/arm/plat-s3c64xx/include/plat/regs-sys.h +++ b/arch/arm/mach-s3c64xx/include/mach/regs-sys.h diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-syscon-power.h b/arch/arm/mach-s3c64xx/include/mach/regs-syscon-power.h index 270d96ac970..270d96ac970 100644 --- a/arch/arm/plat-s3c64xx/include/plat/regs-syscon-power.h +++ b/arch/arm/mach-s3c64xx/include/mach/regs-syscon-power.h diff --git a/arch/arm/plat-s3c64xx/include/plat/s3c6400.h b/arch/arm/mach-s3c64xx/include/mach/s3c6400.h index 11f2e1e119b..f86958d0535 100644 --- a/arch/arm/plat-s3c64xx/include/plat/s3c6400.h +++ b/arch/arm/mach-s3c64xx/include/mach/s3c6400.h @@ -1,4 +1,4 @@ -/* arch/arm/plat-s3c64xx/include/plat/s3c6400.h +/* arch/arm/mach-s3c64xx/include/macht/s3c6400.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics @@ -15,9 +15,10 @@ /* Common init code for S3C6400 related SoCs */ extern void s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); -extern void s3c6400_register_clocks(unsigned armclk_divlimit); extern void s3c6400_setup_clocks(void); +extern void s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_limit); + #ifdef CONFIG_CPU_S3C6400 extern int s3c6400_init(void); @@ -33,4 +34,3 @@ extern void s3c6400_init_clocks(int xtal); #define s3c6400_map_io NULL #define s3c6400_init NULL #endif - diff --git a/arch/arm/plat-s3c64xx/include/plat/s3c6410.h b/arch/arm/mach-s3c64xx/include/mach/s3c6410.h index 50dcdd6f680..24f1141ffcb 100644 --- a/arch/arm/plat-s3c64xx/include/plat/s3c6410.h +++ b/arch/arm/mach-s3c64xx/include/mach/s3c6410.h @@ -1,4 +1,4 @@ -/* arch/arm/plat-s3c64xx/include/plat/s3c6410.h +/* arch/arm/mach-s3c64xx/include/mach/s3c6410.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c64xx/include/plat/spi-clocks.h b/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h index 524bdae3f62..9d0c43b4b68 100644 --- a/arch/arm/plat-s3c64xx/include/plat/spi-clocks.h +++ b/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c64xx/include/plat/spi-clocks.h +/* linux/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h * * Copyright (C) 2009 Samsung Electronics Ltd. * Jaswinder Singh <jassi.brar@samsung.com> diff --git a/arch/arm/mach-s3c6400/include/mach/system.h b/arch/arm/mach-s3c64xx/include/mach/system.h index 2e58cb7a714..2e58cb7a714 100644 --- a/arch/arm/mach-s3c6400/include/mach/system.h +++ b/arch/arm/mach-s3c64xx/include/mach/system.h diff --git a/arch/arm/mach-s3c6400/include/mach/tick.h b/arch/arm/mach-s3c64xx/include/mach/tick.h index ebe18a9469b..ebe18a9469b 100644 --- a/arch/arm/mach-s3c6400/include/mach/tick.h +++ b/arch/arm/mach-s3c64xx/include/mach/tick.h diff --git a/arch/arm/mach-s3c64xx/include/mach/timex.h b/arch/arm/mach-s3c64xx/include/mach/timex.h new file mode 100644 index 00000000000..fb2e8cd4082 --- /dev/null +++ b/arch/arm/mach-s3c64xx/include/mach/timex.h @@ -0,0 +1,24 @@ +/* arch/arm/mach-s3c64xx/include/mach/timex.h + * + * Copyright (c) 2003-2005 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * S3C6400 - time parameters + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_TIMEX_H +#define __ASM_ARCH_TIMEX_H + +/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it + * a variable is useless. It seems as long as we make our timers an + * exact multiple of HZ, any value that makes a 1->1 correspondence + * for the time conversion functions to/from jiffies is acceptable. +*/ + +#define CLOCK_TICK_RATE 12000000 + +#endif /* __ASM_ARCH_TIMEX_H */ diff --git a/arch/arm/mach-s3c6400/include/mach/uncompress.h b/arch/arm/mach-s3c64xx/include/mach/uncompress.h index c6a82a20bf2..c6a82a20bf2 100644 --- a/arch/arm/mach-s3c6400/include/mach/uncompress.h +++ b/arch/arm/mach-s3c64xx/include/mach/uncompress.h diff --git a/arch/arm/mach-s3c64xx/include/mach/vmalloc.h b/arch/arm/mach-s3c64xx/include/mach/vmalloc.h new file mode 100644 index 00000000000..7411ef3711a --- /dev/null +++ b/arch/arm/mach-s3c64xx/include/mach/vmalloc.h @@ -0,0 +1,20 @@ +/* arch/arm/mach-s3c64xx/include/mach/vmalloc.h + * + * from arch/arm/mach-iop3xx/include/mach/vmalloc.h + * + * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk> + * http://www.simtec.co.uk/products/SWLINUX/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * S3C6400 vmalloc definition +*/ + +#ifndef __ASM_ARCH_VMALLOC_H +#define __ASM_ARCH_VMALLOC_H + +#define VMALLOC_END (0xE0000000) + +#endif /* __ASM_ARCH_VMALLOC_H */ diff --git a/arch/arm/plat-s3c64xx/irq-eint.c b/arch/arm/mach-s3c64xx/irq-eint.c index ebdf183a091..5682d6a7f4a 100644 --- a/arch/arm/plat-s3c64xx/irq-eint.c +++ b/arch/arm/mach-s3c64xx/irq-eint.c @@ -22,7 +22,7 @@ #include <asm/hardware/vic.h> #include <plat/regs-irqtype.h> -#include <plat/regs-gpio.h> +#include <mach/regs-gpio.h> #include <plat/gpio-cfg.h> #include <mach/map.h> diff --git a/arch/arm/plat-s3c64xx/irq-pm.c b/arch/arm/mach-s3c64xx/irq-pm.c index ca523b5d4c1..da1bec64b9d 100644 --- a/arch/arm/plat-s3c64xx/irq-pm.c +++ b/arch/arm/mach-s3c64xx/irq-pm.c @@ -23,7 +23,7 @@ #include <plat/regs-serial.h> #include <plat/regs-timer.h> -#include <plat/regs-gpio.h> +#include <mach/regs-gpio.h> #include <plat/cpu.h> #include <plat/pm.h> diff --git a/arch/arm/plat-s3c64xx/irq.c b/arch/arm/mach-s3c64xx/irq.c index 67a145d440f..67a145d440f 100644 --- a/arch/arm/plat-s3c64xx/irq.c +++ b/arch/arm/mach-s3c64xx/irq.c diff --git a/arch/arm/mach-s3c6410/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c index 661cca63de2..4a0bb243d14 100644 --- a/arch/arm/mach-s3c6410/mach-anw6410.c +++ b/arch/arm/mach-s3c64xx/mach-anw6410.c @@ -1,4 +1,4 @@ -/* linux/arch/arm/mach-s3c6410/mach-anw6410.c +/* linux/arch/arm/mach-s3c64xx/mach-anw6410.c * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics @@ -45,12 +45,12 @@ #include <plat/iic.h> #include <plat/fb.h> -#include <plat/s3c6410.h> +#include <mach/s3c6410.h> #include <plat/clock.h> #include <plat/devs.h> #include <plat/cpu.h> -#include <plat/regs-gpio.h> -#include <plat/regs-modem.h> +#include <mach/regs-gpio.h> +#include <mach/regs-modem.h> /* DM9000 */ #define ANW6410_PA_DM9000 (0x18000000) diff --git a/arch/arm/mach-s3c6410/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c index f05d95784d7..187441a78dd 100644 --- a/arch/arm/mach-s3c6410/mach-hmt.c +++ b/arch/arm/mach-s3c64xx/mach-hmt.c @@ -38,7 +38,7 @@ #include <plat/fb.h> #include <plat/nand.h> -#include <plat/s3c6410.h> +#include <mach/s3c6410.h> #include <plat/clock.h> #include <plat/devs.h> #include <plat/cpu.h> diff --git a/arch/arm/mach-s3c6410/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c index 55e9bbfaf68..bf65747ea68 100644 --- a/arch/arm/mach-s3c6410/mach-ncp.c +++ b/arch/arm/mach-s3c64xx/mach-ncp.c @@ -1,5 +1,5 @@ /* - * linux/arch/arm/mach-s3c6410/mach-ncp.c + * linux/arch/arm/mach-s3c64xx/mach-ncp.c * * Copyright (C) 2008-2009 Samsung Electronics * @@ -40,7 +40,7 @@ #include <plat/iic.h> #include <plat/fb.h> -#include <plat/s3c6410.h> +#include <mach/s3c6410.h> #include <plat/clock.h> #include <plat/devs.h> #include <plat/cpu.h> diff --git a/arch/arm/mach-s3c6400/mach-smdk6400.c b/arch/arm/mach-s3c64xx/mach-smdk6400.c index ab19285389a..f7b18983950 100644 --- a/arch/arm/mach-s3c6400/mach-smdk6400.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6400.c @@ -1,4 +1,4 @@ -/* linux/arch/arm/mach-s3c6400/mach-smdk6400.c +/* linux/arch/arm/mach-s3c64xx/mach-smdk6400.c * * Copyright 2008 Simtec Electronics * Ben Dooks <ben@simtec.co.uk> @@ -31,7 +31,7 @@ #include <plat/regs-serial.h> -#include <plat/s3c6400.h> +#include <mach/s3c6400.h> #include <plat/clock.h> #include <plat/devs.h> #include <plat/cpu.h> diff --git a/arch/arm/mach-s3c6410/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c index eba345fadff..2d5afd221d7 100644 --- a/arch/arm/mach-s3c6410/mach-smdk6410.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c @@ -1,4 +1,4 @@ -/* linux/arch/arm/mach-s3c6410/mach-smdk6410.c +/* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics @@ -21,6 +21,7 @@ #include <linux/platform_device.h> #include <linux/io.h> #include <linux/i2c.h> +#include <linux/leds.h> #include <linux/fb.h> #include <linux/gpio.h> #include <linux/delay.h> @@ -32,6 +33,11 @@ #include <linux/mfd/wm8350/pmic.h> #endif +#ifdef CONFIG_SMDK6410_WM1192_EV1 +#include <linux/mfd/wm831x/core.h> +#include <linux/mfd/wm831x/pdata.h> +#endif + #include <video/platform_lcd.h> #include <asm/mach/arch.h> @@ -46,15 +52,15 @@ #include <asm/mach-types.h> #include <plat/regs-serial.h> -#include <plat/regs-modem.h> -#include <plat/regs-gpio.h> -#include <plat/regs-sys.h> -#include <plat/regs-srom.h> +#include <mach/regs-modem.h> +#include <mach/regs-gpio.h> +#include <mach/regs-sys.h> +#include <mach/regs-srom.h> #include <plat/iic.h> #include <plat/fb.h> #include <plat/gpio-cfg.h> -#include <plat/s3c6410.h> +#include <mach/s3c6410.h> #include <plat/clock.h> #include <plat/devs.h> #include <plat/cpu.h> @@ -248,6 +254,7 @@ static struct platform_device *smdk6410_devices[] __initdata = { &s3c_device_fb, &s3c_device_ohci, &s3c_device_usb_hsotg, + &s3c64xx_device_iisv4, #ifdef CONFIG_REGULATOR &smdk6410_b_pwr_5v, @@ -257,77 +264,124 @@ static struct platform_device *smdk6410_devices[] __initdata = { &smdk6410_smsc911x, }; -#ifdef CONFIG_SMDK6410_WM1190_EV1 -/* S3C64xx internal logic & PLL */ -static struct regulator_init_data wm8350_dcdc1_data = { +#ifdef CONFIG_REGULATOR +/* ARM core */ +static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = { + { + .supply = "vddarm", + } +}; + +/* VDDARM, BUCK1 on J5 */ +static struct regulator_init_data smdk6410_vddarm = { .constraints = { - .name = "PVDD_INT/PVDD_PLL", - .min_uV = 1200000, + .name = "PVDD_ARM", + .min_uV = 1000000, + .max_uV = 1300000, + .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, + }, + .num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers), + .consumer_supplies = smdk6410_vddarm_consumers, +}; + +/* VDD_INT, BUCK2 on J5 */ +static struct regulator_init_data smdk6410_vddint = { + .constraints = { + .name = "PVDD_INT", + .min_uV = 1000000, .max_uV = 1200000, .always_on = 1, - .apply_uV = 1, + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, }, }; -/* Memory */ -static struct regulator_init_data wm8350_dcdc3_data = { +/* VDD_HI, LDO3 on J5 */ +static struct regulator_init_data smdk6410_vddhi = { .constraints = { - .name = "PVDD_MEM", - .min_uV = 1800000, - .max_uV = 1800000, + .name = "PVDD_HI", .always_on = 1, - .state_mem = { - .uV = 1800000, - .mode = REGULATOR_MODE_NORMAL, - .enabled = 1, - }, - .initial_state = PM_SUSPEND_MEM, }, }; -/* USB, EXT, PCM, ADC/DAC, USB, MMC */ -static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = { - { - /* WM8580 */ - .supply = "DVDD", - .dev_name = "0-001b", +/* VDD_PLL, LDO2 on J5 */ +static struct regulator_init_data smdk6410_vddpll = { + .constraints = { + .name = "PVDD_PLL", + .always_on = 1, }, }; -static struct regulator_init_data wm8350_dcdc4_data = { +/* VDD_UH_MMC, LDO5 on J5 */ +static struct regulator_init_data smdk6410_vdduh_mmc = { .constraints = { - .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV", - .min_uV = 3000000, - .max_uV = 3000000, + .name = "PVDD_UH/PVDD_MMC", .always_on = 1, }, - .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers), - .consumer_supplies = wm8350_dcdc4_consumers, }; -/* ARM core */ -static struct regulator_consumer_supply dcdc6_consumers[] = { - { - .supply = "vddarm", - } +/* VCCM3BT, LDO8 on J5 */ +static struct regulator_init_data smdk6410_vccmc3bt = { + .constraints = { + .name = "PVCCM3BT", + .always_on = 1, + }, }; -static struct regulator_init_data wm8350_dcdc6_data = { +/* VCCM2MTV, LDO11 on J5 */ +static struct regulator_init_data smdk6410_vccm2mtv = { .constraints = { - .name = "PVDD_ARM", - .min_uV = 1000000, - .max_uV = 1300000, + .name = "PVCCM2MTV", + .always_on = 1, + }, +}; + +/* VDD_LCD, LDO12 on J5 */ +static struct regulator_init_data smdk6410_vddlcd = { + .constraints = { + .name = "PVDD_LCD", .always_on = 1, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, }, - .num_consumer_supplies = ARRAY_SIZE(dcdc6_consumers), - .consumer_supplies = dcdc6_consumers, }; -/* Alive */ -static struct regulator_init_data wm8350_ldo1_data = { +/* VDD_OTGI, LDO9 on J5 */ +static struct regulator_init_data smdk6410_vddotgi = { + .constraints = { + .name = "PVDD_OTGI", + .always_on = 1, + }, +}; + +/* VDD_OTG, LDO14 on J5 */ +static struct regulator_init_data smdk6410_vddotg = { + .constraints = { + .name = "PVDD_OTG", + .always_on = 1, + }, +}; + +/* VDD_ALIVE, LDO15 on J5 */ +static struct regulator_init_data smdk6410_vddalive = { .constraints = { .name = "PVDD_ALIVE", + .always_on = 1, + }, +}; + +/* VDD_AUDIO, VLDO_AUDIO on J5 */ +static struct regulator_init_data smdk6410_vddaudio = { + .constraints = { + .name = "PVDD_AUDIO", + .always_on = 1, + }, +}; +#endif + +#ifdef CONFIG_SMDK6410_WM1190_EV1 +/* S3C64xx internal logic & PLL */ +static struct regulator_init_data wm8350_dcdc1_data = { + .constraints = { + .name = "PVDD_INT/PVDD_PLL", .min_uV = 1200000, .max_uV = 1200000, .always_on = 1, @@ -335,24 +389,40 @@ static struct regulator_init_data wm8350_ldo1_data = { }, }; -/* OTG */ -static struct regulator_init_data wm8350_ldo2_data = { +/* Memory */ +static struct regulator_init_data wm8350_dcdc3_data = { .constraints = { - .name = "PVDD_OTG", - .min_uV = 3300000, - .max_uV = 3300000, + .name = "PVDD_MEM", + .min_uV = 1800000, + .max_uV = 1800000, .always_on = 1, + .state_mem = { + .uV = 1800000, + .mode = REGULATOR_MODE_NORMAL, + .enabled = 1, + }, + .initial_state = PM_SUSPEND_MEM, + }, +}; + +/* USB, EXT, PCM, ADC/DAC, USB, MMC */ +static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = { + { + /* WM8580 */ + .supply = "DVDD", + .dev_name = "0-001b", }, }; -/* LCD */ -static struct regulator_init_data wm8350_ldo3_data = { +static struct regulator_init_data wm8350_dcdc4_data = { .constraints = { - .name = "PVDD_LCD", + .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV", .min_uV = 3000000, .max_uV = 3000000, .always_on = 1, }, + .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers), + .consumer_supplies = wm8350_dcdc4_consumers, }; /* OTGi/1190-EV1 HPVDD & AVDD */ @@ -373,10 +443,10 @@ static struct { { WM8350_DCDC_1, &wm8350_dcdc1_data }, { WM8350_DCDC_3, &wm8350_dcdc3_data }, { WM8350_DCDC_4, &wm8350_dcdc4_data }, - { WM8350_DCDC_6, &wm8350_dcdc6_data }, - { WM8350_LDO_1, &wm8350_ldo1_data }, - { WM8350_LDO_2, &wm8350_ldo2_data }, - { WM8350_LDO_3, &wm8350_ldo3_data }, + { WM8350_DCDC_6, &smdk6410_vddarm }, + { WM8350_LDO_1, &smdk6410_vddalive }, + { WM8350_LDO_2, &smdk6410_vddotg }, + { WM8350_LDO_3, &smdk6410_vddlcd }, { WM8350_LDO_4, &wm8350_ldo4_data }, }; @@ -403,10 +473,117 @@ static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = { }; #endif +#ifdef CONFIG_SMDK6410_WM1192_EV1 +static struct gpio_led wm1192_pmic_leds[] = { + { + .name = "PMIC:red:power", + .gpio = GPIO_BOARD_START + 3, + .default_state = LEDS_GPIO_DEFSTATE_ON, + }, +}; + +static struct gpio_led_platform_data wm1192_pmic_led = { + .num_leds = ARRAY_SIZE(wm1192_pmic_leds), + .leds = wm1192_pmic_leds, +}; + +static struct platform_device wm1192_pmic_led_dev = { + .name = "leds-gpio", + .id = -1, + .dev = { + .platform_data = &wm1192_pmic_led, + }, +}; + +static int wm1192_pre_init(struct wm831x *wm831x) +{ + int ret; + + /* Configure the IRQ line */ + s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP); + + ret = platform_device_register(&wm1192_pmic_led_dev); + if (ret != 0) + dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret); + + return 0; +} + +static struct wm831x_backlight_pdata wm1192_backlight_pdata = { + .isink = 1, + .max_uA = 27554, +}; + +static struct regulator_init_data wm1192_dcdc3 = { + .constraints = { + .name = "PVDD_MEM/PVDD_GPS", + .always_on = 1, + }, +}; + +static struct regulator_consumer_supply wm1192_ldo1_consumers[] = { + { .supply = "DVDD", .dev_name = "0-001b", }, /* WM8580 */ +}; + +static struct regulator_init_data wm1192_ldo1 = { + .constraints = { + .name = "PVDD_LCD/PVDD_EXT", + .always_on = 1, + }, + .consumer_supplies = wm1192_ldo1_consumers, + .num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers), +}; + +static struct wm831x_status_pdata wm1192_led7_pdata = { + .name = "LED7:green:", +}; + +static struct wm831x_status_pdata wm1192_led8_pdata = { + .name = "LED8:green:", +}; + +static struct wm831x_pdata smdk6410_wm1192_pdata = { + .pre_init = wm1192_pre_init, + .irq_base = IRQ_BOARD_START, + + .backlight = &wm1192_backlight_pdata, + .dcdc = { + &smdk6410_vddarm, /* DCDC1 */ + &smdk6410_vddint, /* DCDC2 */ + &wm1192_dcdc3, + }, + .gpio_base = GPIO_BOARD_START, + .ldo = { + &wm1192_ldo1, /* LDO1 */ + &smdk6410_vdduh_mmc, /* LDO2 */ + NULL, /* LDO3 NC */ + &smdk6410_vddotgi, /* LDO4 */ + &smdk6410_vddotg, /* LDO5 */ + &smdk6410_vddhi, /* LDO6 */ + &smdk6410_vddaudio, /* LDO7 */ + &smdk6410_vccm2mtv, /* LDO8 */ + &smdk6410_vddpll, /* LDO9 */ + &smdk6410_vccmc3bt, /* LDO10 */ + &smdk6410_vddalive, /* LDO11 */ + }, + .status = { + &wm1192_led7_pdata, + &wm1192_led8_pdata, + }, +}; +#endif + static struct i2c_board_info i2c_devs0[] __initdata = { { I2C_BOARD_INFO("24c08", 0x50), }, { I2C_BOARD_INFO("wm8580", 0x1b), }, +#ifdef CONFIG_SMDK6410_WM1192_EV1 + { I2C_BOARD_INFO("wm8312", 0x34), + .platform_data = &smdk6410_wm1192_pdata, + .irq = S3C_EINT(12), + }, +#endif + #ifdef CONFIG_SMDK6410_WM1190_EV1 { I2C_BOARD_INFO("wm8350", 0x1a), .platform_data = &smdk6410_wm8350_pdata, diff --git a/arch/arm/plat-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c index 47632fc7eb6..b8ac4597fad 100644 --- a/arch/arm/plat-s3c64xx/pm.c +++ b/arch/arm/mach-s3c64xx/pm.c @@ -20,14 +20,14 @@ #include <mach/map.h> #include <plat/pm.h> -#include <plat/regs-sys.h> -#include <plat/regs-gpio.h> -#include <plat/regs-clock.h> -#include <plat/regs-syscon-power.h> -#include <plat/regs-gpio-memport.h> +#include <mach/regs-sys.h> +#include <mach/regs-gpio.h> +#include <mach/regs-clock.h> +#include <mach/regs-syscon-power.h> +#include <mach/regs-gpio-memport.h> #ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK -#include <plat/gpio-bank-n.h> +#include <mach/gpio-bank-n.h> void s3c_pm_debug_smdkled(u32 set, u32 clear) { diff --git a/arch/arm/mach-s3c6400/s3c6400.c b/arch/arm/mach-s3c64xx/s3c6400.c index d876ee50367..707e34e3afd 100644 --- a/arch/arm/mach-s3c6400/s3c6400.c +++ b/arch/arm/mach-s3c64xx/s3c6400.c @@ -1,4 +1,4 @@ -/* linux/arch/arm/mach-s3c6410/cpu.c +/* linux/arch/arm/mach-s3c64xx/cpu.c * * Copyright 2009 Simtec Electronics * Ben Dooks <ben@simtec.co.uk> @@ -30,14 +30,14 @@ #include <plat/cpu-freq.h> #include <plat/regs-serial.h> -#include <plat/regs-clock.h> +#include <mach/regs-clock.h> #include <plat/cpu.h> #include <plat/devs.h> #include <plat/clock.h> #include <plat/sdhci.h> #include <plat/iic-core.h> -#include <plat/s3c6400.h> +#include <mach/s3c6400.h> void __init s3c6400_map_io(void) { @@ -55,10 +55,7 @@ void __init s3c6400_map_io(void) void __init s3c6400_init_clocks(int xtal) { - printk(KERN_DEBUG "%s: initialising clocks\n", __func__); - s3c24xx_register_baseclocks(xtal); - s3c64xx_register_clocks(); - s3c6400_register_clocks(S3C6400_CLKDIV0_ARM_MASK); + s3c64xx_register_clocks(xtal, S3C6400_CLKDIV0_ARM_MASK); s3c6400_setup_clocks(); } diff --git a/arch/arm/mach-s3c6410/cpu.c b/arch/arm/mach-s3c64xx/s3c6410.c index 522c0869195..59635d19466 100644 --- a/arch/arm/mach-s3c6410/cpu.c +++ b/arch/arm/mach-s3c64xx/s3c6410.c @@ -1,4 +1,4 @@ -/* linux/arch/arm/mach-s3c6410/cpu.c +/* linux/arch/arm/mach-s3c64xx/s3c6410.c * * Copyright 2008 Simtec Electronics * Copyright 2008 Simtec Electronics @@ -31,30 +31,18 @@ #include <plat/cpu-freq.h> #include <plat/regs-serial.h> -#include <plat/regs-clock.h> +#include <mach/regs-clock.h> #include <plat/cpu.h> #include <plat/devs.h> #include <plat/clock.h> #include <plat/sdhci.h> #include <plat/iic-core.h> -#include <plat/s3c6400.h> -#include <plat/s3c6410.h> - -/* Initial IO mappings */ - -static struct map_desc s3c6410_iodesc[] __initdata = { -}; - -/* s3c6410_map_io - * - * register the standard cpu IO areas -*/ +#include <mach/s3c6400.h> +#include <mach/s3c6410.h> void __init s3c6410_map_io(void) { - iotable_init(s3c6410_iodesc, ARRAY_SIZE(s3c6410_iodesc)); - /* initialise device information early */ s3c6410_default_sdhci0(); s3c6410_default_sdhci1(); @@ -70,9 +58,7 @@ void __init s3c6410_map_io(void) void __init s3c6410_init_clocks(int xtal) { printk(KERN_DEBUG "%s: initialising clocks\n", __func__); - s3c24xx_register_baseclocks(xtal); - s3c64xx_register_clocks(); - s3c6400_register_clocks(S3C6410_CLKDIV0_ARM_MASK); + s3c64xx_register_clocks(xtal, S3C6410_CLKDIV0_ARM_MASK); s3c6400_setup_clocks(); } diff --git a/arch/arm/plat-s3c64xx/setup-fb-24bpp.c b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c index 8e28e448dd2..8e28e448dd2 100644 --- a/arch/arm/plat-s3c64xx/setup-fb-24bpp.c +++ b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c diff --git a/arch/arm/plat-s3c64xx/setup-i2c0.c b/arch/arm/mach-s3c64xx/setup-i2c0.c index 36448076372..d1b11e6e77e 100644 --- a/arch/arm/plat-s3c64xx/setup-i2c0.c +++ b/arch/arm/mach-s3c64xx/setup-i2c0.c @@ -18,8 +18,8 @@ struct platform_device; /* don't need the contents */ #include <mach/gpio.h> +#include <mach/gpio-bank-b.h> #include <plat/iic.h> -#include <plat/gpio-bank-b.h> #include <plat/gpio-cfg.h> void s3c_i2c0_cfg_gpio(struct platform_device *dev) diff --git a/arch/arm/plat-s3c64xx/setup-i2c1.c b/arch/arm/mach-s3c64xx/setup-i2c1.c index bbe229bd90c..2dce57d8c6f 100644 --- a/arch/arm/plat-s3c64xx/setup-i2c1.c +++ b/arch/arm/mach-s3c64xx/setup-i2c1.c @@ -18,8 +18,8 @@ struct platform_device; /* don't need the contents */ #include <mach/gpio.h> +#include <mach/gpio-bank-b.h> #include <plat/iic.h> -#include <plat/gpio-bank-b.h> #include <plat/gpio-cfg.h> void s3c_i2c1_cfg_gpio(struct platform_device *dev) diff --git a/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c index a58c0cc7ba5..a58c0cc7ba5 100644 --- a/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c +++ b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c diff --git a/arch/arm/mach-s3c6400/setup-sdhci.c b/arch/arm/mach-s3c64xx/setup-sdhci.c index 1039937403b..1a942037c4e 100644 --- a/arch/arm/mach-s3c6400/setup-sdhci.c +++ b/arch/arm/mach-s3c64xx/setup-sdhci.c @@ -1,11 +1,11 @@ -/* linux/arch/arm/mach-s3c6410/setup-sdhci.c +/* linux/arch/arm/mach-s3c64xx/setup-sdhci.c * * Copyright 2008 Simtec Electronics * Copyright 2008 Simtec Electronics * Ben Dooks <ben@simtec.co.uk> * http://armlinux.simtec.co.uk/ * - * S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC) + * S3C6400/S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC) * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -26,7 +26,7 @@ /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ -char *s3c6400_hsmmc_clksrcs[4] = { +char *s3c64xx_hsmmc_clksrcs[4] = { [0] = "hsmmc", [1] = "hsmmc", [2] = "mmc_bus", @@ -61,3 +61,12 @@ void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev, writel(ctrl3, r + S3C_SDHCI_CONTROL3); } +void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev, + void __iomem *r, + struct mmc_ios *ios, + struct mmc_card *card) +{ + writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4); + + s3c6400_setup_sdhci_cfg_card(dev, r, ios, card); +} diff --git a/arch/arm/plat-s3c64xx/sleep.S b/arch/arm/mach-s3c64xx/sleep.S index 8e71fe90a37..b2ef4431736 100644 --- a/arch/arm/plat-s3c64xx/sleep.S +++ b/arch/arm/mach-s3c64xx/sleep.S @@ -1,4 +1,4 @@ -/* linux/0arch/arm/plat-s3c64xx/sleep.S +/* linux/arch/arm/plat-s3c64xx/sleep.S * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics @@ -19,8 +19,8 @@ #undef S3C64XX_VA_GPIO #define S3C64XX_VA_GPIO (0x0) -#include <plat/regs-gpio.h> -#include <plat/gpio-bank-n.h> +#include <mach/regs-gpio.h> +#include <mach/gpio-bank-n.h> #define LL_UART (S3C_PA_UART + (0x400 * CONFIG_S3C_LOWLEVEL_UART_PORT)) diff --git a/arch/arm/mach-s5p6440/Kconfig b/arch/arm/mach-s5p6440/Kconfig index 3aa246244dc..4c29ff8b07d 100644 --- a/arch/arm/mach-s5p6440/Kconfig +++ b/arch/arm/mach-s5p6440/Kconfig @@ -9,8 +9,6 @@ if ARCH_S5P6440 config CPU_S5P6440 bool - select CPU_S5P6440_INIT - select CPU_S5P6440_CLOCK help Enable S5P6440 CPU support diff --git a/arch/arm/mach-s5p6440/Makefile b/arch/arm/mach-s5p6440/Makefile index a79b13011ed..1ad894b1d3a 100644 --- a/arch/arm/mach-s5p6440/Makefile +++ b/arch/arm/mach-s5p6440/Makefile @@ -12,7 +12,7 @@ obj- := # Core support for S5P6440 system -obj-$(CONFIG_CPU_S5P6440) += cpu.o s5p6440-gpio.o +obj-$(CONFIG_CPU_S5P6440) += cpu.o init.o clock.o gpio.o # machine support diff --git a/arch/arm/plat-s5p/s5p6440-clock.c b/arch/arm/mach-s5p6440/clock.c index 2f412f8c121..b2672e16e7a 100644 --- a/arch/arm/plat-s5p/s5p6440-clock.c +++ b/arch/arm/mach-s5p6440/clock.c @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s5p/s5p6440-clock.c +/* linux/arch/arm/mach-s5p6440/clock.c * * Copyright (c) 2009 Samsung Electronics Co., Ltd. * http://www.samsung.com/ diff --git a/arch/arm/mach-s5p6440/s5p6440-gpio.c b/arch/arm/mach-s5p6440/gpio.c index 742264c29f2..b0ea741177a 100644 --- a/arch/arm/mach-s5p6440/s5p6440-gpio.c +++ b/arch/arm/mach-s5p6440/gpio.c @@ -1,4 +1,4 @@ -/* arch/arm/mach-s5p6440/s5p6440-gpio.c +/* arch/arm/mach-s5p6440/gpio.c * * Copyright (c) 2009 Samsung Electronics Co., Ltd. * http://www.samsung.com/ diff --git a/arch/arm/mach-s5p6440/include/mach/debug-macro.S b/arch/arm/mach-s5p6440/include/mach/debug-macro.S index f3a5d1635be..48cdb0da026 100644 --- a/arch/arm/mach-s5p6440/include/mach/debug-macro.S +++ b/arch/arm/mach-s5p6440/include/mach/debug-macro.S @@ -22,8 +22,8 @@ .macro addruart, rx mrc p15, 0, \rx, c1, c0 tst \rx, #1 - ldreq \rx, = S5P_PA_UART - ldrne \rx, = (S5P_VA_UART + S5P_PA_UART & 0xfffff) + ldreq \rx, = S3C_PA_UART + ldrne \rx, = S3C_VA_UART #if CONFIG_DEBUG_S3C_UART != 0 add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) #endif diff --git a/arch/arm/mach-s5p6440/include/mach/io.h b/arch/arm/mach-s5p6440/include/mach/io.h new file mode 100644 index 00000000000..fa2d69cb1ad --- /dev/null +++ b/arch/arm/mach-s5p6440/include/mach/io.h @@ -0,0 +1,18 @@ +/* arch/arm/mach-s5p6440/include/mach/io.h + * + * Copyright 2008 Simtec Electronics + * Ben Dooks <ben-linux@fluff.org> + * + * Default IO routines for S3C64XX based + */ + +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H + +/* No current ISA/PCI bus support. */ +#define __io(a) __typesafe_io(a) +#define __mem_pci(a) (a) + +#define IO_SPACE_LIMIT (0xFFFFFFFF) + +#endif diff --git a/arch/arm/mach-s5p6440/include/mach/map.h b/arch/arm/mach-s5p6440/include/mach/map.h index 4a73e73c942..8924e5a4d6a 100644 --- a/arch/arm/mach-s5p6440/include/mach/map.h +++ b/arch/arm/mach-s5p6440/include/mach/map.h @@ -14,94 +14,55 @@ #define __ASM_ARCH_MAP_H __FILE__ #include <plat/map-base.h> +#include <plat/map-s5p.h> -/* Chip ID */ #define S5P6440_PA_CHIPID (0xE0000000) #define S5P_PA_CHIPID S5P6440_PA_CHIPID -#define S5P_VA_CHIPID S3C_ADDR(0x00700000) -/* SYSCON */ #define S5P6440_PA_SYSCON (0xE0100000) -#define S5P_PA_SYSCON S5P6440_PA_SYSCON -#define S5P_VA_SYSCON S3C_VA_SYS - #define S5P6440_PA_CLK (S5P6440_PA_SYSCON + 0x0) -#define S5P_PA_CLK S5P6440_PA_CLK -#define S5P_VA_CLK (S5P_VA_SYSCON + 0x0) +#define S5P_PA_SYSCON S5P6440_PA_SYSCON -/* GPIO */ #define S5P6440_PA_GPIO (0xE0308000) #define S5P_PA_GPIO S5P6440_PA_GPIO -#define S5P_VA_GPIO S3C_ADDR(0x00500000) -/* VIC0 */ #define S5P6440_PA_VIC0 (0xE4000000) #define S5P_PA_VIC0 S5P6440_PA_VIC0 -#define S5P_VA_VIC0 (S3C_VA_IRQ + 0x0) -#define VA_VIC0 S5P_VA_VIC0 -/* VIC1 */ #define S5P6440_PA_VIC1 (0xE4100000) #define S5P_PA_VIC1 S5P6440_PA_VIC1 -#define S5P_VA_VIC1 (S3C_VA_IRQ + 0x10000) -#define VA_VIC1 S5P_VA_VIC1 -/* Timer */ #define S5P6440_PA_TIMER (0xEA000000) #define S5P_PA_TIMER S5P6440_PA_TIMER -#define S5P_VA_TIMER S3C_VA_TIMER -/* RTC */ #define S5P6440_PA_RTC (0xEA100000) #define S5P_PA_RTC S5P6440_PA_RTC -#define S5P_VA_RTC S3C_ADDR(0x00600000) -/* WDT */ #define S5P6440_PA_WDT (0xEA200000) #define S5P_PA_WDT S5P6440_PA_WDT -#define S5p_VA_WDT S3C_VA_WATCHDOG -/* UART */ #define S5P6440_PA_UART (0xEC000000) -#define S5P_PA_UART S5P6440_PA_UART -#define S5P_VA_UART S3C_VA_UART -/* HS USB OtG */ +#define S5P_PA_UART0 (S5P6440_PA_UART + 0x0) +#define S5P_PA_UART1 (S5P6440_PA_UART + 0x400) +#define S5P_PA_UART2 (S5P6440_PA_UART + 0x800) +#define S5P_PA_UART3 (S5P6440_PA_UART + 0xC00) + +#define S5P_SZ_UART SZ_256 + +#define S5P6440_PA_IIC0 (0xEC104000) + #define S5P6440_PA_HSOTG (0xED100000) -/* HSMMC */ #define S5P6440_PA_HSMMC0 (0xED800000) #define S5P6440_PA_HSMMC1 (0xED900000) #define S5P6440_PA_HSMMC2 (0xEDA00000) -#define S5P_PA_UART0 (S5P_PA_UART + 0x0) -#define S5P_PA_UART1 (S5P_PA_UART + 0x400) -#define S5P_PA_UART2 (S5P_PA_UART + 0x800) -#define S5P_PA_UART3 (S5P_PA_UART + 0xC00) -#define S5P_UART_OFFSET (0x400) - -#define S5P_VA_UARTx(x) (S5P_VA_UART + (S5P_PA_UART & 0xfffff) \ - + ((x) * S5P_UART_OFFSET)) - -#define S5P_VA_UART0 S5P_VA_UARTx(0) -#define S5P_VA_UART1 S5P_VA_UARTx(1) -#define S5P_VA_UART2 S5P_VA_UARTx(2) -#define S5P_VA_UART3 S5P_VA_UARTx(3) -#define S5P_SZ_UART SZ_256 - -/* I2C */ -#define S5P6440_PA_IIC0 (0xEC104000) -#define S5P_PA_IIC0 S5P6440_PA_IIC0 -#define S5p_VA_IIC0 S3C_ADDR(0x00700000) - -/* SDRAM */ #define S5P6440_PA_SDRAM (0x20000000) #define S5P_PA_SDRAM S5P6440_PA_SDRAM /* compatibiltiy defines. */ -#define S3C_PA_UART S5P_PA_UART -#define S3C_UART_OFFSET S5P_UART_OFFSET -#define S3C_PA_TIMER S5P_PA_TIMER -#define S3C_PA_IIC S5P_PA_IIC0 +#define S3C_PA_UART S5P6440_PA_UART +#define S3C_PA_IIC S5P6440_PA_IIC0 #endif /* __ASM_ARCH_MAP_H */ diff --git a/arch/arm/mach-s5p6440/include/mach/regs-clock.h b/arch/arm/mach-s5p6440/include/mach/regs-clock.h index b7af28342bc..c783ecc9f19 100644 --- a/arch/arm/mach-s5p6440/include/mach/regs-clock.h +++ b/arch/arm/mach-s5p6440/include/mach/regs-clock.h @@ -15,7 +15,7 @@ #include <mach/map.h> -#define S5P_CLKREG(x) (S5P_VA_CLK + (x)) +#define S5P_CLKREG(x) (S3C_VA_SYS + (x)) #define S5P_APLL_LOCK S5P_CLKREG(0x00) #define S5P_MPLL_LOCK S5P_CLKREG(0x04) diff --git a/arch/arm/mach-s5p6440/include/mach/tick.h b/arch/arm/mach-s5p6440/include/mach/tick.h index 0815aeb4f2c..2f25c7f0797 100644 --- a/arch/arm/mach-s5p6440/include/mach/tick.h +++ b/arch/arm/mach-s5p6440/include/mach/tick.h @@ -15,7 +15,7 @@ static inline u32 s3c24xx_ostimer_pending(void) { - u32 pend = __raw_readl(S5P_VA_VIC0 + VIC_RAW_STATUS); + u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS); return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0))); } diff --git a/arch/arm/mach-s5p6440/include/mach/timex.h b/arch/arm/mach-s5p6440/include/mach/timex.h new file mode 100644 index 00000000000..fb2e8cd4082 --- /dev/null +++ b/arch/arm/mach-s5p6440/include/mach/timex.h @@ -0,0 +1,24 @@ +/* arch/arm/mach-s3c64xx/include/mach/timex.h + * + * Copyright (c) 2003-2005 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * S3C6400 - time parameters + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_TIMEX_H +#define __ASM_ARCH_TIMEX_H + +/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it + * a variable is useless. It seems as long as we make our timers an + * exact multiple of HZ, any value that makes a 1->1 correspondence + * for the time conversion functions to/from jiffies is acceptable. +*/ + +#define CLOCK_TICK_RATE 12000000 + +#endif /* __ASM_ARCH_TIMEX_H */ diff --git a/arch/arm/mach-s5p6440/include/mach/vmalloc.h b/arch/arm/mach-s5p6440/include/mach/vmalloc.h new file mode 100644 index 00000000000..16df257b1dc --- /dev/null +++ b/arch/arm/mach-s5p6440/include/mach/vmalloc.h @@ -0,0 +1,17 @@ +/* arch/arm/mach-s5p6440/include/mach/vmalloc.h + * + * Copyright 2010 Ben Dooks <ben-linux@fluff.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * S3C6400 vmalloc definition +*/ + +#ifndef __ASM_ARCH_VMALLOC_H +#define __ASM_ARCH_VMALLOC_H + +#define VMALLOC_END (0xE0000000) + +#endif /* __ASM_ARCH_VMALLOC_H */ diff --git a/arch/arm/plat-s5p/s5p6440-init.c b/arch/arm/mach-s5p6440/init.c index 90178256cc2..a1f3727e402 100644 --- a/arch/arm/plat-s5p/s5p6440-init.c +++ b/arch/arm/mach-s5p6440/init.c @@ -1,8 +1,10 @@ -/* linux/arch/arm/plat-s5p/s5p6440-init.c +/* linux/arch/arm/mach-s5p6440/init.c * * Copyright (c) 2009 Samsung Electronics Co., Ltd. * http://www.samsung.com/ * + * S5P6440 - Init support + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. diff --git a/arch/arm/mach-s5p6440/mach-smdk6440.c b/arch/arm/mach-s5p6440/mach-smdk6440.c index 760ea5424a7..3ae88f2c7c7 100644 --- a/arch/arm/mach-s5p6440/mach-smdk6440.c +++ b/arch/arm/mach-s5p6440/mach-smdk6440.c @@ -100,8 +100,8 @@ static void __init smdk6440_machine_init(void) MACHINE_START(SMDK6440, "SMDK6440") /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ - .phys_io = S5P_PA_UART & 0xfff00000, - .io_pg_offst = (((u32)S5P_VA_UART) >> 18) & 0xfffc, + .phys_io = S3C_PA_UART & 0xfff00000, + .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, .boot_params = S5P_PA_SDRAM + 0x100, .init_irq = s5p6440_init_irq, diff --git a/arch/arm/mach-s5p6442/Kconfig b/arch/arm/mach-s5p6442/Kconfig new file mode 100644 index 00000000000..4f3f6de6a01 --- /dev/null +++ b/arch/arm/mach-s5p6442/Kconfig @@ -0,0 +1,24 @@ +# arch/arm/mach-s5p6442/Kconfig +# +# Copyright (c) 2010 Samsung Electronics Co., Ltd. +# http://www.samsung.com/ +# +# Licensed under GPLv2 + +# Configuration options for the S5P6442 + +if ARCH_S5P6442 + +config CPU_S5P6442 + bool + select PLAT_S5P + help + Enable S5P6442 CPU support + +config MACH_SMDK6442 + bool "SMDK6442" + select CPU_S5P6442 + help + Machine support for Samsung SMDK6442 + +endif diff --git a/arch/arm/mach-s5p6442/Makefile b/arch/arm/mach-s5p6442/Makefile new file mode 100644 index 00000000000..dde39a6ce6b --- /dev/null +++ b/arch/arm/mach-s5p6442/Makefile @@ -0,0 +1,19 @@ +# arch/arm/mach-s5p6442/Makefile +# +# Copyright (c) 2010 Samsung Electronics Co., Ltd. +# http://www.samsung.com/ +# +# Licensed under GPLv2 + +obj-y := +obj-m := +obj-n := +obj- := + +# Core support for S5P6442 system + +obj-$(CONFIG_CPU_S5P6442) += cpu.o init.o clock.o + +# machine support + +obj-$(CONFIG_MACH_SMDK6442) += mach-smdk6442.o diff --git a/arch/arm/mach-s5p6442/Makefile.boot b/arch/arm/mach-s5p6442/Makefile.boot new file mode 100644 index 00000000000..ff90aa13bd6 --- /dev/null +++ b/arch/arm/mach-s5p6442/Makefile.boot @@ -0,0 +1,2 @@ + zreladdr-y := 0x20008000 +params_phys-y := 0x20000100 diff --git a/arch/arm/mach-s5p6442/clock.c b/arch/arm/mach-s5p6442/clock.c new file mode 100644 index 00000000000..3aadbf42c11 --- /dev/null +++ b/arch/arm/mach-s5p6442/clock.c @@ -0,0 +1,396 @@ +/* linux/arch/arm/mach-s5p6442/clock.c + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5P6442 - Clock support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/list.h> +#include <linux/err.h> +#include <linux/clk.h> +#include <linux/io.h> + +#include <mach/map.h> + +#include <plat/cpu-freq.h> +#include <mach/regs-clock.h> +#include <plat/clock.h> +#include <plat/cpu.h> +#include <plat/pll.h> +#include <plat/s5p-clock.h> +#include <plat/clock-clksrc.h> +#include <plat/s5p6442.h> + +static struct clksrc_clk clk_mout_apll = { + .clk = { + .name = "mout_apll", + .id = -1, + }, + .sources = &clk_src_apll, + .reg_src = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 }, +}; + +static struct clksrc_clk clk_mout_mpll = { + .clk = { + .name = "mout_mpll", + .id = -1, + }, + .sources = &clk_src_mpll, + .reg_src = { .reg = S5P_CLK_SRC0, .shift = 4, .size = 1 }, +}; + +static struct clksrc_clk clk_mout_epll = { + .clk = { + .name = "mout_epll", + .id = -1, + }, + .sources = &clk_src_epll, + .reg_src = { .reg = S5P_CLK_SRC0, .shift = 8, .size = 1 }, +}; + +/* Possible clock sources for ARM Mux */ +static struct clk *clk_src_arm_list[] = { + [1] = &clk_mout_apll.clk, + [2] = &clk_mout_mpll.clk, +}; + +static struct clksrc_sources clk_src_arm = { + .sources = clk_src_arm_list, + .nr_sources = ARRAY_SIZE(clk_src_arm_list), +}; + +static struct clksrc_clk clk_mout_arm = { + .clk = { + .name = "mout_arm", + .id = -1, + }, + .sources = &clk_src_arm, + .reg_src = { .reg = S5P_CLK_MUX_STAT0, .shift = 16, .size = 3 }, +}; + +static struct clk clk_dout_a2m = { + .name = "dout_a2m", + .id = -1, + .parent = &clk_mout_apll.clk, +}; + +/* Possible clock sources for D0 Mux */ +static struct clk *clk_src_d0_list[] = { + [1] = &clk_mout_mpll.clk, + [2] = &clk_dout_a2m, +}; + +static struct clksrc_sources clk_src_d0 = { + .sources = clk_src_d0_list, + .nr_sources = ARRAY_SIZE(clk_src_d0_list), +}; + +static struct clksrc_clk clk_mout_d0 = { + .clk = { + .name = "mout_d0", + .id = -1, + }, + .sources = &clk_src_d0, + .reg_src = { .reg = S5P_CLK_MUX_STAT0, .shift = 20, .size = 3 }, +}; + +static struct clk clk_dout_apll = { + .name = "dout_apll", + .id = -1, + .parent = &clk_mout_arm.clk, +}; + +/* Possible clock sources for D0SYNC Mux */ +static struct clk *clk_src_d0sync_list[] = { + [1] = &clk_mout_d0.clk, + [2] = &clk_dout_apll, +}; + +static struct clksrc_sources clk_src_d0sync = { + .sources = clk_src_d0sync_list, + .nr_sources = ARRAY_SIZE(clk_src_d0sync_list), +}; + +static struct clksrc_clk clk_mout_d0sync = { + .clk = { + .name = "mout_d0sync", + .id = -1, + }, + .sources = &clk_src_d0sync, + .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 28, .size = 3 }, +}; + +/* Possible clock sources for D1 Mux */ +static struct clk *clk_src_d1_list[] = { + [1] = &clk_mout_mpll.clk, + [2] = &clk_dout_a2m, +}; + +static struct clksrc_sources clk_src_d1 = { + .sources = clk_src_d1_list, + .nr_sources = ARRAY_SIZE(clk_src_d1_list), +}; + +static struct clksrc_clk clk_mout_d1 = { + .clk = { + .name = "mout_d1", + .id = -1, + }, + .sources = &clk_src_d1, + .reg_src = { .reg = S5P_CLK_MUX_STAT0, .shift = 24, .size = 3 }, +}; + +/* Possible clock sources for D1SYNC Mux */ +static struct clk *clk_src_d1sync_list[] = { + [1] = &clk_mout_d1.clk, + [2] = &clk_dout_apll, +}; + +static struct clksrc_sources clk_src_d1sync = { + .sources = clk_src_d1sync_list, + .nr_sources = ARRAY_SIZE(clk_src_d1sync_list), +}; + +static struct clksrc_clk clk_mout_d1sync = { + .clk = { + .name = "mout_d1sync", + .id = -1, + }, + .sources = &clk_src_d1sync, + .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 24, .size = 3 }, +}; + +static struct clk clk_hclkd0 = { + .name = "hclkd0", + .id = -1, + .parent = &clk_mout_d0sync.clk, +}; + +static struct clk clk_hclkd1 = { + .name = "hclkd1", + .id = -1, + .parent = &clk_mout_d1sync.clk, +}; + +static struct clk clk_pclkd0 = { + .name = "pclkd0", + .id = -1, + .parent = &clk_hclkd0, +}; + +static struct clk clk_pclkd1 = { + .name = "pclkd1", + .id = -1, + .parent = &clk_hclkd1, +}; + +int s5p6442_clk_ip3_ctrl(struct clk *clk, int enable) +{ + return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable); +} + +static struct clksrc_clk clksrcs[] = { + { + .clk = { + .name = "dout_a2m", + .id = -1, + .parent = &clk_mout_apll.clk, + }, + .sources = &clk_src_apll, + .reg_src = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 }, + .reg_div = { .reg = S5P_CLK_DIV0, .shift = 4, .size = 3 }, + }, { + .clk = { + .name = "dout_apll", + .id = -1, + .parent = &clk_mout_arm.clk, + }, + .sources = &clk_src_arm, + .reg_src = { .reg = S5P_CLK_MUX_STAT0, .shift = 16, .size = 3 }, + .reg_div = { .reg = S5P_CLK_DIV0, .shift = 0, .size = 3 }, + }, { + .clk = { + .name = "hclkd1", + .id = -1, + .parent = &clk_mout_d1sync.clk, + }, + .sources = &clk_src_d1sync, + .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 24, .size = 3 }, + .reg_div = { .reg = S5P_CLK_DIV0, .shift = 24, .size = 4 }, + }, { + .clk = { + .name = "hclkd0", + .id = -1, + .parent = &clk_mout_d0sync.clk, + }, + .sources = &clk_src_d0sync, + .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 28, .size = 3 }, + .reg_div = { .reg = S5P_CLK_DIV0, .shift = 16, .size = 4 }, + }, { + .clk = { + .name = "pclkd0", + .id = -1, + .parent = &clk_hclkd0, + }, + .sources = &clk_src_d0sync, + .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 28, .size = 3 }, + .reg_div = { .reg = S5P_CLK_DIV0, .shift = 20, .size = 3 }, + }, { + .clk = { + .name = "pclkd1", + .id = -1, + .parent = &clk_hclkd1, + }, + .sources = &clk_src_d1sync, + .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 24, .size = 3 }, + .reg_div = { .reg = S5P_CLK_DIV0, .shift = 28, .size = 3 }, + } +}; + +/* Clock initialisation code */ +static struct clksrc_clk *init_parents[] = { + &clk_mout_apll, + &clk_mout_mpll, + &clk_mout_epll, + &clk_mout_arm, + &clk_mout_d0, + &clk_mout_d0sync, + &clk_mout_d1, + &clk_mout_d1sync, +}; + +void __init_or_cpufreq s5p6442_setup_clocks(void) +{ + struct clk *pclkd0_clk; + struct clk *pclkd1_clk; + + unsigned long xtal; + unsigned long arm; + unsigned long hclkd0 = 0; + unsigned long hclkd1 = 0; + unsigned long pclkd0 = 0; + unsigned long pclkd1 = 0; + + unsigned long apll; + unsigned long mpll; + unsigned long epll; + unsigned int ptr; + + printk(KERN_DEBUG "%s: registering clocks\n", __func__); + + xtal = clk_get_rate(&clk_xtal); + + printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal); + + apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4508); + mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502); + epll = s5p_get_pll45xx(xtal, __raw_readl(S5P_EPLL_CON), pll_4500); + + printk(KERN_INFO "S5P6440: PLL settings, A=%ld, M=%ld, E=%ld", + apll, mpll, epll); + + clk_fout_apll.rate = apll; + clk_fout_mpll.rate = mpll; + clk_fout_epll.rate = epll; + + for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++) + s3c_set_clksrc(init_parents[ptr], true); + + for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) + s3c_set_clksrc(&clksrcs[ptr], true); + + arm = clk_get_rate(&clk_dout_apll); + hclkd0 = clk_get_rate(&clk_hclkd0); + hclkd1 = clk_get_rate(&clk_hclkd1); + + pclkd0_clk = clk_get(NULL, "pclkd0"); + BUG_ON(IS_ERR(pclkd0_clk)); + + pclkd0 = clk_get_rate(pclkd0_clk); + clk_put(pclkd0_clk); + + pclkd1_clk = clk_get(NULL, "pclkd1"); + BUG_ON(IS_ERR(pclkd1_clk)); + + pclkd1 = clk_get_rate(pclkd1_clk); + clk_put(pclkd1_clk); + + printk(KERN_INFO "S5P6442: HCLKD0=%ld, HCLKD1=%ld, PCLKD0=%ld, PCLKD1=%ld\n", + hclkd0, hclkd1, pclkd0, pclkd1); + + /* For backward compatibility */ + clk_f.rate = arm; + clk_h.rate = hclkd1; + clk_p.rate = pclkd1; + + clk_pclkd0.rate = pclkd0; + clk_pclkd1.rate = pclkd1; +} + +static struct clk init_clocks[] = { + { + .name = "systimer", + .id = -1, + .parent = &clk_pclkd1, + .enable = s5p6442_clk_ip3_ctrl, + .ctrlbit = (1<<16), + }, { + .name = "uart", + .id = 0, + .parent = &clk_pclkd1, + .enable = s5p6442_clk_ip3_ctrl, + .ctrlbit = (1<<17), + }, { + .name = "uart", + .id = 1, + .parent = &clk_pclkd1, + .enable = s5p6442_clk_ip3_ctrl, + .ctrlbit = (1<<18), + }, { + .name = "uart", + .id = 2, + .parent = &clk_pclkd1, + .enable = s5p6442_clk_ip3_ctrl, + .ctrlbit = (1<<19), + }, { + .name = "timers", + .id = -1, + .parent = &clk_pclkd1, + .enable = s5p6442_clk_ip3_ctrl, + .ctrlbit = (1<<23), + }, +}; + +static struct clk *clks[] __initdata = { + &clk_ext, + &clk_epll, + &clk_mout_apll.clk, + &clk_mout_mpll.clk, + &clk_mout_epll.clk, + &clk_mout_d0.clk, + &clk_mout_d0sync.clk, + &clk_mout_d1.clk, + &clk_mout_d1sync.clk, + &clk_hclkd0, + &clk_pclkd0, + &clk_hclkd1, + &clk_pclkd1, +}; + +void __init s5p6442_register_clocks(void) +{ + s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); + + s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); + s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); + + s3c_pwmclk_init(); +} diff --git a/arch/arm/mach-s5p6442/cpu.c b/arch/arm/mach-s5p6442/cpu.c new file mode 100644 index 00000000000..bc2524df89b --- /dev/null +++ b/arch/arm/mach-s5p6442/cpu.c @@ -0,0 +1,121 @@ +/* linux/arch/arm/mach-s5p6442/cpu.c + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/interrupt.h> +#include <linux/list.h> +#include <linux/timer.h> +#include <linux/init.h> +#include <linux/clk.h> +#include <linux/io.h> +#include <linux/sysdev.h> +#include <linux/serial_core.h> +#include <linux/platform_device.h> + +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/mach/irq.h> + +#include <asm/proc-fns.h> + +#include <mach/hardware.h> +#include <mach/map.h> +#include <asm/irq.h> + +#include <plat/regs-serial.h> +#include <mach/regs-clock.h> + +#include <plat/cpu.h> +#include <plat/devs.h> +#include <plat/clock.h> +#include <plat/s5p6442.h> + +/* Initial IO mappings */ + +static struct map_desc s5p6442_iodesc[] __initdata = { + { + .virtual = (unsigned long)S5P_VA_SYSTIMER, + .pfn = __phys_to_pfn(S5P6442_PA_SYSTIMER), + .length = SZ_16K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)VA_VIC2, + .pfn = __phys_to_pfn(S5P6442_PA_VIC2), + .length = SZ_16K, + .type = MT_DEVICE, + } +}; + +static void s5p6442_idle(void) +{ + if (!need_resched()) + cpu_do_idle(); + + local_irq_enable(); +} + +/* s5p6442_map_io + * + * register the standard cpu IO areas +*/ + +void __init s5p6442_map_io(void) +{ + iotable_init(s5p6442_iodesc, ARRAY_SIZE(s5p6442_iodesc)); +} + +void __init s5p6442_init_clocks(int xtal) +{ + printk(KERN_DEBUG "%s: initializing clocks\n", __func__); + + s3c24xx_register_baseclocks(xtal); + s5p_register_clocks(xtal); + s5p6442_register_clocks(); + s5p6442_setup_clocks(); +} + +void __init s5p6442_init_irq(void) +{ + /* S5P6442 supports 3 VIC */ + u32 vic[3]; + + /* VIC0, VIC1, and VIC2: some interrupt reserved */ + vic[0] = 0x7fefffff; + vic[1] = 0X7f389c81; + vic[2] = 0X1bbbcfff; + + s5p_init_irq(vic, ARRAY_SIZE(vic)); +} + +static struct sysdev_class s5p6442_sysclass = { + .name = "s5p6442-core", +}; + +static struct sys_device s5p6442_sysdev = { + .cls = &s5p6442_sysclass, +}; + +static int __init s5p6442_core_init(void) +{ + return sysdev_class_register(&s5p6442_sysclass); +} + +core_initcall(s5p6442_core_init); + +int __init s5p6442_init(void) +{ + printk(KERN_INFO "S5P6442: Initializing architecture\n"); + + /* set idle function */ + pm_idle = s5p6442_idle; + + return sysdev_register(&s5p6442_sysdev); +} diff --git a/arch/arm/mach-s5p6442/include/mach/debug-macro.S b/arch/arm/mach-s5p6442/include/mach/debug-macro.S new file mode 100644 index 00000000000..1aae691e58e --- /dev/null +++ b/arch/arm/mach-s5p6442/include/mach/debug-macro.S @@ -0,0 +1,36 @@ +/* linux/arch/arm/mach-s5p6442/include/mach/debug-macro.S + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Based on arch/arm/mach-s3c6400/include/mach/debug-macro.S + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/* pull in the relevant register and map files. */ + +#include <mach/map.h> +#include <plat/regs-serial.h> + + .macro addruart, rx + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 + ldreq \rx, = S3C_PA_UART + ldrne \rx, = S3C_VA_UART +#if CONFIG_DEBUG_S3C_UART != 0 + add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) +#endif + .endm + +#define fifo_full fifo_full_s5pv210 +#define fifo_level fifo_level_s5pv210 + +/* include the reset of the code which will do the work, we're only + * compiling for a single cpu processor type so the default of s3c2440 + * will be fine with us. + */ + +#include <plat/debug-macro.S> diff --git a/arch/arm/mach-s5p6442/include/mach/entry-macro.S b/arch/arm/mach-s5p6442/include/mach/entry-macro.S new file mode 100644 index 00000000000..6d574edbf1a --- /dev/null +++ b/arch/arm/mach-s5p6442/include/mach/entry-macro.S @@ -0,0 +1,48 @@ +/* linux/arch/arm/mach-s5p6442/include/mach/entry-macro.S + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Low-level IRQ helper macros for the Samsung S5P6442 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <asm/hardware/vic.h> +#include <mach/map.h> +#include <plat/irqs.h> + + .macro disable_fiq + .endm + + .macro get_irqnr_preamble, base, tmp + ldr \base, =VA_VIC0 + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + + @ check the vic0 + mov \irqnr, # S5P_IRQ_OFFSET + 31 + ldr \irqstat, [ \base, # VIC_IRQ_STATUS ] + teq \irqstat, #0 + + @ otherwise try vic1 + addeq \tmp, \base, #(VA_VIC1 - VA_VIC0) + addeq \irqnr, \irqnr, #32 + ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] + teqeq \irqstat, #0 + + @ otherwise try vic2 + addeq \tmp, \base, #(VA_VIC2 - VA_VIC0) + addeq \irqnr, \irqnr, #32 + ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] + teqeq \irqstat, #0 + + clzne \irqstat, \irqstat + subne \irqnr, \irqnr, \irqstat + .endm diff --git a/arch/arm/mach-s5p6442/include/mach/gpio.h b/arch/arm/mach-s5p6442/include/mach/gpio.h new file mode 100644 index 00000000000..b8715df2fda --- /dev/null +++ b/arch/arm/mach-s5p6442/include/mach/gpio.h @@ -0,0 +1,123 @@ +/* linux/arch/arm/mach-s5p6442/include/mach/gpio.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5P6442 - GPIO lib support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_GPIO_H +#define __ASM_ARCH_GPIO_H __FILE__ + +#define gpio_get_value __gpio_get_value +#define gpio_set_value __gpio_set_value +#define gpio_cansleep __gpio_cansleep +#define gpio_to_irq __gpio_to_irq + +/* GPIO bank sizes */ +#define S5P6442_GPIO_A0_NR (8) +#define S5P6442_GPIO_A1_NR (2) +#define S5P6442_GPIO_B_NR (4) +#define S5P6442_GPIO_C0_NR (5) +#define S5P6442_GPIO_C1_NR (5) +#define S5P6442_GPIO_D0_NR (2) +#define S5P6442_GPIO_D1_NR (6) +#define S5P6442_GPIO_E0_NR (8) +#define S5P6442_GPIO_E1_NR (5) +#define S5P6442_GPIO_F0_NR (8) +#define S5P6442_GPIO_F1_NR (8) +#define S5P6442_GPIO_F2_NR (8) +#define S5P6442_GPIO_F3_NR (6) +#define S5P6442_GPIO_G0_NR (7) +#define S5P6442_GPIO_G1_NR (7) +#define S5P6442_GPIO_G2_NR (7) +#define S5P6442_GPIO_H0_NR (8) +#define S5P6442_GPIO_H1_NR (8) +#define S5P6442_GPIO_H2_NR (8) +#define S5P6442_GPIO_H3_NR (8) +#define S5P6442_GPIO_J0_NR (8) +#define S5P6442_GPIO_J1_NR (6) +#define S5P6442_GPIO_J2_NR (8) +#define S5P6442_GPIO_J3_NR (8) +#define S5P6442_GPIO_J4_NR (5) + +/* GPIO bank numbers */ + +/* CONFIG_S3C_GPIO_SPACE allows the user to select extra + * space for debugging purposes so that any accidental + * change from one gpio bank to another can be caught. +*/ + +#define S5P6442_GPIO_NEXT(__gpio) \ + ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1) + +enum s5p_gpio_number { + S5P6442_GPIO_A0_START = 0, + S5P6442_GPIO_A1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_A0), + S5P6442_GPIO_B_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_A1), + S5P6442_GPIO_C0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_B), + S5P6442_GPIO_C1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_C0), + S5P6442_GPIO_D0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_C1), + S5P6442_GPIO_D1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_D0), + S5P6442_GPIO_E0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_D1), + S5P6442_GPIO_E1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_E0), + S5P6442_GPIO_F0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_E1), + S5P6442_GPIO_F1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_F0), + S5P6442_GPIO_F2_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_F1), + S5P6442_GPIO_F3_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_F2), + S5P6442_GPIO_G0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_F3), + S5P6442_GPIO_G1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_G0), + S5P6442_GPIO_G2_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_G1), + S5P6442_GPIO_H0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_G2), + S5P6442_GPIO_H1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_H0), + S5P6442_GPIO_H2_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_H1), + S5P6442_GPIO_H3_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_H2), + S5P6442_GPIO_J0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_H3), + S5P6442_GPIO_J1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_J0), + S5P6442_GPIO_J2_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_J1), + S5P6442_GPIO_J3_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_J2), + S5P6442_GPIO_J4_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_J3), +}; + +/* S5P6442 GPIO number definitions. */ +#define S5P6442_GPA0(_nr) (S5P6442_GPIO_A0_START + (_nr)) +#define S5P6442_GPA1(_nr) (S5P6442_GPIO_A1_START + (_nr)) +#define S5P6442_GPB(_nr) (S5P6442_GPIO_B_START + (_nr)) +#define S5P6442_GPC0(_nr) (S5P6442_GPIO_C0_START + (_nr)) +#define S5P6442_GPC1(_nr) (S5P6442_GPIO_C1_START + (_nr)) +#define S5P6442_GPD0(_nr) (S5P6442_GPIO_D0_START + (_nr)) +#define S5P6442_GPD1(_nr) (S5P6442_GPIO_D1_START + (_nr)) +#define S5P6442_GPE0(_nr) (S5P6442_GPIO_E0_START + (_nr)) +#define S5P6442_GPE1(_nr) (S5P6442_GPIO_E1_START + (_nr)) +#define S5P6442_GPF0(_nr) (S5P6442_GPIO_F0_START + (_nr)) +#define S5P6442_GPF1(_nr) (S5P6442_GPIO_F1_START + (_nr)) +#define S5P6442_GPF2(_nr) (S5P6442_GPIO_F2_START + (_nr)) +#define S5P6442_GPF3(_nr) (S5P6442_GPIO_F3_START + (_nr)) +#define S5P6442_GPG0(_nr) (S5P6442_GPIO_G0_START + (_nr)) +#define S5P6442_GPG1(_nr) (S5P6442_GPIO_G1_START + (_nr)) +#define S5P6442_GPG2(_nr) (S5P6442_GPIO_G2_START + (_nr)) +#define S5P6442_GPH0(_nr) (S5P6442_GPIO_H0_START + (_nr)) +#define S5P6442_GPH1(_nr) (S5P6442_GPIO_H1_START + (_nr)) +#define S5P6442_GPH2(_nr) (S5P6442_GPIO_H2_START + (_nr)) +#define S5P6442_GPH3(_nr) (S5P6442_GPIO_H3_START + (_nr)) +#define S5P6442_GPJ0(_nr) (S5P6442_GPIO_J0_START + (_nr)) +#define S5P6442_GPJ1(_nr) (S5P6442_GPIO_J1_START + (_nr)) +#define S5P6442_GPJ2(_nr) (S5P6442_GPIO_J2_START + (_nr)) +#define S5P6442_GPJ3(_nr) (S5P6442_GPIO_J3_START + (_nr)) +#define S5P6442_GPJ4(_nr) (S5P6442_GPIO_J4_START + (_nr)) + +/* the end of the S5P6442 specific gpios */ +#define S5P6442_GPIO_END (S5P6442_GPJ4(S5P6442_GPIO_J4_NR) + 1) +#define S3C_GPIO_END S5P6442_GPIO_END + +/* define the number of gpios we need to the one after the GPJ4() range */ +#define ARCH_NR_GPIOS (S5P6442_GPJ4(S5P6442_GPIO_J4_NR) + \ + CONFIG_SAMSUNG_GPIO_EXTRA + 1) + +#include <asm-generic/gpio.h> + +#endif /* __ASM_ARCH_GPIO_H */ diff --git a/arch/arm/mach-s5p6442/include/mach/hardware.h b/arch/arm/mach-s5p6442/include/mach/hardware.h new file mode 100644 index 00000000000..8cd7b67b49d --- /dev/null +++ b/arch/arm/mach-s5p6442/include/mach/hardware.h @@ -0,0 +1,18 @@ +/* linux/arch/arm/mach-s5p6442/include/mach/hardware.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5P6442 - Hardware support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H __FILE__ + +/* currently nothing here, placeholder */ + +#endif /* __ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/mach-s5p6442/include/mach/io.h b/arch/arm/mach-s5p6442/include/mach/io.h new file mode 100644 index 00000000000..5d2195ad0b6 --- /dev/null +++ b/arch/arm/mach-s5p6442/include/mach/io.h @@ -0,0 +1,17 @@ +/* arch/arm/mach-s5p6442/include/mach/io.h + * + * Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org> + * + * Default IO routines for S5P6442 + */ + +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H + +/* No current ISA/PCI bus support. */ +#define __io(a) __typesafe_io(a) +#define __mem_pci(a) (a) + +#define IO_SPACE_LIMIT (0xFFFFFFFF) + +#endif diff --git a/arch/arm/mach-s5p6442/include/mach/irqs.h b/arch/arm/mach-s5p6442/include/mach/irqs.h new file mode 100644 index 00000000000..da665809f6e --- /dev/null +++ b/arch/arm/mach-s5p6442/include/mach/irqs.h @@ -0,0 +1,86 @@ +/* linux/arch/arm/mach-s5p6442/include/mach/irqs.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5P6442 - IRQ definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_IRQS_H +#define __ASM_ARCH_IRQS_H __FILE__ + +#include <plat/irqs.h> + +/* VIC0 */ +#define IRQ_EINT16_31 S5P_IRQ_VIC0(16) +#define IRQ_BATF S5P_IRQ_VIC0(17) +#define IRQ_MDMA S5P_IRQ_VIC0(18) +#define IRQ_PDMA S5P_IRQ_VIC0(19) +#define IRQ_TIMER0_VIC S5P_IRQ_VIC0(21) +#define IRQ_TIMER1_VIC S5P_IRQ_VIC0(22) +#define IRQ_TIMER2_VIC S5P_IRQ_VIC0(23) +#define IRQ_TIMER3_VIC S5P_IRQ_VIC0(24) +#define IRQ_TIMER4_VIC S5P_IRQ_VIC0(25) +#define IRQ_SYSTIMER S5P_IRQ_VIC0(26) +#define IRQ_WDT S5P_IRQ_VIC0(27) +#define IRQ_RTC_ALARM S5P_IRQ_VIC0(28) +#define IRQ_RTC_TIC S5P_IRQ_VIC0(29) +#define IRQ_GPIOINT S5P_IRQ_VIC0(30) + +/* VIC1 */ +#define IRQ_nPMUIRQ S5P_IRQ_VIC1(0) +#define IRQ_ONENAND S5P_IRQ_VIC1(7) +#define IRQ_UART0 S5P_IRQ_VIC1(10) +#define IRQ_UART1 S5P_IRQ_VIC1(11) +#define IRQ_UART2 S5P_IRQ_VIC1(12) +#define IRQ_SPI0 S5P_IRQ_VIC1(15) +#define IRQ_IIC S5P_IRQ_VIC1(19) +#define IRQ_IIC1 S5P_IRQ_VIC1(20) +#define IRQ_IIC2 S5P_IRQ_VIC1(21) +#define IRQ_OTG S5P_IRQ_VIC1(24) +#define IRQ_MSM S5P_IRQ_VIC1(25) +#define IRQ_HSMMC0 S5P_IRQ_VIC1(26) +#define IRQ_HSMMC1 S5P_IRQ_VIC1(27) +#define IRQ_HSMMC2 S5P_IRQ_VIC1(28) +#define IRQ_COMMRX S5P_IRQ_VIC1(29) +#define IRQ_COMMTX S5P_IRQ_VIC1(30) + +/* VIC2 */ +#define IRQ_LCD0 S5P_IRQ_VIC2(0) +#define IRQ_LCD1 S5P_IRQ_VIC2(1) +#define IRQ_LCD2 S5P_IRQ_VIC2(2) +#define IRQ_LCD3 S5P_IRQ_VIC2(3) +#define IRQ_ROTATOR S5P_IRQ_VIC2(4) +#define IRQ_FIMC0 S5P_IRQ_VIC2(5) +#define IRQ_FIMC1 S5P_IRQ_VIC2(6) +#define IRQ_FIMC2 S5P_IRQ_VIC2(7) +#define IRQ_JPEG S5P_IRQ_VIC2(8) +#define IRQ_3D S5P_IRQ_VIC2(10) +#define IRQ_Mixer S5P_IRQ_VIC2(11) +#define IRQ_MFC S5P_IRQ_VIC2(14) +#define IRQ_TVENC S5P_IRQ_VIC2(15) +#define IRQ_I2S0 S5P_IRQ_VIC2(16) +#define IRQ_I2S1 S5P_IRQ_VIC2(17) +#define IRQ_RP S5P_IRQ_VIC2(19) +#define IRQ_PCM0 S5P_IRQ_VIC2(20) +#define IRQ_PCM1 S5P_IRQ_VIC2(21) +#define IRQ_ADC S5P_IRQ_VIC2(23) +#define IRQ_PENDN S5P_IRQ_VIC2(24) +#define IRQ_KEYPAD S5P_IRQ_VIC2(25) +#define IRQ_SSS_INT S5P_IRQ_VIC2(27) +#define IRQ_SSS_HASH S5P_IRQ_VIC2(28) +#define IRQ_VIC_END S5P_IRQ_VIC2(31) + +#define S5P_IRQ_EINT_BASE (IRQ_VIC_END + 1) + +#define IRQ_EINT(x) ((x) < 16 ? S5P_IRQ_VIC0(x) : \ + (S5P_IRQ_EINT_BASE + (x)-16)) +/* Set the default NR_IRQS */ + +#define NR_IRQS (IRQ_EINT(31) + 1) + +#endif /* __ASM_ARCH_IRQS_H */ diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h new file mode 100644 index 00000000000..685277d792f --- /dev/null +++ b/arch/arm/mach-s5p6442/include/mach/map.h @@ -0,0 +1,58 @@ +/* linux/arch/arm/mach-s5p6442/include/mach/map.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5P6442 - Memory map definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_MAP_H +#define __ASM_ARCH_MAP_H __FILE__ + +#include <plat/map-base.h> +#include <plat/map-s5p.h> + +#define S5P6442_PA_CHIPID (0xE0000000) +#define S5P_PA_CHIPID S5P6442_PA_CHIPID + +#define S5P6442_PA_SYSCON (0xE0100000) +#define S5P_PA_SYSCON S5P6442_PA_SYSCON + +#define S5P6442_PA_GPIO (0xE0200000) +#define S5P_PA_GPIO S5P6442_PA_GPIO + +#define S5P6442_PA_VIC0 (0xE4000000) +#define S5P_PA_VIC0 S5P6442_PA_VIC0 + +#define S5P6442_PA_VIC1 (0xE4100000) +#define S5P_PA_VIC1 S5P6442_PA_VIC1 + +#define S5P6442_PA_VIC2 (0xE4200000) +#define S5P_PA_VIC2 S5P6442_PA_VIC2 + +#define S5P6442_PA_TIMER (0xEA000000) +#define S5P_PA_TIMER S5P6442_PA_TIMER + +#define S5P6442_PA_SYSTIMER (0xEA100000) + +#define S5P6442_PA_UART (0xEC000000) + +#define S5P_PA_UART0 (S5P6442_PA_UART + 0x0) +#define S5P_PA_UART1 (S5P6442_PA_UART + 0x400) +#define S5P_PA_UART2 (S5P6442_PA_UART + 0x800) +#define S5P_SZ_UART SZ_256 + +#define S5P6442_PA_IIC0 (0xEC100000) + +#define S5P6442_PA_SDRAM (0x20000000) +#define S5P_PA_SDRAM S5P6442_PA_SDRAM + +/* compatibiltiy defines. */ +#define S3C_PA_UART S5P6442_PA_UART +#define S3C_PA_IIC S5P6442_PA_IIC0 + +#endif /* __ASM_ARCH_MAP_H */ diff --git a/arch/arm/mach-s5p6442/include/mach/memory.h b/arch/arm/mach-s5p6442/include/mach/memory.h new file mode 100644 index 00000000000..9ddd877ba2e --- /dev/null +++ b/arch/arm/mach-s5p6442/include/mach/memory.h @@ -0,0 +1,19 @@ +/* linux/arch/arm/mach-s5p6442/include/mach/memory.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5P6442 - Memory definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +#define PHYS_OFFSET UL(0x20000000) +#define CONSISTENT_DMA_SIZE SZ_8M + +#endif /* __ASM_ARCH_MEMORY_H */ diff --git a/arch/arm/mach-s5p6442/include/mach/pwm-clock.h b/arch/arm/mach-s5p6442/include/mach/pwm-clock.h new file mode 100644 index 00000000000..15e8525da0f --- /dev/null +++ b/arch/arm/mach-s5p6442/include/mach/pwm-clock.h @@ -0,0 +1,69 @@ +/* linux/arch/arm/mach-s5p6442/include/mach/pwm-clock.h + * + * Copyright 2008 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * http://armlinux.simtec.co.uk/ + * + * Copyright 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Based on arch/arm/plat-s3c24xx/include/mach/pwm-clock.h + * + * S5P6442 - pwm clock and timer support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_PWMCLK_H +#define __ASM_ARCH_PWMCLK_H __FILE__ + +/** + * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk + * @cfg: The timer TCFG1 register bits shifted down to 0. + * + * Return true if the given configuration from TCFG1 is a TCLK instead + * any of the TDIV clocks. + */ +static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) +{ + return tcfg == S3C2410_TCFG1_MUX_TCLK; +} + +/** + * tcfg_to_divisor() - convert tcfg1 setting to a divisor + * @tcfg1: The tcfg1 setting, shifted down. + * + * Get the divisor value for the given tcfg1 setting. We assume the + * caller has already checked to see if this is not a TCLK source. + */ +static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) +{ + return 1 << (1 + tcfg1); +} + +/** + * pwm_tdiv_has_div1() - does the tdiv setting have a /1 + * + * Return true if we have a /1 in the tdiv setting. + */ +static inline unsigned int pwm_tdiv_has_div1(void) +{ + return 0; +} + +/** + * pwm_tdiv_div_bits() - calculate TCFG1 divisor value. + * @div: The divisor to calculate the bit information for. + * + * Turn a divisor into the necessary bit field for TCFG1. + */ +static inline unsigned long pwm_tdiv_div_bits(unsigned int div) +{ + return ilog2(div) - 1; +} + +#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK + +#endif /* __ASM_ARCH_PWMCLK_H */ diff --git a/arch/arm/mach-s5p6442/include/mach/regs-clock.h b/arch/arm/mach-s5p6442/include/mach/regs-clock.h new file mode 100644 index 00000000000..d8360b5d4ec --- /dev/null +++ b/arch/arm/mach-s5p6442/include/mach/regs-clock.h @@ -0,0 +1,103 @@ +/* linux/arch/arm/mach-s5p6442/include/mach/regs-clock.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5P6442 - Clock register definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_REGS_CLOCK_H +#define __ASM_ARCH_REGS_CLOCK_H __FILE__ + +#include <mach/map.h> + +#define S5P_CLKREG(x) (S3C_VA_SYS + (x)) + +#define S5P_APLL_LOCK S5P_CLKREG(0x00) +#define S5P_MPLL_LOCK S5P_CLKREG(0x08) +#define S5P_EPLL_LOCK S5P_CLKREG(0x10) +#define S5P_VPLL_LOCK S5P_CLKREG(0x20) + +#define S5P_APLL_CON S5P_CLKREG(0x100) +#define S5P_MPLL_CON S5P_CLKREG(0x108) +#define S5P_EPLL_CON S5P_CLKREG(0x110) +#define S5P_VPLL_CON S5P_CLKREG(0x120) + +#define S5P_CLK_SRC0 S5P_CLKREG(0x200) +#define S5P_CLK_SRC1 S5P_CLKREG(0x204) +#define S5P_CLK_SRC2 S5P_CLKREG(0x208) +#define S5P_CLK_SRC3 S5P_CLKREG(0x20C) +#define S5P_CLK_SRC4 S5P_CLKREG(0x210) +#define S5P_CLK_SRC5 S5P_CLKREG(0x214) +#define S5P_CLK_SRC6 S5P_CLKREG(0x218) + +#define S5P_CLK_SRC_MASK0 S5P_CLKREG(0x280) +#define S5P_CLK_SRC_MASK1 S5P_CLKREG(0x284) + +#define S5P_CLK_DIV0 S5P_CLKREG(0x300) +#define S5P_CLK_DIV1 S5P_CLKREG(0x304) +#define S5P_CLK_DIV2 S5P_CLKREG(0x308) +#define S5P_CLK_DIV3 S5P_CLKREG(0x30C) +#define S5P_CLK_DIV4 S5P_CLKREG(0x310) +#define S5P_CLK_DIV5 S5P_CLKREG(0x314) +#define S5P_CLK_DIV6 S5P_CLKREG(0x318) + +#define S5P_CLKGATE_IP3 S5P_CLKREG(0x46C) + +/* CLK_OUT */ +#define S5P_CLK_OUT_SHIFT (12) +#define S5P_CLK_OUT_MASK (0x1F << S5P_CLK_OUT_SHIFT) +#define S5P_CLK_OUT S5P_CLKREG(0x500) + +#define S5P_CLK_DIV_STAT0 S5P_CLKREG(0x1000) +#define S5P_CLK_DIV_STAT1 S5P_CLKREG(0x1004) + +#define S5P_CLK_MUX_STAT0 S5P_CLKREG(0x1100) +#define S5P_CLK_MUX_STAT1 S5P_CLKREG(0x1104) + +#define S5P_MDNIE_SEL S5P_CLKREG(0x7008) + +/* Register Bit definition */ +#define S5P_EPLL_EN (1<<31) +#define S5P_EPLL_MASK 0xffffffff +#define S5P_EPLLVAL(_m, _p, _s) ((_m) << 16 | ((_p) << 8) | ((_s))) + +/* CLKDIV0 */ +#define S5P_CLKDIV0_APLL_SHIFT (0) +#define S5P_CLKDIV0_APLL_MASK (0x7 << S5P_CLKDIV0_APLL_SHIFT) +#define S5P_CLKDIV0_A2M_SHIFT (4) +#define S5P_CLKDIV0_A2M_MASK (0x7 << S5P_CLKDIV0_A2M_SHIFT) +#define S5P_CLKDIV0_D0CLK_SHIFT (16) +#define S5P_CLKDIV0_D0CLK_MASK (0xF << S5P_CLKDIV0_D0CLK_SHIFT) +#define S5P_CLKDIV0_P0CLK_SHIFT (20) +#define S5P_CLKDIV0_P0CLK_MASK (0x7 << S5P_CLKDIV0_P0CLK_SHIFT) +#define S5P_CLKDIV0_D1CLK_SHIFT (24) +#define S5P_CLKDIV0_D1CLK_MASK (0xF << S5P_CLKDIV0_D1CLK_SHIFT) +#define S5P_CLKDIV0_P1CLK_SHIFT (28) +#define S5P_CLKDIV0_P1CLK_MASK (0x7 << S5P_CLKDIV0_P1CLK_SHIFT) + +/* Clock MUX status Registers */ +#define S5P_CLK_MUX_STAT0_APLL_SHIFT (0) +#define S5P_CLK_MUX_STAT0_APLL_MASK (0x7 << S5P_CLK_MUX_STAT0_APLL_SHIFT) +#define S5P_CLK_MUX_STAT0_MPLL_SHIFT (4) +#define S5P_CLK_MUX_STAT0_MPLL_MASK (0x7 << S5P_CLK_MUX_STAT0_MPLL_SHIFT) +#define S5P_CLK_MUX_STAT0_EPLL_SHIFT (8) +#define S5P_CLK_MUX_STAT0_EPLL_MASK (0x7 << S5P_CLK_MUX_STAT0_EPLL_SHIFT) +#define S5P_CLK_MUX_STAT0_VPLL_SHIFT (12) +#define S5P_CLK_MUX_STAT0_VPLL_MASK (0x7 << S5P_CLK_MUX_STAT0_VPLL_SHIFT) +#define S5P_CLK_MUX_STAT0_MUXARM_SHIFT (16) +#define S5P_CLK_MUX_STAT0_MUXARM_MASK (0x7 << S5P_CLK_MUX_STAT0_MUXARM_SHIFT) +#define S5P_CLK_MUX_STAT0_MUXD0_SHIFT (20) +#define S5P_CLK_MUX_STAT0_MUXD0_MASK (0x7 << S5P_CLK_MUX_STAT0_MUXD0_SHIFT) +#define S5P_CLK_MUX_STAT0_MUXD1_SHIFT (24) +#define S5P_CLK_MUX_STAT0_MUXD1_MASK (0x7 << S5P_CLK_MUX_STAT0_MUXD1_SHIFT) +#define S5P_CLK_MUX_STAT1_D1SYNC_SHIFT (24) +#define S5P_CLK_MUX_STAT1_D1SYNC_MASK (0x7 << S5P_CLK_MUX_STAT1_D1SYNC_SHIFT) +#define S5P_CLK_MUX_STAT1_D0SYNC_SHIFT (28) +#define S5P_CLK_MUX_STAT1_D0SYNC_MASK (0x7 << S5P_CLK_MUX_STAT1_D0SYNC_SHIFT) + +#endif /* __ASM_ARCH_REGS_CLOCK_H */ diff --git a/arch/arm/mach-s5p6442/include/mach/regs-irq.h b/arch/arm/mach-s5p6442/include/mach/regs-irq.h new file mode 100644 index 00000000000..73782b52a83 --- /dev/null +++ b/arch/arm/mach-s5p6442/include/mach/regs-irq.h @@ -0,0 +1,19 @@ +/* linux/arch/arm/mach-s5p6442/include/mach/regs-irq.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5P6442 - IRQ register definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_REGS_IRQ_H +#define __ASM_ARCH_REGS_IRQ_H __FILE__ + +#include <asm/hardware/vic.h> +#include <mach/map.h> + +#endif /* __ASM_ARCH_REGS_IRQ_H */ diff --git a/arch/arm/mach-s5p6442/include/mach/system.h b/arch/arm/mach-s5p6442/include/mach/system.h new file mode 100644 index 00000000000..8bcd8ed0c3c --- /dev/null +++ b/arch/arm/mach-s5p6442/include/mach/system.h @@ -0,0 +1,26 @@ +/* linux/arch/arm/mach-s5p6442/include/mach/system.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5P6442 - system support header + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H __FILE__ + +static void arch_idle(void) +{ + /* nothing here yet */ +} + +static void arch_reset(char mode, const char *cmd) +{ + /* nothing here yet */ +} + +#endif /* __ASM_ARCH_SYSTEM_H */ diff --git a/arch/arm/mach-s5p6442/include/mach/tick.h b/arch/arm/mach-s5p6442/include/mach/tick.h new file mode 100644 index 00000000000..e1d4cabf829 --- /dev/null +++ b/arch/arm/mach-s5p6442/include/mach/tick.h @@ -0,0 +1,26 @@ +/* linux/arch/arm/mach-s5p6442/include/mach/tick.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Based on arch/arm/mach-s3c6400/include/mach/tick.h + * + * S5P6442 - Timer tick support definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_TICK_H +#define __ASM_ARCH_TICK_H __FILE__ + +static inline u32 s3c24xx_ostimer_pending(void) +{ + u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS); + return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0))); +} + +#define TICK_MAX (0xffffffff) + +#endif /* __ASM_ARCH_TICK_H */ diff --git a/arch/arm/mach-s5p6442/include/mach/timex.h b/arch/arm/mach-s5p6442/include/mach/timex.h new file mode 100644 index 00000000000..ff8f2fcadeb --- /dev/null +++ b/arch/arm/mach-s5p6442/include/mach/timex.h @@ -0,0 +1,24 @@ +/* arch/arm/mach-s5p6442/include/mach/timex.h + * + * Copyright (c) 2003-2010 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * S5P6442 - time parameters + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_TIMEX_H +#define __ASM_ARCH_TIMEX_H + +/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it + * a variable is useless. It seems as long as we make our timers an + * exact multiple of HZ, any value that makes a 1->1 correspondence + * for the time conversion functions to/from jiffies is acceptable. +*/ + +#define CLOCK_TICK_RATE 12000000 + +#endif /* __ASM_ARCH_TIMEX_H */ diff --git a/arch/arm/mach-s5p6442/include/mach/uncompress.h b/arch/arm/mach-s5p6442/include/mach/uncompress.h new file mode 100644 index 00000000000..5ac7cbeeb98 --- /dev/null +++ b/arch/arm/mach-s5p6442/include/mach/uncompress.h @@ -0,0 +1,24 @@ +/* linux/arch/arm/mach-s5p6442/include/mach/uncompress.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5P6442 - uncompress code + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_UNCOMPRESS_H +#define __ASM_ARCH_UNCOMPRESS_H + +#include <mach/map.h> +#include <plat/uncompress.h> + +static void arch_detect_cpu(void) +{ + /* we do not need to do any cpu detection here at the moment. */ +} + +#endif /* __ASM_ARCH_UNCOMPRESS_H */ diff --git a/arch/arm/mach-s5p6442/include/mach/vmalloc.h b/arch/arm/mach-s5p6442/include/mach/vmalloc.h new file mode 100644 index 00000000000..be3333688c2 --- /dev/null +++ b/arch/arm/mach-s5p6442/include/mach/vmalloc.h @@ -0,0 +1,17 @@ +/* arch/arm/mach-s5p6442/include/mach/vmalloc.h + * + * Copyright 2010 Ben Dooks <ben-linux@fluff.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * S5P6442 vmalloc definition +*/ + +#ifndef __ASM_ARCH_VMALLOC_H +#define __ASM_ARCH_VMALLOC_H + +#define VMALLOC_END (0xE0000000) + +#endif /* __ASM_ARCH_VMALLOC_H */ diff --git a/arch/arm/mach-s5p6442/init.c b/arch/arm/mach-s5p6442/init.c new file mode 100644 index 00000000000..1874bdb71e1 --- /dev/null +++ b/arch/arm/mach-s5p6442/init.c @@ -0,0 +1,44 @@ +/* linux/arch/arm/mach-s5p6442/s5p6442-init.c + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/init.h> +#include <linux/serial_core.h> + +#include <plat/cpu.h> +#include <plat/devs.h> +#include <plat/s5p6442.h> +#include <plat/regs-serial.h> + +static struct s3c24xx_uart_clksrc s5p6442_serial_clocks[] = { + [0] = { + .name = "pclk", + .divisor = 1, + .min_baud = 0, + .max_baud = 0, + }, +}; + +/* uart registration process */ +void __init s5p6442_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) +{ + struct s3c2410_uartcfg *tcfg = cfg; + u32 ucnt; + + for (ucnt = 0; ucnt < no; ucnt++, tcfg++) { + if (!tcfg->clocks) { + tcfg->clocks = s5p6442_serial_clocks; + tcfg->clocks_size = ARRAY_SIZE(s5p6442_serial_clocks); + } + } + + s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no); +} diff --git a/arch/arm/mach-s5p6442/mach-smdk6442.c b/arch/arm/mach-s5p6442/mach-smdk6442.c new file mode 100644 index 00000000000..0d63371ce07 --- /dev/null +++ b/arch/arm/mach-s5p6442/mach-smdk6442.c @@ -0,0 +1,91 @@ +/* linux/arch/arm/mach-s5p6442/mach-smdk6442.c + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/init.h> +#include <linux/serial_core.h> + +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/setup.h> +#include <asm/mach-types.h> + +#include <mach/map.h> +#include <mach/regs-clock.h> + +#include <plat/regs-serial.h> +#include <plat/s5p6442.h> +#include <plat/devs.h> +#include <plat/cpu.h> + +/* Following are default values for UCON, ULCON and UFCON UART registers */ +#define S5P6442_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ + S3C2410_UCON_RXILEVEL | \ + S3C2410_UCON_TXIRQMODE | \ + S3C2410_UCON_RXIRQMODE | \ + S3C2410_UCON_RXFIFO_TOI | \ + S3C2443_UCON_RXERR_IRQEN) + +#define S5P6442_ULCON_DEFAULT S3C2410_LCON_CS8 + +#define S5P6442_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ + S5PV210_UFCON_TXTRIG4 | \ + S5PV210_UFCON_RXTRIG4) + +static struct s3c2410_uartcfg smdk6442_uartcfgs[] __initdata = { + [0] = { + .hwport = 0, + .flags = 0, + .ucon = S5P6442_UCON_DEFAULT, + .ulcon = S5P6442_ULCON_DEFAULT, + .ufcon = S5P6442_UFCON_DEFAULT, + }, + [1] = { + .hwport = 1, + .flags = 0, + .ucon = S5P6442_UCON_DEFAULT, + .ulcon = S5P6442_ULCON_DEFAULT, + .ufcon = S5P6442_UFCON_DEFAULT, + }, + [2] = { + .hwport = 2, + .flags = 0, + .ucon = S5P6442_UCON_DEFAULT, + .ulcon = S5P6442_ULCON_DEFAULT, + .ufcon = S5P6442_UFCON_DEFAULT, + }, +}; + +static struct platform_device *smdk6442_devices[] __initdata = { +}; + +static void __init smdk6442_map_io(void) +{ + s5p_init_io(NULL, 0, S5P_VA_CHIPID); + s3c24xx_init_clocks(12000000); + s3c24xx_init_uarts(smdk6442_uartcfgs, ARRAY_SIZE(smdk6442_uartcfgs)); +} + +static void __init smdk6442_machine_init(void) +{ + platform_add_devices(smdk6442_devices, ARRAY_SIZE(smdk6442_devices)); +} + +MACHINE_START(SMDK6442, "SMDK6442") + /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ + .phys_io = S3C_PA_UART & 0xfff00000, + .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, + .boot_params = S5P_PA_SDRAM + 0x100, + .init_irq = s5p6442_init_irq, + .map_io = smdk6442_map_io, + .init_machine = smdk6442_machine_init, + .timer = &s3c24xx_timer, +MACHINE_END diff --git a/arch/arm/mach-s5pc100/include/mach/io.h b/arch/arm/mach-s5pc100/include/mach/io.h new file mode 100644 index 00000000000..819acf5eaf8 --- /dev/null +++ b/arch/arm/mach-s5pc100/include/mach/io.h @@ -0,0 +1,18 @@ +/* arch/arm/mach-s5pc100/include/mach/io.h + * + * Copyright 2008 Simtec Electronics + * Ben Dooks <ben-linux@fluff.org> + * + * Default IO routines for S5PC100 systems + */ + +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H + +/* No current ISA/PCI bus support. */ +#define __io(a) __typesafe_io(a) +#define __mem_pci(a) (a) + +#define IO_SPACE_LIMIT (0xFFFFFFFF) + +#endif diff --git a/arch/arm/mach-s5pc100/include/mach/timex.h b/arch/arm/mach-s5pc100/include/mach/timex.h new file mode 100644 index 00000000000..47ffb17aff9 --- /dev/null +++ b/arch/arm/mach-s5pc100/include/mach/timex.h @@ -0,0 +1,24 @@ +/* arch/arm/mach-s5pc100/include/mach/timex.h + * + * Copyright (c) 2003-2005 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * S3C6400 - time parameters + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_TIMEX_H +#define __ASM_ARCH_TIMEX_H + +/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it + * a variable is useless. It seems as long as we make our timers an + * exact multiple of HZ, any value that makes a 1->1 correspondence + * for the time conversion functions to/from jiffies is acceptable. +*/ + +#define CLOCK_TICK_RATE 12000000 + +#endif /* __ASM_ARCH_TIMEX_H */ diff --git a/arch/arm/mach-s5pc100/include/mach/vmalloc.h b/arch/arm/mach-s5pc100/include/mach/vmalloc.h new file mode 100644 index 00000000000..61b95158a43 --- /dev/null +++ b/arch/arm/mach-s5pc100/include/mach/vmalloc.h @@ -0,0 +1,17 @@ +/* arch/arm/mach-s5pc100/include/mach/vmalloc.h + * + * Copyright 2010 Ben Dooks <ben-linux@fluff.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * S3C6400 vmalloc definition +*/ + +#ifndef __ASM_ARCH_VMALLOC_H +#define __ASM_ARCH_VMALLOC_H + +#define VMALLOC_END (0xE0000000) + +#endif /* __ASM_ARCH_VMALLOC_H */ diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig new file mode 100644 index 00000000000..af33a1a89b7 --- /dev/null +++ b/arch/arm/mach-s5pv210/Kconfig @@ -0,0 +1,40 @@ +# arch/arm/mach-s5pv210/Kconfig +# +# Copyright (c) 2010 Samsung Electronics Co., Ltd. +# http://www.samsung.com/ +# +# Licensed under GPLv2 + +# Configuration options for the S5PV210/S5PC110 + +if ARCH_S5PV210 + +config CPU_S5PV210 + bool + select PLAT_S5P + help + Enable S5PV210 CPU support + +choice + prompt "Select machine type" + depends on ARCH_S5PV210 + default MACH_SMDKV210 + +config MACH_SMDKV210 + bool "SMDKV210" + select CPU_S5PV210 + select ARCH_SPARSEMEM_ENABLE + help + Machine support for Samsung SMDKV210 + +config MACH_SMDKC110 + bool "SMDKC110" + select CPU_S5PV210 + select ARCH_SPARSEMEM_ENABLE + help + Machine support for Samsung SMDKC110 + S5PC110(MCP) is one of package option of S5PV210 + +endchoice + +endif diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile new file mode 100644 index 00000000000..8ebf51c52a0 --- /dev/null +++ b/arch/arm/mach-s5pv210/Makefile @@ -0,0 +1,20 @@ +# arch/arm/mach-s5pv210/Makefile +# +# Copyright (c) 2010 Samsung Electronics Co., Ltd. +# http://www.samsung.com/ +# +# Licensed under GPLv2 + +obj-y := +obj-m := +obj-n := +obj- := + +# Core support for S5PV210 system + +obj-$(CONFIG_CPU_S5PV210) += cpu.o init.o clock.o + +# machine support + +obj-$(CONFIG_MACH_SMDKV210) += mach-smdkv210.o +obj-$(CONFIG_MACH_SMDKC110) += mach-smdkc110.o diff --git a/arch/arm/mach-s5pv210/Makefile.boot b/arch/arm/mach-s5pv210/Makefile.boot new file mode 100644 index 00000000000..ff90aa13bd6 --- /dev/null +++ b/arch/arm/mach-s5pv210/Makefile.boot @@ -0,0 +1,2 @@ + zreladdr-y := 0x20008000 +params_phys-y := 0x20000100 diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c new file mode 100644 index 00000000000..ccccae26235 --- /dev/null +++ b/arch/arm/mach-s5pv210/clock.c @@ -0,0 +1,454 @@ +/* linux/arch/arm/mach-s5pv210/clock.c + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5PV210 - Clock support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/list.h> +#include <linux/errno.h> +#include <linux/err.h> +#include <linux/clk.h> +#include <linux/sysdev.h> +#include <linux/io.h> + +#include <mach/map.h> + +#include <plat/cpu-freq.h> +#include <mach/regs-clock.h> +#include <plat/clock.h> +#include <plat/cpu.h> +#include <plat/pll.h> +#include <plat/s5p-clock.h> +#include <plat/clock-clksrc.h> +#include <plat/s5pv210.h> + +static int s5pv210_clk_ip0_ctrl(struct clk *clk, int enable) +{ + return s5p_gatectrl(S5P_CLKGATE_IP0, clk, enable); +} + +static int s5pv210_clk_ip1_ctrl(struct clk *clk, int enable) +{ + return s5p_gatectrl(S5P_CLKGATE_IP1, clk, enable); +} + +static int s5pv210_clk_ip2_ctrl(struct clk *clk, int enable) +{ + return s5p_gatectrl(S5P_CLKGATE_IP2, clk, enable); +} + +static int s5pv210_clk_ip3_ctrl(struct clk *clk, int enable) +{ + return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable); +} + +static struct clk clk_h200 = { + .name = "hclk200", + .id = -1, +}; + +static struct clk clk_h100 = { + .name = "hclk100", + .id = -1, +}; + +static struct clk clk_h166 = { + .name = "hclk166", + .id = -1, +}; + +static struct clk clk_h133 = { + .name = "hclk133", + .id = -1, +}; + +static struct clk clk_p100 = { + .name = "pclk100", + .id = -1, +}; + +static struct clk clk_p83 = { + .name = "pclk83", + .id = -1, +}; + +static struct clk clk_p66 = { + .name = "pclk66", + .id = -1, +}; + +static struct clk *sys_clks[] = { + &clk_h200, + &clk_h100, + &clk_h166, + &clk_h133, + &clk_p100, + &clk_p83, + &clk_p66 +}; + +static struct clk init_clocks_disable[] = { + { + .name = "rot", + .id = -1, + .parent = &clk_h166, + .enable = s5pv210_clk_ip0_ctrl, + .ctrlbit = (1<<29), + }, { + .name = "otg", + .id = -1, + .parent = &clk_h133, + .enable = s5pv210_clk_ip1_ctrl, + .ctrlbit = (1<<16), + }, { + .name = "usb-host", + .id = -1, + .parent = &clk_h133, + .enable = s5pv210_clk_ip1_ctrl, + .ctrlbit = (1<<17), + }, { + .name = "lcd", + .id = -1, + .parent = &clk_h166, + .enable = s5pv210_clk_ip1_ctrl, + .ctrlbit = (1<<0), + }, { + .name = "cfcon", + .id = 0, + .parent = &clk_h133, + .enable = s5pv210_clk_ip1_ctrl, + .ctrlbit = (1<<25), + }, { + .name = "hsmmc", + .id = 0, + .parent = &clk_h133, + .enable = s5pv210_clk_ip2_ctrl, + .ctrlbit = (1<<16), + }, { + .name = "hsmmc", + .id = 1, + .parent = &clk_h133, + .enable = s5pv210_clk_ip2_ctrl, + .ctrlbit = (1<<17), + }, { + .name = "hsmmc", + .id = 2, + .parent = &clk_h133, + .enable = s5pv210_clk_ip2_ctrl, + .ctrlbit = (1<<18), + }, { + .name = "hsmmc", + .id = 3, + .parent = &clk_h133, + .enable = s5pv210_clk_ip2_ctrl, + .ctrlbit = (1<<19), + }, { + .name = "systimer", + .id = -1, + .parent = &clk_p66, + .enable = s5pv210_clk_ip3_ctrl, + .ctrlbit = (1<<16), + }, { + .name = "watchdog", + .id = -1, + .parent = &clk_p66, + .enable = s5pv210_clk_ip3_ctrl, + .ctrlbit = (1<<22), + }, { + .name = "rtc", + .id = -1, + .parent = &clk_p66, + .enable = s5pv210_clk_ip3_ctrl, + .ctrlbit = (1<<15), + }, { + .name = "i2c", + .id = 0, + .parent = &clk_p66, + .enable = s5pv210_clk_ip3_ctrl, + .ctrlbit = (1<<7), + }, { + .name = "i2c", + .id = 1, + .parent = &clk_p66, + .enable = s5pv210_clk_ip3_ctrl, + .ctrlbit = (1<<8), + }, { + .name = "i2c", + .id = 2, + .parent = &clk_p66, + .enable = s5pv210_clk_ip3_ctrl, + .ctrlbit = (1<<9), + }, { + .name = "spi", + .id = 0, + .parent = &clk_p66, + .enable = s5pv210_clk_ip3_ctrl, + .ctrlbit = (1<<12), + }, { + .name = "spi", + .id = 1, + .parent = &clk_p66, + .enable = s5pv210_clk_ip3_ctrl, + .ctrlbit = (1<<13), + }, { + .name = "spi", + .id = 2, + .parent = &clk_p66, + .enable = s5pv210_clk_ip3_ctrl, + .ctrlbit = (1<<14), + }, { + .name = "timers", + .id = -1, + .parent = &clk_p66, + .enable = s5pv210_clk_ip3_ctrl, + .ctrlbit = (1<<23), + }, { + .name = "adc", + .id = -1, + .parent = &clk_p66, + .enable = s5pv210_clk_ip3_ctrl, + .ctrlbit = (1<<24), + }, { + .name = "keypad", + .id = -1, + .parent = &clk_p66, + .enable = s5pv210_clk_ip3_ctrl, + .ctrlbit = (1<<21), + }, { + .name = "i2s_v50", + .id = 0, + .parent = &clk_p, + .enable = s5pv210_clk_ip3_ctrl, + .ctrlbit = (1<<4), + }, { + .name = "i2s_v32", + .id = 0, + .parent = &clk_p, + .enable = s5pv210_clk_ip3_ctrl, + .ctrlbit = (1<<4), + }, { + .name = "i2s_v32", + .id = 1, + .parent = &clk_p, + .enable = s5pv210_clk_ip3_ctrl, + .ctrlbit = (1<<4), + } +}; + +static struct clk init_clocks[] = { + { + .name = "uart", + .id = 0, + .parent = &clk_p66, + .enable = s5pv210_clk_ip3_ctrl, + .ctrlbit = (1<<7), + }, { + .name = "uart", + .id = 1, + .parent = &clk_p66, + .enable = s5pv210_clk_ip3_ctrl, + .ctrlbit = (1<<8), + }, { + .name = "uart", + .id = 2, + .parent = &clk_p66, + .enable = s5pv210_clk_ip3_ctrl, + .ctrlbit = (1<<9), + }, { + .name = "uart", + .id = 3, + .parent = &clk_p66, + .enable = s5pv210_clk_ip3_ctrl, + .ctrlbit = (1<<10), + }, +}; + +static struct clksrc_clk clk_mout_apll = { + .clk = { + .name = "mout_apll", + .id = -1, + }, + .sources = &clk_src_apll, + .reg_src = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 }, +}; + +static struct clksrc_clk clk_mout_epll = { + .clk = { + .name = "mout_epll", + .id = -1, + }, + .sources = &clk_src_epll, + .reg_src = { .reg = S5P_CLK_SRC0, .shift = 8, .size = 1 }, +}; + +static struct clksrc_clk clk_mout_mpll = { + .clk = { + .name = "mout_mpll", + .id = -1, + }, + .sources = &clk_src_mpll, + .reg_src = { .reg = S5P_CLK_SRC0, .shift = 4, .size = 1 }, +}; + +static struct clk *clkset_uart_list[] = { + [6] = &clk_mout_mpll.clk, + [7] = &clk_mout_epll.clk, +}; + +static struct clksrc_sources clkset_uart = { + .sources = clkset_uart_list, + .nr_sources = ARRAY_SIZE(clkset_uart_list), +}; + +static struct clksrc_clk clksrcs[] = { + { + .clk = { + .name = "uclk1", + .id = -1, + .ctrlbit = (1<<17), + .enable = s5pv210_clk_ip3_ctrl, + }, + .sources = &clkset_uart, + .reg_src = { .reg = S5P_CLK_SRC4, .shift = 16, .size = 4 }, + .reg_div = { .reg = S5P_CLK_DIV4, .shift = 16, .size = 4 }, + } +}; + +/* Clock initialisation code */ +static struct clksrc_clk *init_parents[] = { + &clk_mout_apll, + &clk_mout_epll, + &clk_mout_mpll, +}; + +#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1) + +void __init_or_cpufreq s5pv210_setup_clocks(void) +{ + struct clk *xtal_clk; + unsigned long xtal; + unsigned long armclk; + unsigned long hclk200; + unsigned long hclk166; + unsigned long hclk133; + unsigned long pclk100; + unsigned long pclk83; + unsigned long pclk66; + unsigned long apll; + unsigned long mpll; + unsigned long epll; + unsigned int ptr; + u32 clkdiv0, clkdiv1; + + printk(KERN_DEBUG "%s: registering clocks\n", __func__); + + clkdiv0 = __raw_readl(S5P_CLK_DIV0); + clkdiv1 = __raw_readl(S5P_CLK_DIV1); + + printk(KERN_DEBUG "%s: clkdiv0 = %08x, clkdiv1 = %08x\n", + __func__, clkdiv0, clkdiv1); + + xtal_clk = clk_get(NULL, "xtal"); + BUG_ON(IS_ERR(xtal_clk)); + + xtal = clk_get_rate(xtal_clk); + clk_put(xtal_clk); + + printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal); + + apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4508); + mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502); + epll = s5p_get_pll45xx(xtal, __raw_readl(S5P_EPLL_CON), pll_4500); + + printk(KERN_INFO "S5PV210: PLL settings, A=%ld, M=%ld, E=%ld", + apll, mpll, epll); + + armclk = apll / GET_DIV(clkdiv0, S5P_CLKDIV0_APLL); + if (__raw_readl(S5P_CLK_SRC0) & S5P_CLKSRC0_MUX200_MASK) + hclk200 = mpll / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK200); + else + hclk200 = armclk / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK200); + + if (__raw_readl(S5P_CLK_SRC0) & S5P_CLKSRC0_MUX166_MASK) { + hclk166 = apll / GET_DIV(clkdiv0, S5P_CLKDIV0_A2M); + hclk166 = hclk166 / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK166); + } else + hclk166 = mpll / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK166); + + if (__raw_readl(S5P_CLK_SRC0) & S5P_CLKSRC0_MUX133_MASK) { + hclk133 = apll / GET_DIV(clkdiv0, S5P_CLKDIV0_A2M); + hclk133 = hclk133 / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK133); + } else + hclk133 = mpll / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK133); + + pclk100 = hclk200 / GET_DIV(clkdiv0, S5P_CLKDIV0_PCLK100); + pclk83 = hclk166 / GET_DIV(clkdiv0, S5P_CLKDIV0_PCLK83); + pclk66 = hclk133 / GET_DIV(clkdiv0, S5P_CLKDIV0_PCLK66); + + printk(KERN_INFO "S5PV210: ARMCLK=%ld, HCLKM=%ld, HCLKD=%ld, \ + HCLKP=%ld, PCLKM=%ld, PCLKD=%ld, PCLKP=%ld\n", + armclk, hclk200, hclk166, hclk133, pclk100, pclk83, pclk66); + + clk_fout_apll.rate = apll; + clk_fout_mpll.rate = mpll; + clk_fout_epll.rate = epll; + + clk_f.rate = armclk; + clk_h.rate = hclk133; + clk_p.rate = pclk66; + clk_p66.rate = pclk66; + clk_p83.rate = pclk83; + clk_h133.rate = hclk133; + clk_h166.rate = hclk166; + clk_h200.rate = hclk200; + + for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++) + s3c_set_clksrc(init_parents[ptr], true); + + for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) + s3c_set_clksrc(&clksrcs[ptr], true); +} + +static struct clk *clks[] __initdata = { + &clk_mout_epll.clk, + &clk_mout_mpll.clk, +}; + +void __init s5pv210_register_clocks(void) +{ + struct clk *clkp; + int ret; + int ptr; + + ret = s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); + if (ret > 0) + printk(KERN_ERR "Failed to register %u clocks\n", ret); + + s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); + s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); + + ret = s3c24xx_register_clocks(sys_clks, ARRAY_SIZE(sys_clks)); + if (ret > 0) + printk(KERN_ERR "Failed to register system clocks\n"); + + clkp = init_clocks_disable; + for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { + ret = s3c24xx_register_clock(clkp); + if (ret < 0) { + printk(KERN_ERR "Failed to register clock %s (%d)\n", + clkp->name, ret); + } + (clkp->enable)(clkp, 0); + } + + s3c_pwmclk_init(); +} diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/cpu.c new file mode 100644 index 00000000000..0e0f8fde2aa --- /dev/null +++ b/arch/arm/mach-s5pv210/cpu.c @@ -0,0 +1,126 @@ +/* linux/arch/arm/mach-s5pv210/cpu.c + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/interrupt.h> +#include <linux/list.h> +#include <linux/timer.h> +#include <linux/init.h> +#include <linux/module.h> +#include <linux/clk.h> +#include <linux/io.h> +#include <linux/sysdev.h> +#include <linux/platform_device.h> + +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/mach/irq.h> + +#include <asm/proc-fns.h> +#include <mach/map.h> +#include <mach/regs-clock.h> + +#include <plat/cpu.h> +#include <plat/devs.h> +#include <plat/clock.h> +#include <plat/s5pv210.h> + +/* Initial IO mappings */ + +static struct map_desc s5pv210_iodesc[] __initdata = { + { + .virtual = (unsigned long)S5P_VA_SYSTIMER, + .pfn = __phys_to_pfn(S5PV210_PA_SYSTIMER), + .length = SZ_1M, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)VA_VIC2, + .pfn = __phys_to_pfn(S5PV210_PA_VIC2), + .length = SZ_16K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)VA_VIC3, + .pfn = __phys_to_pfn(S5PV210_PA_VIC3), + .length = SZ_16K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_SROMC, + .pfn = __phys_to_pfn(S5PV210_PA_SROMC), + .length = SZ_4K, + .type = MT_DEVICE, + } +}; + +static void s5pv210_idle(void) +{ + if (!need_resched()) + cpu_do_idle(); + + local_irq_enable(); +} + +/* s5pv210_map_io + * + * register the standard cpu IO areas +*/ + +void __init s5pv210_map_io(void) +{ + iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc)); +} + +void __init s5pv210_init_clocks(int xtal) +{ + printk(KERN_DEBUG "%s: initializing clocks\n", __func__); + + s3c24xx_register_baseclocks(xtal); + s5p_register_clocks(xtal); + s5pv210_register_clocks(); + s5pv210_setup_clocks(); +} + +void __init s5pv210_init_irq(void) +{ + u32 vic[4]; /* S5PV210 supports 4 VIC */ + + /* All the VICs are fully populated. */ + vic[0] = ~0; + vic[1] = ~0; + vic[2] = ~0; + vic[3] = ~0; + + s5p_init_irq(vic, ARRAY_SIZE(vic)); +} + +static struct sysdev_class s5pv210_sysclass = { + .name = "s5pv210-core", +}; + +static struct sys_device s5pv210_sysdev = { + .cls = &s5pv210_sysclass, +}; + +static int __init s5pv210_core_init(void) +{ + return sysdev_class_register(&s5pv210_sysclass); +} + +core_initcall(s5pv210_core_init); + +int __init s5pv210_init(void) +{ + printk(KERN_INFO "S5PV210: Initializing architecture\n"); + + /* set idle function */ + pm_idle = s5pv210_idle; + + return sysdev_register(&s5pv210_sysdev); +} diff --git a/arch/arm/mach-s5pv210/include/mach/debug-macro.S b/arch/arm/mach-s5pv210/include/mach/debug-macro.S new file mode 100644 index 00000000000..8aec853310a --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/debug-macro.S @@ -0,0 +1,42 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/debug-macro.S + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Based on arch/arm/mach-s3c6400/include/mach/debug-macro.S + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/* pull in the relevant register and map files. */ + +#include <mach/map.h> +#include <plat/regs-serial.h> + + /* note, for the boot process to work we have to keep the UART + * virtual address aligned to an 1MiB boundary for the L1 + * mapping the head code makes. We keep the UART virtual address + * aligned and add in the offset when we load the value here. + */ + + .macro addruart, rx + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 + ldreq \rx, = S3C_PA_UART + ldrne \rx, = S3C_VA_UART +#if CONFIG_DEBUG_S3C_UART != 0 + add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) +#endif + .endm + +#define fifo_full fifo_full_s5pv210 +#define fifo_level fifo_level_s5pv210 + +/* include the reset of the code which will do the work, we're only + * compiling for a single cpu processor type so the default of s3c2440 + * will be fine with us. + */ + +#include <plat/debug-macro.S> diff --git a/arch/arm/mach-s5pv210/include/mach/entry-macro.S b/arch/arm/mach-s5pv210/include/mach/entry-macro.S new file mode 100644 index 00000000000..3aa41ac59f0 --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/entry-macro.S @@ -0,0 +1,54 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/entry-macro.S + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Low-level IRQ helper macros for the Samsung S5PV210 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <asm/hardware/vic.h> +#include <mach/map.h> +#include <plat/irqs.h> + + .macro disable_fiq + .endm + + .macro get_irqnr_preamble, base, tmp + ldr \base, =VA_VIC0 + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + + @ check the vic0 + mov \irqnr, # S5P_IRQ_OFFSET + 31 + ldr \irqstat, [ \base, # VIC_IRQ_STATUS ] + teq \irqstat, #0 + + @ otherwise try vic1 + addeq \tmp, \base, #(VA_VIC1 - VA_VIC0) + addeq \irqnr, \irqnr, #32 + ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] + teqeq \irqstat, #0 + + @ otherwise try vic2 + addeq \tmp, \base, #(VA_VIC2 - VA_VIC0) + addeq \irqnr, \irqnr, #32 + ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] + teqeq \irqstat, #0 + + @ otherwise try vic3 + addeq \tmp, \base, #(VA_VIC3 - VA_VIC0) + addeq \irqnr, \irqnr, #32 + ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] + teqeq \irqstat, #0 + + clzne \irqstat, \irqstat + subne \irqnr, \irqnr, \irqstat + .endm diff --git a/arch/arm/mach-s5pv210/include/mach/gpio.h b/arch/arm/mach-s5pv210/include/mach/gpio.h new file mode 100644 index 00000000000..533b020e21e --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/gpio.h @@ -0,0 +1,129 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/gpio.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5PV210 - GPIO lib support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_GPIO_H +#define __ASM_ARCH_GPIO_H __FILE__ + +#define gpio_get_value __gpio_get_value +#define gpio_set_value __gpio_set_value +#define gpio_cansleep __gpio_cansleep +#define gpio_to_irq __gpio_to_irq + +/* GPIO bank sizes */ +#define S5PV210_GPIO_A0_NR (8) +#define S5PV210_GPIO_A1_NR (4) +#define S5PV210_GPIO_B_NR (8) +#define S5PV210_GPIO_C0_NR (5) +#define S5PV210_GPIO_C1_NR (5) +#define S5PV210_GPIO_D0_NR (4) +#define S5PV210_GPIO_D1_NR (6) +#define S5PV210_GPIO_E0_NR (8) +#define S5PV210_GPIO_E1_NR (5) +#define S5PV210_GPIO_F0_NR (8) +#define S5PV210_GPIO_F1_NR (8) +#define S5PV210_GPIO_F2_NR (8) +#define S5PV210_GPIO_F3_NR (6) +#define S5PV210_GPIO_G0_NR (7) +#define S5PV210_GPIO_G1_NR (7) +#define S5PV210_GPIO_G2_NR (7) +#define S5PV210_GPIO_G3_NR (7) +#define S5PV210_GPIO_H0_NR (8) +#define S5PV210_GPIO_H1_NR (8) +#define S5PV210_GPIO_H2_NR (8) +#define S5PV210_GPIO_H3_NR (8) +#define S5PV210_GPIO_I_NR (7) +#define S5PV210_GPIO_J0_NR (8) +#define S5PV210_GPIO_J1_NR (6) +#define S5PV210_GPIO_J2_NR (8) +#define S5PV210_GPIO_J3_NR (8) +#define S5PV210_GPIO_J4_NR (5) + +/* GPIO bank numbers */ + +/* CONFIG_S3C_GPIO_SPACE allows the user to select extra + * space for debugging purposes so that any accidental + * change from one gpio bank to another can be caught. +*/ + +#define S5PV210_GPIO_NEXT(__gpio) \ + ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1) + +enum s5p_gpio_number { + S5PV210_GPIO_A0_START = 0, + S5PV210_GPIO_A1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_A0), + S5PV210_GPIO_B_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_A1), + S5PV210_GPIO_C0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_B), + S5PV210_GPIO_C1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_C0), + S5PV210_GPIO_D0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_C1), + S5PV210_GPIO_D1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_D0), + S5PV210_GPIO_E0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_D1), + S5PV210_GPIO_E1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_E0), + S5PV210_GPIO_F0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_E1), + S5PV210_GPIO_F1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_F0), + S5PV210_GPIO_F2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_F1), + S5PV210_GPIO_F3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_F2), + S5PV210_GPIO_G0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_F3), + S5PV210_GPIO_G1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_G0), + S5PV210_GPIO_G2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_G1), + S5PV210_GPIO_G3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_G2), + S5PV210_GPIO_H0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_G3), + S5PV210_GPIO_H1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_H0), + S5PV210_GPIO_H2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_H1), + S5PV210_GPIO_H3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_H2), + S5PV210_GPIO_I_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_H3), + S5PV210_GPIO_J0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_I), + S5PV210_GPIO_J1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J0), + S5PV210_GPIO_J2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J1), + S5PV210_GPIO_J3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J2), + S5PV210_GPIO_J4_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J3), +}; + +/* S5PV210 GPIO number definitions */ +#define S5PV210_GPA0(_nr) (S5PV210_GPIO_A0_START + (_nr)) +#define S5PV210_GPA1(_nr) (S5PV210_GPIO_A1_START + (_nr)) +#define S5PV210_GPB(_nr) (S5PV210_GPIO_B_START + (_nr)) +#define S5PV210_GPC0(_nr) (S5PV210_GPIO_C0_START + (_nr)) +#define S5PV210_GPC1(_nr) (S5PV210_GPIO_C1_START + (_nr)) +#define S5PV210_GPD0(_nr) (S5PV210_GPIO_D0_START + (_nr)) +#define S5PV210_GPD1(_nr) (S5PV210_GPIO_D1_START + (_nr)) +#define S5PV210_GPE0(_nr) (S5PV210_GPIO_E0_START + (_nr)) +#define S5PV210_GPE1(_nr) (S5PV210_GPIO_E1_START + (_nr)) +#define S5PV210_GPF0(_nr) (S5PV210_GPIO_F0_START + (_nr)) +#define S5PV210_GPF1(_nr) (S5PV210_GPIO_F1_START + (_nr)) +#define S5PV210_GPF2(_nr) (S5PV210_GPIO_F2_START + (_nr)) +#define S5PV210_GPF3(_nr) (S5PV210_GPIO_F3_START + (_nr)) +#define S5PV210_GPG0(_nr) (S5PV210_GPIO_G0_START + (_nr)) +#define S5PV210_GPG1(_nr) (S5PV210_GPIO_G1_START + (_nr)) +#define S5PV210_GPG2(_nr) (S5PV210_GPIO_G2_START + (_nr)) +#define S5PV210_GPG3(_nr) (S5PV210_GPIO_G3_START + (_nr)) +#define S5PV210_GPH0(_nr) (S5PV210_GPIO_H0_START + (_nr)) +#define S5PV210_GPH1(_nr) (S5PV210_GPIO_H1_START + (_nr)) +#define S5PV210_GPH2(_nr) (S5PV210_GPIO_H2_START + (_nr)) +#define S5PV210_GPH3(_nr) (S5PV210_GPIO_H3_START + (_nr)) +#define S5PV210_GPI(_nr) (S5PV210_GPIO_I_START + (_nr)) +#define S5PV210_GPJ0(_nr) (S5PV210_GPIO_J0_START + (_nr)) +#define S5PV210_GPJ1(_nr) (S5PV210_GPIO_J1_START + (_nr)) +#define S5PV210_GPJ2(_nr) (S5PV210_GPIO_J2_START + (_nr)) +#define S5PV210_GPJ3(_nr) (S5PV210_GPIO_J3_START + (_nr)) +#define S5PV210_GPJ4(_nr) (S5PV210_GPIO_J4_START + (_nr)) + +/* the end of the S5PV210 specific gpios */ +#define S5PV210_GPIO_END (S5PV210_GPJ4(S5PV210_GPIO_J4_NR) + 1) +#define S3C_GPIO_END S5PV210_GPIO_END + +/* define the number of gpios we need to the one after the GPJ4() range */ +#define ARCH_NR_GPIOS (S5PV210_GPJ4(S5PV210_GPIO_J4_NR) + \ + CONFIG_SAMSUNG_GPIO_EXTRA + 1) + +#include <asm-generic/gpio.h> + +#endif /* __ASM_ARCH_GPIO_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/hardware.h b/arch/arm/mach-s5pv210/include/mach/hardware.h new file mode 100644 index 00000000000..fada7a392d0 --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/hardware.h @@ -0,0 +1,18 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/hardware.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5PV210 - Hardware support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H __FILE__ + +/* currently nothing here, placeholder */ + +#endif /* __ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/io.h b/arch/arm/mach-s5pv210/include/mach/io.h new file mode 100644 index 00000000000..5ab9d560bc8 --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/io.h @@ -0,0 +1,26 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/io.h + * + * Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org> + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Based on arch/arm/mach-s5p6442/include/mach/io.h + * + * Default IO routines for S5PV210 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H __FILE__ + +/* No current ISA/PCI bus support. */ +#define __io(a) __typesafe_io(a) +#define __mem_pci(a) (a) + +#define IO_SPACE_LIMIT (0xFFFFFFFF) + +#endif /* __ASM_ARM_ARCH_IO_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h new file mode 100644 index 00000000000..62c5175ef29 --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/irqs.h @@ -0,0 +1,146 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/irqs.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5PV210 - IRQ definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_IRQS_H +#define __ASM_ARCH_IRQS_H __FILE__ + +#include <plat/irqs.h> + +/* VIC0: System, DMA, Timer */ + +#define IRQ_EINT0 S5P_IRQ_VIC0(0) +#define IRQ_EINT1 S5P_IRQ_VIC0(1) +#define IRQ_EINT2 S5P_IRQ_VIC0(2) +#define IRQ_EINT3 S5P_IRQ_VIC0(3) +#define IRQ_EINT4 S5P_IRQ_VIC0(4) +#define IRQ_EINT5 S5P_IRQ_VIC0(5) +#define IRQ_EINT6 S5P_IRQ_VIC0(6) +#define IRQ_EINT7 S5P_IRQ_VIC0(7) +#define IRQ_EINT8 S5P_IRQ_VIC0(8) +#define IRQ_EINT9 S5P_IRQ_VIC0(9) +#define IRQ_EINT10 S5P_IRQ_VIC0(10) +#define IRQ_EINT11 S5P_IRQ_VIC0(11) +#define IRQ_EINT12 S5P_IRQ_VIC0(12) +#define IRQ_EINT13 S5P_IRQ_VIC0(13) +#define IRQ_EINT14 S5P_IRQ_VIC0(14) +#define IRQ_EINT15 S5P_IRQ_VIC0(15) +#define IRQ_EINT16_31 S5P_IRQ_VIC0(16) +#define IRQ_BATF S5P_IRQ_VIC0(17) +#define IRQ_MDMA S5P_IRQ_VIC0(18) +#define IRQ_PDMA0 S5P_IRQ_VIC0(19) +#define IRQ_PDMA1 S5P_IRQ_VIC0(20) +#define IRQ_TIMER0_VIC S5P_IRQ_VIC0(21) +#define IRQ_TIMER1_VIC S5P_IRQ_VIC0(22) +#define IRQ_TIMER2_VIC S5P_IRQ_VIC0(23) +#define IRQ_TIMER3_VIC S5P_IRQ_VIC0(24) +#define IRQ_TIMER4_VIC S5P_IRQ_VIC0(25) +#define IRQ_SYSTIMER S5P_IRQ_VIC0(26) +#define IRQ_WDT S5P_IRQ_VIC0(27) +#define IRQ_RTC_ALARM S5P_IRQ_VIC0(28) +#define IRQ_RTC_TIC S5P_IRQ_VIC0(29) +#define IRQ_GPIOINT S5P_IRQ_VIC0(30) +#define IRQ_FIMC3 S5P_IRQ_VIC0(31) + +/* VIC1: ARM, Power, Memory, Connectivity, Storage */ + +#define IRQ_CORTEX0 S5P_IRQ_VIC1(0) +#define IRQ_CORTEX1 S5P_IRQ_VIC1(1) +#define IRQ_CORTEX2 S5P_IRQ_VIC1(2) +#define IRQ_CORTEX3 S5P_IRQ_VIC1(3) +#define IRQ_CORTEX4 S5P_IRQ_VIC1(4) +#define IRQ_IEMAPC S5P_IRQ_VIC1(5) +#define IRQ_IEMIEC S5P_IRQ_VIC1(6) +#define IRQ_ONENAND S5P_IRQ_VIC1(7) +#define IRQ_NFC S5P_IRQ_VIC1(8) +#define IRQ_CFC S5P_IRQ_VIC1(9) +#define IRQ_UART0 S5P_IRQ_VIC1(10) +#define IRQ_UART1 S5P_IRQ_VIC1(11) +#define IRQ_UART2 S5P_IRQ_VIC1(12) +#define IRQ_UART3 S5P_IRQ_VIC1(13) +#define IRQ_IIC S5P_IRQ_VIC1(14) +#define IRQ_SPI0 S5P_IRQ_VIC1(15) +#define IRQ_SPI1 S5P_IRQ_VIC1(16) +#define IRQ_SPI2 S5P_IRQ_VIC1(17) +#define IRQ_IRDA S5P_IRQ_VIC1(18) +#define IRQ_CAN0 S5P_IRQ_VIC1(19) +#define IRQ_CAN1 S5P_IRQ_VIC1(20) +#define IRQ_HSIRX S5P_IRQ_VIC1(21) +#define IRQ_HSITX S5P_IRQ_VIC1(22) +#define IRQ_UHOST S5P_IRQ_VIC1(23) +#define IRQ_OTG S5P_IRQ_VIC1(24) +#define IRQ_MSM S5P_IRQ_VIC1(25) +#define IRQ_HSMMC0 S5P_IRQ_VIC1(26) +#define IRQ_HSMMC1 S5P_IRQ_VIC1(27) +#define IRQ_HSMMC2 S5P_IRQ_VIC1(28) +#define IRQ_MIPICSI S5P_IRQ_VIC1(29) +#define IRQ_MIPIDSI S5P_IRQ_VIC1(30) +#define IRQ_ONENAND_AUDI S5P_IRQ_VIC1(31) + +/* VIC2: Multimedia, Audio, Security */ + +#define IRQ_LCD0 S5P_IRQ_VIC2(0) +#define IRQ_LCD1 S5P_IRQ_VIC2(1) +#define IRQ_LCD2 S5P_IRQ_VIC2(2) +#define IRQ_LCD3 S5P_IRQ_VIC2(3) +#define IRQ_ROTATOR S5P_IRQ_VIC2(4) +#define IRQ_FIMC0 S5P_IRQ_VIC2(5) +#define IRQ_FIMC1 S5P_IRQ_VIC2(6) +#define IRQ_FIMC2 S5P_IRQ_VIC2(7) +#define IRQ_JPEG S5P_IRQ_VIC2(8) +#define IRQ_2D S5P_IRQ_VIC2(9) +#define IRQ_3D S5P_IRQ_VIC2(10) +#define IRQ_MIXER S5P_IRQ_VIC2(11) +#define IRQ_HDMI S5P_IRQ_VIC2(12) +#define IRQ_IIC1 S5P_IRQ_VIC2(13) +#define IRQ_MFC S5P_IRQ_VIC2(14) +#define IRQ_TVENC S5P_IRQ_VIC2(15) +#define IRQ_I2S0 S5P_IRQ_VIC2(16) +#define IRQ_I2S1 S5P_IRQ_VIC2(17) +#define IRQ_I2S2 S5P_IRQ_VIC2(18) +#define IRQ_AC97 S5P_IRQ_VIC2(19) +#define IRQ_PCM0 S5P_IRQ_VIC2(20) +#define IRQ_PCM1 S5P_IRQ_VIC2(21) +#define IRQ_SPDIF S5P_IRQ_VIC2(22) +#define IRQ_ADC S5P_IRQ_VIC2(23) +#define IRQ_PENDN S5P_IRQ_VIC2(24) +#define IRQ_TC IRQ_PENDN +#define IRQ_KEYPAD S5P_IRQ_VIC2(25) +#define IRQ_CG S5P_IRQ_VIC2(26) +#define IRQ_SEC S5P_IRQ_VIC2(27) +#define IRQ_SECRX S5P_IRQ_VIC2(28) +#define IRQ_SECTX S5P_IRQ_VIC2(29) +#define IRQ_SDMIRQ S5P_IRQ_VIC2(30) +#define IRQ_SDMFIQ S5P_IRQ_VIC2(31) + +/* VIC3: Etc */ + +#define IRQ_IPC S5P_IRQ_VIC3(0) +#define IRQ_HOSTIF S5P_IRQ_VIC3(1) +#define IRQ_MMC3 S5P_IRQ_VIC3(2) +#define IRQ_CEC S5P_IRQ_VIC3(3) +#define IRQ_TSI S5P_IRQ_VIC3(4) +#define IRQ_MDNIE0 S5P_IRQ_VIC3(5) +#define IRQ_MDNIE1 S5P_IRQ_VIC3(6) +#define IRQ_MDNIE2 S5P_IRQ_VIC3(7) +#define IRQ_MDNIE3 S5P_IRQ_VIC3(8) +#define IRQ_VIC_END S5P_IRQ_VIC3(31) + +#define S5P_IRQ_EINT_BASE (IRQ_VIC_END + 1) + +#define S5P_EINT(x) ((x) + S5P_IRQ_EINT_BASE) +#define IRQ_EINT(x) S5P_EINT(x) + +/* Set the default NR_IRQS */ + +#define NR_IRQS (IRQ_EINT(31) + 1) + +#endif /* ASM_ARCH_IRQS_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h new file mode 100644 index 00000000000..c22694c8231 --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/map.h @@ -0,0 +1,65 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/map.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5PV210 - Memory map definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_MAP_H +#define __ASM_ARCH_MAP_H __FILE__ + +#include <plat/map-base.h> +#include <plat/map-s5p.h> + +#define S5PV210_PA_CHIPID (0xE0000000) +#define S5P_PA_CHIPID S5PV210_PA_CHIPID + +#define S5PV210_PA_SYSCON (0xE0100000) +#define S5P_PA_SYSCON S5PV210_PA_SYSCON + +#define S5PV210_PA_GPIO (0xE0200000) +#define S5P_PA_GPIO S5PV210_PA_GPIO + +#define S5PV210_PA_IIC0 (0xE1800000) + +#define S5PV210_PA_TIMER (0xE2500000) +#define S5P_PA_TIMER S5PV210_PA_TIMER + +#define S5PV210_PA_SYSTIMER (0xE2600000) + +#define S5PV210_PA_UART (0xE2900000) + +#define S5P_PA_UART0 (S5PV210_PA_UART + 0x0) +#define S5P_PA_UART1 (S5PV210_PA_UART + 0x400) +#define S5P_PA_UART2 (S5PV210_PA_UART + 0x800) +#define S5P_PA_UART3 (S5PV210_PA_UART + 0xC00) + +#define S5P_SZ_UART SZ_256 + +#define S5PV210_PA_SROMC (0xE8000000) + +#define S5PV210_PA_VIC0 (0xF2000000) +#define S5P_PA_VIC0 S5PV210_PA_VIC0 + +#define S5PV210_PA_VIC1 (0xF2100000) +#define S5P_PA_VIC1 S5PV210_PA_VIC1 + +#define S5PV210_PA_VIC2 (0xF2200000) +#define S5P_PA_VIC2 S5PV210_PA_VIC2 + +#define S5PV210_PA_VIC3 (0xF2300000) +#define S5P_PA_VIC3 S5PV210_PA_VIC3 + +#define S5PV210_PA_SDRAM (0x20000000) +#define S5P_PA_SDRAM S5PV210_PA_SDRAM + +/* compatibiltiy defines. */ +#define S3C_PA_UART S5PV210_PA_UART +#define S3C_PA_IIC S5PV210_PA_IIC0 + +#endif /* __ASM_ARCH_MAP_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/memory.h b/arch/arm/mach-s5pv210/include/mach/memory.h new file mode 100644 index 00000000000..379117e2760 --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/memory.h @@ -0,0 +1,23 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/memory.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5PV210 - Memory definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +#define PHYS_OFFSET UL(0x20000000) +#define CONSISTENT_DMA_SIZE (SZ_8M + SZ_4M + SZ_2M) + +/* Maximum of 256MiB in one bank */ +#define MAX_PHYSMEM_BITS 32 +#define SECTION_SIZE_BITS 28 + +#endif /* __ASM_ARCH_MEMORY_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/pwm-clock.h b/arch/arm/mach-s5pv210/include/mach/pwm-clock.h new file mode 100644 index 00000000000..69027fea987 --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/pwm-clock.h @@ -0,0 +1,69 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/pwm-clock.h + * + * Copyright 2008 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * http://armlinux.simtec.co.uk/ + * + * Copyright (c) 2009 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Based on arch/arm/plat-s3c24xx/include/mach/pwm-clock.h + * + * S5PV210 - pwm clock and timer support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_PWMCLK_H +#define __ASM_ARCH_PWMCLK_H __FILE__ + +/** + * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk + * @cfg: The timer TCFG1 register bits shifted down to 0. + * + * Return true if the given configuration from TCFG1 is a TCLK instead + * any of the TDIV clocks. + */ +static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) +{ + return tcfg == S3C2410_TCFG1_MUX_TCLK; +} + +/** + * tcfg_to_divisor() - convert tcfg1 setting to a divisor + * @tcfg1: The tcfg1 setting, shifted down. + * + * Get the divisor value for the given tcfg1 setting. We assume the + * caller has already checked to see if this is not a TCLK source. + */ +static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) +{ + return 1 << (1 + tcfg1); +} + +/** + * pwm_tdiv_has_div1() - does the tdiv setting have a /1 + * + * Return true if we have a /1 in the tdiv setting. + */ +static inline unsigned int pwm_tdiv_has_div1(void) +{ + return 0; +} + +/** + * pwm_tdiv_div_bits() - calculate TCFG1 divisor value. + * @div: The divisor to calculate the bit information for. + * + * Turn a divisor into the necessary bit field for TCFG1. + */ +static inline unsigned long pwm_tdiv_div_bits(unsigned int div) +{ + return ilog2(div) - 1; +} + +#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK + +#endif /* __ASM_ARCH_PWMCLK_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h new file mode 100644 index 00000000000..e56e0e4673e --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h @@ -0,0 +1,169 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/regs-clock.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5PV210 - Clock register definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_REGS_CLOCK_H +#define __ASM_ARCH_REGS_CLOCK_H __FILE__ + +#include <mach/map.h> + +#define S5P_CLKREG(x) (S3C_VA_SYS + (x)) + +#define S5P_APLL_LOCK S5P_CLKREG(0x00) +#define S5P_MPLL_LOCK S5P_CLKREG(0x08) +#define S5P_EPLL_LOCK S5P_CLKREG(0x10) +#define S5P_VPLL_LOCK S5P_CLKREG(0x20) + +#define S5P_APLL_CON S5P_CLKREG(0x100) +#define S5P_MPLL_CON S5P_CLKREG(0x108) +#define S5P_EPLL_CON S5P_CLKREG(0x110) +#define S5P_VPLL_CON S5P_CLKREG(0x120) + +#define S5P_CLK_SRC0 S5P_CLKREG(0x200) +#define S5P_CLK_SRC1 S5P_CLKREG(0x204) +#define S5P_CLK_SRC2 S5P_CLKREG(0x208) +#define S5P_CLK_SRC3 S5P_CLKREG(0x20C) +#define S5P_CLK_SRC4 S5P_CLKREG(0x210) +#define S5P_CLK_SRC5 S5P_CLKREG(0x214) +#define S5P_CLK_SRC6 S5P_CLKREG(0x218) + +#define S5P_CLK_SRC_MASK0 S5P_CLKREG(0x280) +#define S5P_CLK_SRC_MASK1 S5P_CLKREG(0x284) + +#define S5P_CLK_DIV0 S5P_CLKREG(0x300) +#define S5P_CLK_DIV1 S5P_CLKREG(0x304) +#define S5P_CLK_DIV2 S5P_CLKREG(0x308) +#define S5P_CLK_DIV3 S5P_CLKREG(0x30C) +#define S5P_CLK_DIV4 S5P_CLKREG(0x310) +#define S5P_CLK_DIV5 S5P_CLKREG(0x314) +#define S5P_CLK_DIV6 S5P_CLKREG(0x318) +#define S5P_CLK_DIV7 S5P_CLKREG(0x31C) + +#define S5P_CLKGATE_MAIN0 S5P_CLKREG(0x400) +#define S5P_CLKGATE_MAIN1 S5P_CLKREG(0x404) +#define S5P_CLKGATE_MAIN2 S5P_CLKREG(0x408) + +#define S5P_CLKGATE_PERI0 S5P_CLKREG(0x420) +#define S5P_CLKGATE_PERI1 S5P_CLKREG(0x424) + +#define S5P_CLKGATE_SCLK0 S5P_CLKREG(0x440) +#define S5P_CLKGATE_SCLK1 S5P_CLKREG(0x444) +#define S5P_CLKGATE_IP0 S5P_CLKREG(0x460) +#define S5P_CLKGATE_IP1 S5P_CLKREG(0x464) +#define S5P_CLKGATE_IP2 S5P_CLKREG(0x468) +#define S5P_CLKGATE_IP3 S5P_CLKREG(0x46C) +#define S5P_CLKGATE_IP4 S5P_CLKREG(0x470) + +#define S5P_CLKGATE_BLOCK S5P_CLKREG(0x480) +#define S5P_CLKGATE_BUS0 S5P_CLKREG(0x484) +#define S5P_CLKGATE_BUS1 S5P_CLKREG(0x488) +#define S5P_CLK_OUT S5P_CLKREG(0x500) + +/* CLKSRC0 */ +#define S5P_CLKSRC0_MUX200_MASK (0x1<<16) +#define S5P_CLKSRC0_MUX166_MASK (0x1<<20) +#define S5P_CLKSRC0_MUX133_MASK (0x1<<24) + +/* CLKDIV0 */ +#define S5P_CLKDIV0_APLL_SHIFT (0) +#define S5P_CLKDIV0_APLL_MASK (0x7 << S5P_CLKDIV0_APLL_SHIFT) +#define S5P_CLKDIV0_A2M_SHIFT (4) +#define S5P_CLKDIV0_A2M_MASK (0x7 << S5P_CLKDIV0_A2M_SHIFT) +#define S5P_CLKDIV0_HCLK200_SHIFT (8) +#define S5P_CLKDIV0_HCLK200_MASK (0x7 << S5P_CLKDIV0_HCLK200_SHIFT) +#define S5P_CLKDIV0_PCLK100_SHIFT (12) +#define S5P_CLKDIV0_PCLK100_MASK (0x7 << S5P_CLKDIV0_PCLK100_SHIFT) +#define S5P_CLKDIV0_HCLK166_SHIFT (16) +#define S5P_CLKDIV0_HCLK166_MASK (0xF << S5P_CLKDIV0_HCLK166_SHIFT) +#define S5P_CLKDIV0_PCLK83_SHIFT (20) +#define S5P_CLKDIV0_PCLK83_MASK (0x7 << S5P_CLKDIV0_PCLK83_SHIFT) +#define S5P_CLKDIV0_HCLK133_SHIFT (24) +#define S5P_CLKDIV0_HCLK133_MASK (0xF << S5P_CLKDIV0_HCLK133_SHIFT) +#define S5P_CLKDIV0_PCLK66_SHIFT (28) +#define S5P_CLKDIV0_PCLK66_MASK (0x7 << S5P_CLKDIV0_PCLK66_SHIFT) + +/* Registers related to power management */ +#define S5P_PWR_CFG S5P_CLKREG(0xC000) +#define S5P_EINT_WAKEUP_MASK S5P_CLKREG(0xC004) +#define S5P_WAKEUP_MASK S5P_CLKREG(0xC008) +#define S5P_PWR_MODE S5P_CLKREG(0xC00C) +#define S5P_NORMAL_CFG S5P_CLKREG(0xC010) +#define S5P_IDLE_CFG S5P_CLKREG(0xC020) +#define S5P_STOP_CFG S5P_CLKREG(0xC030) +#define S5P_STOP_MEM_CFG S5P_CLKREG(0xC034) +#define S5P_SLEEP_CFG S5P_CLKREG(0xC040) + +#define S5P_OSC_FREQ S5P_CLKREG(0xC100) +#define S5P_OSC_STABLE S5P_CLKREG(0xC104) +#define S5P_PWR_STABLE S5P_CLKREG(0xC108) +#define S5P_MTC_STABLE S5P_CLKREG(0xC110) +#define S5P_CLAMP_STABLE S5P_CLKREG(0xC114) + +#define S5P_WAKEUP_STAT S5P_CLKREG(0xC200) +#define S5P_BLK_PWR_STAT S5P_CLKREG(0xC204) + +#define S5P_OTHERS S5P_CLKREG(0xE000) +#define S5P_OM_STAT S5P_CLKREG(0xE100) +#define S5P_USB_PHY_CONTROL S5P_CLKREG(0xE80C) +#define S5P_DAC_CONTROL S5P_CLKREG(0xE810) + +#define S5P_INFORM0 S5P_CLKREG(0xF000) +#define S5P_INFORM1 S5P_CLKREG(0xF004) +#define S5P_INFORM2 S5P_CLKREG(0xF008) +#define S5P_INFORM3 S5P_CLKREG(0xF00C) +#define S5P_INFORM4 S5P_CLKREG(0xF010) +#define S5P_INFORM5 S5P_CLKREG(0xF014) +#define S5P_INFORM6 S5P_CLKREG(0xF018) +#define S5P_INFORM7 S5P_CLKREG(0xF01C) + +#define S5P_RST_STAT S5P_CLKREG(0xA000) +#define S5P_OSC_CON S5P_CLKREG(0x8000) +#define S5P_MIPI_PHY_CON0 S5P_CLKREG(0x7200) +#define S5P_MIPI_PHY_CON1 S5P_CLKREG(0x7204) +#define S5P_MIPI_CONTROL S5P_CLKREG(0xE814) + +#define S5P_IDLE_CFG_TL_MASK (3 << 30) +#define S5P_IDLE_CFG_TM_MASK (3 << 28) +#define S5P_IDLE_CFG_TL_ON (2 << 30) +#define S5P_IDLE_CFG_TM_ON (2 << 28) +#define S5P_IDLE_CFG_DIDLE (1 << 0) + +#define S5P_CFG_WFI_CLEAN (~(3 << 8)) +#define S5P_CFG_WFI_IDLE (1 << 8) +#define S5P_CFG_WFI_STOP (2 << 8) +#define S5P_CFG_WFI_SLEEP (3 << 8) + +#define S5P_OTHER_SYS_INT 24 +#define S5P_OTHER_STA_TYPE 23 +#define S5P_OTHER_SYSC_INTOFF (1 << 0) +#define STA_TYPE_EXPON 0 +#define STA_TYPE_SFR 1 + +#define S5P_PWR_STA_EXP_SCALE 0 +#define S5P_PWR_STA_CNT 4 + +#define S5P_PWR_STABLE_COUNT 85500 + +#define S5P_SLEEP_CFG_OSC_EN (1 << 0) +#define S5P_SLEEP_CFG_USBOSC_EN (1 << 1) + +/* OTHERS Resgister */ +#define S5P_OTHERS_USB_SIG_MASK (1 << 16) +#define S5P_OTHERS_MIPI_DPHY_EN (1 << 28) + +/* MIPI */ +#define S5P_MIPI_DPHY_EN (3) + +/* S5P_DAC_CONTROL */ +#define S5P_DAC_ENABLE (1) +#define S5P_DAC_DISABLE (0) + +#endif /* __ASM_ARCH_REGS_CLOCK_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/regs-irq.h b/arch/arm/mach-s5pv210/include/mach/regs-irq.h new file mode 100644 index 00000000000..5c3b104a7c8 --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/regs-irq.h @@ -0,0 +1,19 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/regs-irq.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5PV210 - IRQ register definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_REGS_IRQ_H +#define __ASM_ARCH_REGS_IRQ_H __FILE__ + +#include <asm/hardware/vic.h> +#include <mach/map.h> + +#endif /* __ASM_ARCH_REGS_IRQ_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/system.h b/arch/arm/mach-s5pv210/include/mach/system.h new file mode 100644 index 00000000000..1ca04d5025b --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/system.h @@ -0,0 +1,26 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/system.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5PV210 - system support header + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H __FILE__ + +static void arch_idle(void) +{ + /* nothing here yet */ +} + +static void arch_reset(char mode, const char *cmd) +{ + /* nothing here yet */ +} + +#endif /* __ASM_ARCH_SYSTEM_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/tick.h b/arch/arm/mach-s5pv210/include/mach/tick.h new file mode 100644 index 00000000000..7993b3603cc --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/tick.h @@ -0,0 +1,26 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/tick.h + * + * Copyright (c) 2009 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Based on arch/arm/mach-s3c6400/include/mach/tick.h + * + * S5PV210 - Timer tick support definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_TICK_H +#define __ASM_ARCH_TICK_H __FILE__ + +static inline u32 s3c24xx_ostimer_pending(void) +{ + u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS); + return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0))); +} + +#define TICK_MAX (0xffffffff) + +#endif /* __ASM_ARCH_TICK_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/timex.h b/arch/arm/mach-s5pv210/include/mach/timex.h new file mode 100644 index 00000000000..73dc85496a8 --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/timex.h @@ -0,0 +1,29 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/timex.h + * + * Copyright (c) 2003-2010 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Based on arch/arm/mach-s5p6442/include/mach/timex.h + * + * S5PV210 - time parameters + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_TIMEX_H +#define __ASM_ARCH_TIMEX_H __FILE__ + +/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it + * a variable is useless. It seems as long as we make our timers an + * exact multiple of HZ, any value that makes a 1->1 correspondence + * for the time conversion functions to/from jiffies is acceptable. +*/ + +#define CLOCK_TICK_RATE 12000000 + +#endif /* __ASM_ARCH_TIMEX_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/uncompress.h b/arch/arm/mach-s5pv210/include/mach/uncompress.h new file mode 100644 index 00000000000..08ff2fda1fb --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/uncompress.h @@ -0,0 +1,24 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/uncompress.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5PV210 - uncompress code + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_UNCOMPRESS_H +#define __ASM_ARCH_UNCOMPRESS_H + +#include <mach/map.h> +#include <plat/uncompress.h> + +static void arch_detect_cpu(void) +{ + /* we do not need to do any cpu detection here at the moment. */ +} + +#endif /* __ASM_ARCH_UNCOMPRESS_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/vmalloc.h b/arch/arm/mach-s5pv210/include/mach/vmalloc.h new file mode 100644 index 00000000000..58f515e0747 --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/vmalloc.h @@ -0,0 +1,22 @@ +/* linux/arch/arm/mach-s5p6442/include/mach/vmalloc.h + * + * Copyright 2010 Ben Dooks <ben-linux@fluff.org> + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Based on arch/arm/mach-s5p6442/include/mach/vmalloc.h + * + * S5PV210 vmalloc definition + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_VMALLOC_H +#define __ASM_ARCH_VMALLOC_H __FILE__ + +#define VMALLOC_END (0xE0000000) + +#endif /* __ASM_ARCH_VMALLOC_H */ diff --git a/arch/arm/mach-s5pv210/init.c b/arch/arm/mach-s5pv210/init.c new file mode 100644 index 00000000000..4865ae2c475 --- /dev/null +++ b/arch/arm/mach-s5pv210/init.c @@ -0,0 +1,44 @@ +/* linux/arch/arm/mach-s5pv210/init.c + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/init.h> +#include <linux/serial_core.h> + +#include <plat/cpu.h> +#include <plat/devs.h> +#include <plat/s5pv210.h> +#include <plat/regs-serial.h> + +static struct s3c24xx_uart_clksrc s5pv210_serial_clocks[] = { + [0] = { + .name = "pclk", + .divisor = 1, + .min_baud = 0, + .max_baud = 0, + }, +}; + +/* uart registration process */ +void __init s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) +{ + struct s3c2410_uartcfg *tcfg = cfg; + u32 ucnt; + + for (ucnt = 0; ucnt < no; ucnt++, tcfg++) { + if (!tcfg->clocks) { + tcfg->clocks = s5pv210_serial_clocks; + tcfg->clocks_size = ARRAY_SIZE(s5pv210_serial_clocks); + } + } + + s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no); +} diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c new file mode 100644 index 00000000000..ab4869df30c --- /dev/null +++ b/arch/arm/mach-s5pv210/mach-smdkc110.c @@ -0,0 +1,98 @@ +/* linux/arch/arm/mach-s5pv210/mach-smdkc110.c + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/init.h> +#include <linux/serial_core.h> + +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/setup.h> +#include <asm/mach-types.h> + +#include <mach/map.h> +#include <mach/regs-clock.h> + +#include <plat/regs-serial.h> +#include <plat/s5pv210.h> +#include <plat/devs.h> +#include <plat/cpu.h> + +/* Following are default values for UCON, ULCON and UFCON UART registers */ +#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ + S3C2410_UCON_RXILEVEL | \ + S3C2410_UCON_TXIRQMODE | \ + S3C2410_UCON_RXIRQMODE | \ + S3C2410_UCON_RXFIFO_TOI | \ + S3C2443_UCON_RXERR_IRQEN) + +#define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8 + +#define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ + S5PV210_UFCON_TXTRIG4 | \ + S5PV210_UFCON_RXTRIG4) + +static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = { + [0] = { + .hwport = 0, + .flags = 0, + .ucon = S5PV210_UCON_DEFAULT, + .ulcon = S5PV210_ULCON_DEFAULT, + .ufcon = S5PV210_UFCON_DEFAULT, + }, + [1] = { + .hwport = 1, + .flags = 0, + .ucon = S5PV210_UCON_DEFAULT, + .ulcon = S5PV210_ULCON_DEFAULT, + .ufcon = S5PV210_UFCON_DEFAULT, + }, + [2] = { + .hwport = 2, + .flags = 0, + .ucon = S5PV210_UCON_DEFAULT, + .ulcon = S5PV210_ULCON_DEFAULT, + .ufcon = S5PV210_UFCON_DEFAULT, + }, + [3] = { + .hwport = 3, + .flags = 0, + .ucon = S5PV210_UCON_DEFAULT, + .ulcon = S5PV210_ULCON_DEFAULT, + .ufcon = S5PV210_UFCON_DEFAULT, + }, +}; + +static struct platform_device *smdkc110_devices[] __initdata = { +}; + +static void __init smdkc110_map_io(void) +{ + s5p_init_io(NULL, 0, S5P_VA_CHIPID); + s3c24xx_init_clocks(24000000); + s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs)); +} + +static void __init smdkc110_machine_init(void) +{ + platform_add_devices(smdkc110_devices, ARRAY_SIZE(smdkc110_devices)); +} + +MACHINE_START(SMDKC110, "SMDKC110") + /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ + .phys_io = S3C_PA_UART & 0xfff00000, + .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, + .boot_params = S5P_PA_SDRAM + 0x100, + .init_irq = s5pv210_init_irq, + .map_io = smdkc110_map_io, + .init_machine = smdkc110_machine_init, + .timer = &s3c24xx_timer, +MACHINE_END diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c new file mode 100644 index 00000000000..a2788325320 --- /dev/null +++ b/arch/arm/mach-s5pv210/mach-smdkv210.c @@ -0,0 +1,98 @@ +/* linux/arch/arm/mach-s5pv210/mach-smdkv210.c + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/init.h> +#include <linux/serial_core.h> + +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/setup.h> +#include <asm/mach-types.h> + +#include <mach/map.h> +#include <mach/regs-clock.h> + +#include <plat/regs-serial.h> +#include <plat/s5pv210.h> +#include <plat/devs.h> +#include <plat/cpu.h> + +/* Following are default values for UCON, ULCON and UFCON UART registers */ +#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ + S3C2410_UCON_RXILEVEL | \ + S3C2410_UCON_TXIRQMODE | \ + S3C2410_UCON_RXIRQMODE | \ + S3C2410_UCON_RXFIFO_TOI | \ + S3C2443_UCON_RXERR_IRQEN) + +#define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8 + +#define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ + S5PV210_UFCON_TXTRIG4 | \ + S5PV210_UFCON_RXTRIG4) + +static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = { + [0] = { + .hwport = 0, + .flags = 0, + .ucon = S5PV210_UCON_DEFAULT, + .ulcon = S5PV210_ULCON_DEFAULT, + .ufcon = S5PV210_UFCON_DEFAULT, + }, + [1] = { + .hwport = 1, + .flags = 0, + .ucon = S5PV210_UCON_DEFAULT, + .ulcon = S5PV210_ULCON_DEFAULT, + .ufcon = S5PV210_UFCON_DEFAULT, + }, + [2] = { + .hwport = 2, + .flags = 0, + .ucon = S5PV210_UCON_DEFAULT, + .ulcon = S5PV210_ULCON_DEFAULT, + .ufcon = S5PV210_UFCON_DEFAULT, + }, + [3] = { + .hwport = 3, + .flags = 0, + .ucon = S5PV210_UCON_DEFAULT, + .ulcon = S5PV210_ULCON_DEFAULT, + .ufcon = S5PV210_UFCON_DEFAULT, + }, +}; + +static struct platform_device *smdkv210_devices[] __initdata = { +}; + +static void __init smdkv210_map_io(void) +{ + s5p_init_io(NULL, 0, S5P_VA_CHIPID); + s3c24xx_init_clocks(24000000); + s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs)); +} + +static void __init smdkv210_machine_init(void) +{ + platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices)); +} + +MACHINE_START(SMDKV210, "SMDKV210") + /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ + .phys_io = S3C_PA_UART & 0xfff00000, + .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, + .boot_params = S5P_PA_SDRAM + 0x100, + .init_irq = s5pv210_init_irq, + .map_io = smdkv210_map_io, + .init_machine = smdkv210_machine_init, + .timer = &s3c24xx_timer, +MACHINE_END diff --git a/arch/arm/plat-s3c/Kconfig b/arch/arm/plat-s3c/Kconfig deleted file mode 100644 index 2367908c4f6..00000000000 --- a/arch/arm/plat-s3c/Kconfig +++ /dev/null @@ -1,96 +0,0 @@ -# Copyright 2007 Simtec Electronics -# -# Licensed under GPLv2 - -config PLAT_S3C - bool - depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX - default y - select NO_IOPORT - help - Base platform code for any Samsung S3C device - -# low-level serial option nodes - -if PLAT_S3C - -config CPU_LLSERIAL_S3C2410_ONLY - bool - default y if CPU_LLSERIAL_S3C2410 && !CPU_LLSERIAL_S3C2440 - -config CPU_LLSERIAL_S3C2440_ONLY - bool - default y if CPU_LLSERIAL_S3C2440 && !CPU_LLSERIAL_S3C2410 - -config CPU_LLSERIAL_S3C2410 - bool - help - Selected if there is an S3C2410 (or register compatible) serial - low-level implementation needed - -config CPU_LLSERIAL_S3C2440 - bool - help - Selected if there is an S3C2440 (or register compatible) serial - low-level implementation needed - -# boot configurations - -comment "Boot options" - -config S3C_BOOT_WATCHDOG - bool "S3C Initialisation watchdog" - depends on S3C2410_WATCHDOG - help - Say y to enable the watchdog during the kernel decompression - stage. If the kernel fails to uncompress, then the watchdog - will trigger a reset and the system should restart. - -config S3C_BOOT_ERROR_RESET - bool "S3C Reboot on decompression error" - help - Say y here to use the watchdog to reset the system if the - kernel decompressor detects an error during decompression. - -config S3C_BOOT_UART_FORCE_FIFO - bool "Force UART FIFO on during boot process" - default y - help - Say Y here to force the UART FIFOs on during the kernel - uncompressor - - -config S3C_LOWLEVEL_UART_PORT - int "S3C UART to use for low-level messages" - default 0 - help - Choice of which UART port to use for the low-level messages, - such as the `Uncompressing...` at start time. The value of - this configuration should be between zero and two. The port - must have been initialised by the boot-loader before use. - -# options for gpiolib support - -config S3C_GPIO_SPACE - int "Space between gpio banks" - default 0 - help - Add a number of spare GPIO entries between each bank for debugging - purposes. This allows any problems where an counter overflows from - one bank to another to be caught, at the expense of using a little - more memory. - -config S3C_GPIO_TRACK - bool - help - Internal configuration option to enable the s3c specific gpio - chip tracking if the platform requires it. - -# DMA - -config S3C_DMA - bool - help - Internal configuration for S3C DMA core - -endif diff --git a/arch/arm/plat-s3c/Makefile b/arch/arm/plat-s3c/Makefile deleted file mode 100644 index 89dbdb0adeb..00000000000 --- a/arch/arm/plat-s3c/Makefile +++ /dev/null @@ -1,23 +0,0 @@ -# arch/arm/plat-s3c/Makefile -# -# Copyright 2008 Simtec Electronics -# -# Licensed under GPLv2 - -obj-y := -obj-m := -obj-n := -obj- := - -# Core support for all Samsung SoCs - -obj-y += init.o -obj-y += time.o - -# DMA support - -obj-$(CONFIG_S3C_DMA) += dma.o - -# PM support - -obj-$(CONFIG_PM) += pm.o diff --git a/arch/arm/plat-s3c24xx/Kconfig b/arch/arm/plat-s3c24xx/Kconfig index a806f359ceb..6e93ef8f3d4 100644 --- a/arch/arm/plat-s3c24xx/Kconfig +++ b/arch/arm/plat-s3c24xx/Kconfig @@ -14,58 +14,40 @@ config PLAT_S3C24XX if PLAT_S3C24XX -# code that is shared between a number of the s3c24xx implementations +# low-level serial option nodes -config S3C2410_CLOCK +config CPU_LLSERIAL_S3C2410_ONLY bool - help - Clock code for the S3C2410, and similar processors which - is currently includes the S3C2410, S3C2440, S3C2442. + default y if CPU_LLSERIAL_S3C2410 && !CPU_LLSERIAL_S3C2440 -config S3C24XX_DCLK +config CPU_LLSERIAL_S3C2440_ONLY bool - help - Clock code for supporting DCLK/CLKOUT on S3C24XX architectures + default y if CPU_LLSERIAL_S3C2440 && !CPU_LLSERIAL_S3C2410 -config CPU_S3C244X +config CPU_LLSERIAL_S3C2410 bool - depends on ARCH_S3C2410 && (CPU_S3C2440 || CPU_S3C2442) - help - Support for S3C2440 and S3C2442 Samsung Mobile CPU based systems. - -config S3C2440_CPUFREQ - bool "S3C2440/S3C2442 CPU Frequency scaling support" - depends on CPU_FREQ_S3C24XX && (CPU_S3C2440 || CPU_S3C2442) - select S3C2410_CPUFREQ_UTILS - default y help - CPU Frequency scaling support for S3C2440 and S3C2442 SoC CPUs. + Selected if there is an S3C2410 (or register compatible) serial + low-level implementation needed -config S3C2440_XTAL_12000000 +config CPU_LLSERIAL_S3C2440 bool help - Indicate that the build needs to support 12MHz system - crystal. + Selected if there is an S3C2440 (or register compatible) serial + low-level implementation needed -config S3C2440_XTAL_16934400 - bool - help - Indicate that the build needs to support 16.9344MHz system - crystal. +# code that is shared between a number of the s3c24xx implementations -config S3C2440_PLL_12000000 +config S3C2410_CLOCK bool - depends on S3C2440_CPUFREQ && S3C2440_XTAL_12000000 - default y if CPU_FREQ_S3C24XX_PLL help - PLL tables for S3C2440 or S3C2442 CPUs with 12MHz crystals. + Clock code for the S3C2410, and similar processors which + is currently includes the S3C2410, S3C2440, S3C2442. -config S3C2440_PLL_16934400 +config S3C24XX_DCLK bool - depends on S3C2440_CPUFREQ && S3C2440_XTAL_16934400 - default y if CPU_FREQ_S3C24XX_PLL help - PLL tables for S3C2440 or S3C2442 CPUs with 16.934MHz crystals. + Clock code for supporting DCLK/CLKOUT on S3C24XX architectures config S3C24XX_PWM bool "PWM device support" @@ -74,7 +56,6 @@ config S3C24XX_PWM Support for exporting the PWM timer blocks via the pwm device system. - # gpio configurations config S3C24XX_GPIO_EXTRA diff --git a/arch/arm/plat-s3c24xx/Makefile b/arch/arm/plat-s3c24xx/Makefile index e0100266d03..c2237c41141 100644 --- a/arch/arm/plat-s3c24xx/Makefile +++ b/arch/arm/plat-s3c24xx/Makefile @@ -25,13 +25,6 @@ obj-$(CONFIG_CPU_FREQ_S3C24XX_DEBUGFS) += cpu-freq-debugfs.o # Architecture dependant builds -obj-$(CONFIG_CPU_S3C244X) += s3c244x.o -obj-$(CONFIG_CPU_S3C244X) += s3c244x-irq.o -obj-$(CONFIG_CPU_S3C244X) += s3c244x-clock.o -obj-$(CONFIG_S3C2440_CPUFREQ) += s3c2440-cpufreq.o -obj-$(CONFIG_S3C2440_PLL_12000000) += s3c2440-pll-12000000.o -obj-$(CONFIG_S3C2440_PLL_16934400) += s3c2440-pll-16934400.o - obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o obj-$(CONFIG_PM) += pm.o obj-$(CONFIG_PM) += irq-pm.o diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c index 4af9dd94879..9ca64df35bf 100644 --- a/arch/arm/plat-s3c24xx/cpu.c +++ b/arch/arm/plat-s3c24xx/cpu.c @@ -49,9 +49,7 @@ #include <plat/s3c2400.h> #include <plat/s3c2410.h> #include <plat/s3c2412.h> -#include "s3c244x.h" -#include <plat/s3c2440.h> -#include <plat/s3c2442.h> +#include <plat/s3c244x.h> #include <plat/s3c2443.h> /* table of supported CPUs */ diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c index 986d4e5408f..8c6de1c9968 100644 --- a/arch/arm/plat-s3c24xx/devs.c +++ b/arch/arm/plat-s3c24xx/devs.c @@ -158,9 +158,27 @@ void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd) } /* Touchscreen */ + +static struct resource s3c_ts_resource[] = { + [0] = { + .start = S3C24XX_PA_ADC, + .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_TC, + .end = IRQ_TC, + .flags = IORESOURCE_IRQ, + }, + +}; + struct platform_device s3c_device_ts = { .name = "s3c2410-ts", .id = -1, + .dev.parent = &s3c_device_adc.dev, + .num_resources = ARRAY_SIZE(s3c_ts_resource), + .resource = s3c_ts_resource, }; EXPORT_SYMBOL(s3c_device_ts); diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c index f0ea7943ac5..93827b3d4e8 100644 --- a/arch/arm/plat-s3c24xx/dma.c +++ b/arch/arm/plat-s3c24xx/dma.c @@ -33,7 +33,7 @@ #include <mach/dma.h> #include <mach/map.h> -#include <plat/dma-plat.h> +#include <plat/dma-s3c24xx.h> #include <plat/regs-dma.h> /* io map for dma */ diff --git a/arch/arm/plat-s3c/include/plat/audio-simtec.h b/arch/arm/plat-s3c24xx/include/plat/audio-simtec.h index 53a93656d5d..de5e88fdcb3 100644 --- a/arch/arm/plat-s3c/include/plat/audio-simtec.h +++ b/arch/arm/plat-s3c24xx/include/plat/audio-simtec.h @@ -1,4 +1,4 @@ -/* arch/arm/plat-s3c/include/plat/audio-simtec.h +/* arch/arm/plat-s3c24xx/include/plat/audio-simtec.h * * Copyright 2008 Simtec Electronics * http://armlinux.simtec.co.uk/ diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2440.h b/arch/arm/plat-s3c24xx/include/plat/s3c2440.h deleted file mode 100644 index 107853bf948..00000000000 --- a/arch/arm/plat-s3c24xx/include/plat/s3c2440.h +++ /dev/null @@ -1,17 +0,0 @@ -/* linux/include/asm-arm/plat-s3c24xx/s3c2440.h - * - * Copyright (c) 2004-2005 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * Header file for s3c2440 cpu support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifdef CONFIG_CPU_S3C2440 -extern int s3c2440_init(void); -#else -#define s3c2440_init NULL -#endif diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2442.h b/arch/arm/plat-s3c24xx/include/plat/s3c2442.h deleted file mode 100644 index 451a23a2092..00000000000 --- a/arch/arm/plat-s3c24xx/include/plat/s3c2442.h +++ /dev/null @@ -1,17 +0,0 @@ -/* linux/include/asm-arm/plat-s3c24xx/s3c2442.h - * - * Copyright (c) 2006 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * Header file for s3c2442 cpu support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifdef CONFIG_CPU_S3C2442 -extern int s3c2442_init(void); -#else -#define s3c2442_init NULL -#endif diff --git a/arch/arm/plat-s3c24xx/s3c244x.h b/arch/arm/plat-s3c24xx/include/plat/s3c244x.h index 6aab5eaae2b..307248d1ccb 100644 --- a/arch/arm/plat-s3c24xx/s3c244x.h +++ b/arch/arm/plat-s3c24xx/include/plat/s3c244x.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c24xx/s3c244x.h +/* linux/arch/arm/plat-s3c24xx/include/plat/s3c244x.h * * Copyright (c) 2004-2005 Simtec Electronics * Ben Dooks <ben@simtec.co.uk> @@ -23,3 +23,15 @@ extern void s3c244x_init_clocks(int xtal); #define s3c244x_init_uarts NULL #define s3c244x_map_io NULL #endif + +#ifdef CONFIG_CPU_S3C2440 +extern int s3c2440_init(void); +#else +#define s3c2440_init NULL +#endif + +#ifdef CONFIG_CPU_S3C2442 +extern int s3c2442_init(void); +#else +#define s3c2442_init NULL +#endif diff --git a/arch/arm/plat-s3c64xx/Kconfig b/arch/arm/plat-s3c64xx/Kconfig deleted file mode 100644 index 37b4519fb83..00000000000 --- a/arch/arm/plat-s3c64xx/Kconfig +++ /dev/null @@ -1,75 +0,0 @@ -# Copyright 2008 Openmoko, Inc. -# Copyright 2008 Simtec Electronics -# Ben Dooks <ben@simtec.co.uk> -# -# Licensed under GPLv2 - -config PLAT_S3C64XX - bool - depends on ARCH_S3C64XX - default y - select CPU_V6 - select PLAT_S3C - select ARM_VIC - select NO_IOPORT - select ARCH_REQUIRE_GPIOLIB - select SAMSUNG_CLKSRC - select SAMSUNG_IRQ_VIC_TIMER - select SAMSUNG_IRQ_UART - select S3C_GPIO_TRACK - select S3C_GPIO_PULL_UPDOWN - select S3C_GPIO_CFG_S3C24XX - select S3C_GPIO_CFG_S3C64XX - select S3C_DEV_NAND - select USB_ARCH_HAS_OHCI - select SAMSUNG_GPIOLIB_4BIT - help - Base platform code for any Samsung S3C64XX device - -if PLAT_S3C64XX - -# Configuration options shared by all S3C64XX implementations - -config CPU_S3C6400_INIT - bool - help - Common initialisation code for the S3C6400 that is shared - by other CPUs in the series, such as the S3C6410. - -config CPU_S3C6400_CLOCK - bool - help - Common clock support code for the S3C6400 that is shared - by other CPUs in the series, such as the S3C6410. - -config S3C64XX_DMA - bool "S3C64XX DMA" - select S3C_DMA - -# platform specific device setup - -config S3C64XX_SETUP_I2C0 - bool - default y - help - Common setup code for i2c bus 0. - - Note, currently since i2c0 is always compiled, this setup helper - is always compiled with it. - -config S3C64XX_SETUP_I2C1 - bool - help - Common setup code for i2c bus 1. - -config S3C64XX_SETUP_FB_24BPP - bool - help - Common setup code for S3C64XX with an 24bpp RGB display helper. - -config S3C64XX_SETUP_SDHCI_GPIO - bool - help - Common setup code for S3C64XX SDHCI GPIO configurations - -endif diff --git a/arch/arm/plat-s3c64xx/clock.c b/arch/arm/plat-s3c64xx/clock.c deleted file mode 100644 index 2989c3a2e94..00000000000 --- a/arch/arm/plat-s3c64xx/clock.c +++ /dev/null @@ -1,304 +0,0 @@ -/* linux/arch/arm/plat-s3c64xx/clock.c - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * S3C64XX Base clock support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/interrupt.h> -#include <linux/ioport.h> -#include <linux/io.h> - -#include <mach/hardware.h> -#include <mach/map.h> - -#include <plat/regs-sys.h> -#include <plat/regs-clock.h> -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/clock.h> - -struct clk clk_h2 = { - .name = "hclk2", - .id = -1, - .rate = 0, -}; - -struct clk clk_27m = { - .name = "clk_27m", - .id = -1, - .rate = 27000000, -}; - -static int clk_48m_ctrl(struct clk *clk, int enable) -{ - unsigned long flags; - u32 val; - - /* can't rely on clock lock, this register has other usages */ - local_irq_save(flags); - - val = __raw_readl(S3C64XX_OTHERS); - if (enable) - val |= S3C64XX_OTHERS_USBMASK; - else - val &= ~S3C64XX_OTHERS_USBMASK; - - __raw_writel(val, S3C64XX_OTHERS); - local_irq_restore(flags); - - return 0; -} - -struct clk clk_48m = { - .name = "clk_48m", - .id = -1, - .rate = 48000000, - .enable = clk_48m_ctrl, -}; - -static int inline s3c64xx_gate(void __iomem *reg, - struct clk *clk, - int enable) -{ - unsigned int ctrlbit = clk->ctrlbit; - u32 con; - - con = __raw_readl(reg); - - if (enable) - con |= ctrlbit; - else - con &= ~ctrlbit; - - __raw_writel(con, reg); - return 0; -} - -static int s3c64xx_pclk_ctrl(struct clk *clk, int enable) -{ - return s3c64xx_gate(S3C_PCLK_GATE, clk, enable); -} - -static int s3c64xx_hclk_ctrl(struct clk *clk, int enable) -{ - return s3c64xx_gate(S3C_HCLK_GATE, clk, enable); -} - -int s3c64xx_sclk_ctrl(struct clk *clk, int enable) -{ - return s3c64xx_gate(S3C_SCLK_GATE, clk, enable); -} - -static struct clk init_clocks_disable[] = { - { - .name = "nand", - .id = -1, - .parent = &clk_h, - }, { - .name = "adc", - .id = -1, - .parent = &clk_p, - .enable = s3c64xx_pclk_ctrl, - .ctrlbit = S3C_CLKCON_PCLK_TSADC, - }, { - .name = "i2c", - .id = -1, - .parent = &clk_p, - .enable = s3c64xx_pclk_ctrl, - .ctrlbit = S3C_CLKCON_PCLK_IIC, - }, { - .name = "iis", - .id = 0, - .parent = &clk_p, - .enable = s3c64xx_pclk_ctrl, - .ctrlbit = S3C_CLKCON_PCLK_IIS0, - }, { - .name = "iis", - .id = 1, - .parent = &clk_p, - .enable = s3c64xx_pclk_ctrl, - .ctrlbit = S3C_CLKCON_PCLK_IIS1, - }, { - .name = "spi", - .id = 0, - .parent = &clk_p, - .enable = s3c64xx_pclk_ctrl, - .ctrlbit = S3C_CLKCON_PCLK_SPI0, - }, { - .name = "spi", - .id = 1, - .parent = &clk_p, - .enable = s3c64xx_pclk_ctrl, - .ctrlbit = S3C_CLKCON_PCLK_SPI1, - }, { - .name = "spi_48m", - .id = 0, - .parent = &clk_48m, - .enable = s3c64xx_sclk_ctrl, - .ctrlbit = S3C_CLKCON_SCLK_SPI0_48, - }, { - .name = "spi_48m", - .id = 1, - .parent = &clk_48m, - .enable = s3c64xx_sclk_ctrl, - .ctrlbit = S3C_CLKCON_SCLK_SPI1_48, - }, { - .name = "48m", - .id = 0, - .parent = &clk_48m, - .enable = s3c64xx_sclk_ctrl, - .ctrlbit = S3C_CLKCON_SCLK_MMC0_48, - }, { - .name = "48m", - .id = 1, - .parent = &clk_48m, - .enable = s3c64xx_sclk_ctrl, - .ctrlbit = S3C_CLKCON_SCLK_MMC1_48, - }, { - .name = "48m", - .id = 2, - .parent = &clk_48m, - .enable = s3c64xx_sclk_ctrl, - .ctrlbit = S3C_CLKCON_SCLK_MMC2_48, - }, { - .name = "dma0", - .id = -1, - .parent = &clk_h, - .enable = s3c64xx_hclk_ctrl, - .ctrlbit = S3C_CLKCON_HCLK_DMA0, - }, { - .name = "dma1", - .id = -1, - .parent = &clk_h, - .enable = s3c64xx_hclk_ctrl, - .ctrlbit = S3C_CLKCON_HCLK_DMA1, - }, -}; - -static struct clk init_clocks[] = { - { - .name = "lcd", - .id = -1, - .parent = &clk_h, - .enable = s3c64xx_hclk_ctrl, - .ctrlbit = S3C_CLKCON_HCLK_LCD, - }, { - .name = "gpio", - .id = -1, - .parent = &clk_p, - .enable = s3c64xx_pclk_ctrl, - .ctrlbit = S3C_CLKCON_PCLK_GPIO, - }, { - .name = "usb-host", - .id = -1, - .parent = &clk_h, - .enable = s3c64xx_hclk_ctrl, - .ctrlbit = S3C_CLKCON_HCLK_UHOST, - }, { - .name = "hsmmc", - .id = 0, - .parent = &clk_h, - .enable = s3c64xx_hclk_ctrl, - .ctrlbit = S3C_CLKCON_HCLK_HSMMC0, - }, { - .name = "hsmmc", - .id = 1, - .parent = &clk_h, - .enable = s3c64xx_hclk_ctrl, - .ctrlbit = S3C_CLKCON_HCLK_HSMMC1, - }, { - .name = "hsmmc", - .id = 2, - .parent = &clk_h, - .enable = s3c64xx_hclk_ctrl, - .ctrlbit = S3C_CLKCON_HCLK_HSMMC2, - }, { - .name = "timers", - .id = -1, - .parent = &clk_p, - .enable = s3c64xx_pclk_ctrl, - .ctrlbit = S3C_CLKCON_PCLK_PWM, - }, { - .name = "uart", - .id = 0, - .parent = &clk_p, - .enable = s3c64xx_pclk_ctrl, - .ctrlbit = S3C_CLKCON_PCLK_UART0, - }, { - .name = "uart", - .id = 1, - .parent = &clk_p, - .enable = s3c64xx_pclk_ctrl, - .ctrlbit = S3C_CLKCON_PCLK_UART1, - }, { - .name = "uart", - .id = 2, - .parent = &clk_p, - .enable = s3c64xx_pclk_ctrl, - .ctrlbit = S3C_CLKCON_PCLK_UART2, - }, { - .name = "uart", - .id = 3, - .parent = &clk_p, - .enable = s3c64xx_pclk_ctrl, - .ctrlbit = S3C_CLKCON_PCLK_UART3, - }, { - .name = "rtc", - .id = -1, - .parent = &clk_p, - .enable = s3c64xx_pclk_ctrl, - .ctrlbit = S3C_CLKCON_PCLK_RTC, - }, { - .name = "watchdog", - .id = -1, - .parent = &clk_p, - .ctrlbit = S3C_CLKCON_PCLK_WDT, - }, { - .name = "ac97", - .id = -1, - .parent = &clk_p, - .ctrlbit = S3C_CLKCON_PCLK_AC97, - } -}; - -static struct clk *clks[] __initdata = { - &clk_ext, - &clk_epll, - &clk_27m, - &clk_48m, - &clk_h2, -}; - -void __init s3c64xx_register_clocks(void) -{ - struct clk *clkp; - int ret; - int ptr; - - s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); - s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); - - clkp = init_clocks_disable; - for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { - - ret = s3c24xx_register_clock(clkp); - if (ret < 0) { - printk(KERN_ERR "Failed to register clock %s (%d)\n", - clkp->name, ret); - } - - (clkp->enable)(clkp, 0); - } - - s3c_pwmclk_init(); -} diff --git a/arch/arm/plat-s3c64xx/s3c6400-init.c b/arch/arm/plat-s3c64xx/s3c6400-init.c deleted file mode 100644 index 6c28f39df09..00000000000 --- a/arch/arm/plat-s3c64xx/s3c6400-init.c +++ /dev/null @@ -1,29 +0,0 @@ -/* linux/arch/arm/plat-s3c64xx/s3c6400-init.c - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * S3C6400 - CPU initialisation (common with other S3C64XX chips) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/init.h> - -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/s3c6400.h> -#include <plat/s3c6410.h> - -/* uart registration process */ - -void __init s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) -{ - s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no); -} diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig index e7c31e7060e..d400a6a20fe 100644 --- a/arch/arm/plat-s5p/Kconfig +++ b/arch/arm/plat-s5p/Kconfig @@ -7,9 +7,8 @@ config PLAT_S5P bool - depends on ARCH_S5P6440 + depends on (ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PV210) default y - select PLAT_S3C select ARM_VIC select NO_IOPORT select ARCH_REQUIRE_GPIOLIB @@ -24,19 +23,3 @@ config PLAT_S5P select SAMSUNG_IRQ_UART help Base platform code for Samsung's S5P series SoC. - -if (PLAT_S5P && ARCH_S5P6440) - -# Configuration options shared by all S5P64XX implementations - -config CPU_S5P6440_INIT - bool - help - Initialisation code for the S5P6440. - -config CPU_S5P6440_CLOCK - bool - help - Clock support code for the S5P6440. - -endif diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile index 92b64745054..a7c54b332d2 100644 --- a/arch/arm/plat-s5p/Makefile +++ b/arch/arm/plat-s5p/Makefile @@ -17,8 +17,3 @@ obj-y += cpu.o obj-y += clock.o obj-y += irq.o obj-y += setup-i2c0.o - -# CPU support - -obj-$(CONFIG_CPU_S5P6440_INIT) += s5p6440-init.o -obj-$(CONFIG_CPU_S5P6440_CLOCK) += s5p6440-clock.o diff --git a/arch/arm/plat-s5p/clock.c b/arch/arm/plat-s5p/clock.c index 3d3c0f1934f..aa96e335073 100644 --- a/arch/arm/plat-s5p/clock.c +++ b/arch/arm/plat-s5p/clock.c @@ -33,6 +33,12 @@ struct clk clk_ext_xtal_mux = { .id = -1, }; +static struct clk s5p_clk_27m = { + .name = "clk_27m", + .id = -1, + .rate = 27000000, +}; + /* 48MHz USB Phy clock output */ struct clk clk_48m = { .name = "clk_48m", @@ -104,6 +110,11 @@ struct clksrc_sources clk_src_epll = { .nr_sources = ARRAY_SIZE(clk_src_epll_list), }; +struct clk clk_vpll = { + .name = "vpll", + .id = -1, +}; + int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable) { unsigned int ctrlbit = clk->ctrlbit; @@ -118,10 +129,12 @@ int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable) static struct clk *s5p_clks[] __initdata = { &clk_ext_xtal_mux, &clk_48m, + &s5p_clk_27m, &clk_fout_apll, &clk_fout_mpll, &clk_fout_epll, &clk_arm, + &clk_vpll, }; void __init s5p_register_clocks(unsigned long xtal_freq) diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c index 0895a77a283..f92e5de3a75 100644 --- a/arch/arm/plat-s5p/cpu.c +++ b/arch/arm/plat-s5p/cpu.c @@ -18,10 +18,14 @@ #include <mach/regs-clock.h> #include <plat/cpu.h> #include <plat/s5p6440.h> +#include <plat/s5p6442.h> +#include <plat/s5pv210.h> /* table of supported CPUs */ static const char name_s5p6440[] = "S5P6440"; +static const char name_s5p6442[] = "S5P6442"; +static const char name_s5pv210[] = "S5PV210/S5PC110"; static struct cpu_table cpu_ids[] __initdata = { { @@ -32,36 +36,55 @@ static struct cpu_table cpu_ids[] __initdata = { .init_uarts = s5p6440_init_uarts, .init = s5p6440_init, .name = name_s5p6440, + }, { + .idcode = 0x36442000, + .idmask = 0xffffff00, + .map_io = s5p6442_map_io, + .init_clocks = s5p6442_init_clocks, + .init_uarts = s5p6442_init_uarts, + .init = s5p6442_init, + .name = name_s5p6442, + }, { + .idcode = 0x43110000, + .idmask = 0xfffff000, + .map_io = s5pv210_map_io, + .init_clocks = s5pv210_init_clocks, + .init_uarts = s5pv210_init_uarts, + .init = s5pv210_init, + .name = name_s5pv210, }, }; /* minimal IO mapping */ -#define UART_OFFS (S5P_PA_UART & 0xfffff) - static struct map_desc s5p_iodesc[] __initdata = { { - .virtual = (unsigned long)S5P_VA_SYSCON, + .virtual = (unsigned long)S5P_VA_CHIPID, + .pfn = __phys_to_pfn(S5P_PA_CHIPID), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S3C_VA_SYS, .pfn = __phys_to_pfn(S5P_PA_SYSCON), .length = SZ_64K, .type = MT_DEVICE, }, { - .virtual = (unsigned long)(S5P_VA_UART + UART_OFFS), - .pfn = __phys_to_pfn(S5P_PA_UART), + .virtual = (unsigned long)S3C_VA_UART, + .pfn = __phys_to_pfn(S3C_PA_UART), .length = SZ_4K, .type = MT_DEVICE, }, { - .virtual = (unsigned long)S5P_VA_VIC0, + .virtual = (unsigned long)VA_VIC0, .pfn = __phys_to_pfn(S5P_PA_VIC0), .length = SZ_16K, .type = MT_DEVICE, }, { - .virtual = (unsigned long)S5P_VA_VIC1, + .virtual = (unsigned long)VA_VIC1, .pfn = __phys_to_pfn(S5P_PA_VIC1), .length = SZ_16K, .type = MT_DEVICE, }, { - .virtual = (unsigned long)S5P_VA_TIMER, + .virtual = (unsigned long)S3C_VA_TIMER, .pfn = __phys_to_pfn(S5P_PA_TIMER), .length = SZ_16K, .type = MT_DEVICE, diff --git a/arch/arm/plat-s5p/dev-uart.c b/arch/arm/plat-s5p/dev-uart.c index 23c75316d49..a89331ef4ae 100644 --- a/arch/arm/plat-s5p/dev-uart.c +++ b/arch/arm/plat-s5p/dev-uart.c @@ -95,6 +95,7 @@ static struct resource s5p_uart2_resource[] = { }; static struct resource s5p_uart3_resource[] = { +#if CONFIG_SERIAL_SAMSUNG_UARTS > 3 [0] = { .start = S5P_PA_UART3, .end = S5P_PA_UART3 + S5P_SZ_UART, @@ -115,6 +116,7 @@ static struct resource s5p_uart3_resource[] = { .end = IRQ_S5P_UART_ERR3, .flags = IORESOURCE_IRQ, }, +#endif }; struct s3c24xx_uart_resources s5p_uart_resources[] __initdata = { diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-s5p/include/plat/irqs.h index 5d7937dddad..42e757f2e40 100644 --- a/arch/arm/plat-s5p/include/plat/irqs.h +++ b/arch/arm/plat-s5p/include/plat/irqs.h @@ -28,9 +28,14 @@ #define S5P_VIC0_BASE S5P_IRQ(0) #define S5P_VIC1_BASE S5P_IRQ(32) +#define S5P_VIC2_BASE S5P_IRQ(64) +#define S5P_VIC3_BASE S5P_IRQ(96) + +#define VIC_BASE(x) (S5P_VIC0_BASE + ((x)*32)) #define IRQ_VIC0_BASE S5P_VIC0_BASE #define IRQ_VIC1_BASE S5P_VIC1_BASE +#define IRQ_VIC2_BASE S5P_VIC2_BASE /* UART interrupts, each UART has 4 intterupts per channel so * use the space between the ISA and S3C main interrupts. Note, these @@ -71,8 +76,10 @@ #define S5P_IRQ_VIC0(x) (S5P_VIC0_BASE + (x)) #define S5P_IRQ_VIC1(x) (S5P_VIC1_BASE + (x)) +#define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x)) +#define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x)) -#define S5P_TIMER_IRQ(x) S5P_IRQ(64 + (x)) +#define S5P_TIMER_IRQ(x) S5P_IRQ(11 + (x)) #define IRQ_TIMER0 S5P_TIMER_IRQ(0) #define IRQ_TIMER1 S5P_TIMER_IRQ(1) diff --git a/arch/arm/plat-s5p/include/plat/map-s5p.h b/arch/arm/plat-s5p/include/plat/map-s5p.h new file mode 100644 index 00000000000..14828521f70 --- /dev/null +++ b/arch/arm/plat-s5p/include/plat/map-s5p.h @@ -0,0 +1,34 @@ +/* linux/arch/arm/plat-s5p/include/plat/map-s5p.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5P - Memory map definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_PLAT_MAP_S5P_H +#define __ASM_PLAT_MAP_S5P_H __FILE__ + +#define S5P_VA_CHIPID S3C_ADDR(0x00700000) +#define S5P_VA_GPIO S3C_ADDR(0x00500000) +#define S5P_VA_SYSTIMER S3C_ADDR(0x01200000) +#define S5P_VA_SROMC S3C_ADDR(0x01100000) + +#define S5P_VA_UART0 (S3C_VA_UART + 0x0) +#define S5P_VA_UART1 (S3C_VA_UART + 0x400) +#define S5P_VA_UART2 (S3C_VA_UART + 0x800) +#define S5P_VA_UART3 (S3C_VA_UART + 0xC00) + +#define S3C_UART_OFFSET (0x400) + +#define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000)) +#define VA_VIC0 VA_VIC(0) +#define VA_VIC1 VA_VIC(1) +#define VA_VIC2 VA_VIC(2) +#define VA_VIC3 VA_VIC(3) + +#endif /* __ASM_PLAT_MAP_S5P_H */ diff --git a/arch/arm/plat-s5p/include/plat/s5p-clock.h b/arch/arm/plat-s5p/include/plat/s5p-clock.h index e1a7444b882..56fb8b414d4 100644 --- a/arch/arm/plat-s5p/include/plat/s5p-clock.h +++ b/arch/arm/plat-s5p/include/plat/s5p-clock.h @@ -20,6 +20,7 @@ #define clk_fin_apll clk_ext_xtal_mux #define clk_fin_mpll clk_ext_xtal_mux #define clk_fin_epll clk_ext_xtal_mux +#define clk_fin_vpll clk_ext_xtal_mux extern struct clk clk_ext_xtal_mux; extern struct clk clk_48m; @@ -27,6 +28,7 @@ extern struct clk clk_fout_apll; extern struct clk clk_fout_mpll; extern struct clk clk_fout_epll; extern struct clk clk_arm; +extern struct clk clk_vpll; extern struct clksrc_sources clk_src_apll; extern struct clksrc_sources clk_src_mpll; diff --git a/arch/arm/plat-s5p/include/plat/s5p6442.h b/arch/arm/plat-s5p/include/plat/s5p6442.h new file mode 100644 index 00000000000..7b8801349c9 --- /dev/null +++ b/arch/arm/plat-s5p/include/plat/s5p6442.h @@ -0,0 +1,33 @@ +/* arch/arm/plat-s5p/include/plat/s5p6442.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Header file for s5p6442 cpu support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/* Common init code for S5P6442 related SoCs */ + +extern void s5p6442_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); +extern void s5p6442_register_clocks(void); +extern void s5p6442_setup_clocks(void); + +#ifdef CONFIG_CPU_S5P6442 + +extern int s5p6442_init(void); +extern void s5p6442_init_irq(void); +extern void s5p6442_map_io(void); +extern void s5p6442_init_clocks(int xtal); + +#define s5p6442_init_uarts s5p6442_common_init_uarts + +#else +#define s5p6442_init_clocks NULL +#define s5p6442_init_uarts NULL +#define s5p6442_map_io NULL +#define s5p6442_init NULL +#endif diff --git a/arch/arm/plat-s5p/include/plat/s5pv210.h b/arch/arm/plat-s5p/include/plat/s5pv210.h new file mode 100644 index 00000000000..6c93a0c7810 --- /dev/null +++ b/arch/arm/plat-s5p/include/plat/s5pv210.h @@ -0,0 +1,33 @@ +/* linux/arch/arm/plat-s5p/include/plat/s5pv210.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Header file for s5pv210 cpu support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/* Common init code for S5PV210 related SoCs */ + +extern void s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); +extern void s5pv210_register_clocks(void); +extern void s5pv210_setup_clocks(void); + +#ifdef CONFIG_CPU_S5PV210 + +extern int s5pv210_init(void); +extern void s5pv210_init_irq(void); +extern void s5pv210_map_io(void); +extern void s5pv210_init_clocks(int xtal); + +#define s5pv210_init_uarts s5pv210_common_init_uarts + +#else +#define s5pv210_init_clocks NULL +#define s5pv210_init_uarts NULL +#define s5pv210_map_io NULL +#define s5pv210_init NULL +#endif diff --git a/arch/arm/plat-s5p/irq.c b/arch/arm/plat-s5p/irq.c index eada40d0847..25e1eb6de59 100644 --- a/arch/arm/plat-s5p/irq.c +++ b/arch/arm/plat-s5p/irq.c @@ -25,9 +25,6 @@ #include <plat/irq-vic-timer.h> #include <plat/irq-uart.h> -#define VIC_VAADDR(no) (S5P_VA_VIC0 + ((no)*0x10000)) -#define VIC_BASE(no) (S5P_VIC0_BASE + ((no)*32)) - /* * Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3] * are consecutive when looking up the interrupt in the demux routines. @@ -48,11 +45,13 @@ static struct s3c_uart_irq uart_irqs[] = { .base_irq = IRQ_S5P_UART_BASE2, .parent_irq = IRQ_UART2, }, +#if CONFIG_SERIAL_SAMSUNG_UARTS > 3 [3] = { .regs = S5P_VA_UART3, .base_irq = IRQ_S5P_UART_BASE3, .parent_irq = IRQ_UART3, }, +#endif }; void __init s5p_init_irq(u32 *vic, u32 num_vic) @@ -61,7 +60,7 @@ void __init s5p_init_irq(u32 *vic, u32 num_vic) /* initialize the VICs */ for (irq = 0; irq < num_vic; irq++) - vic_init(VIC_VAADDR(irq), VIC_BASE(irq), vic[irq], 0); + vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0); s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0); s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1); diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index 1c2fe91c23e..d552c65fa1b 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig @@ -7,12 +7,50 @@ config PLAT_SAMSUNG bool depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX || ARCH_S5PC1XX + select NO_IOPORT default y help Base platform code for all Samsung SoC based systems if PLAT_SAMSUNG +# boot configurations + +comment "Boot options" + +config S3C_BOOT_WATCHDOG + bool "S3C Initialisation watchdog" + depends on S3C2410_WATCHDOG + help + Say y to enable the watchdog during the kernel decompression + stage. If the kernel fails to uncompress, then the watchdog + will trigger a reset and the system should restart. + +config S3C_BOOT_ERROR_RESET + bool "S3C Reboot on decompression error" + help + Say y here to use the watchdog to reset the system if the + kernel decompressor detects an error during decompression. + +config S3C_BOOT_UART_FORCE_FIFO + bool "Force UART FIFO on during boot process" + default y + help + Say Y here to force the UART FIFOs on during the kernel + uncompressor + + +config S3C_LOWLEVEL_UART_PORT + int "S3C UART to use for low-level messages" + default 0 + help + Choice of which UART port to use for the low-level messages, + such as the `Uncompressing...` at start time. The value of + this configuration should be between zero and two. The port + must have been initialised by the boot-loader before use. + +# clock options + config SAMSUNG_CLKSRC bool help @@ -81,6 +119,21 @@ config SAMSUNG_GPIO_EXTRA provides. This allows expanding the GPIO space for use with GPIO expanders. +config S3C_GPIO_SPACE + int "Space between gpio banks" + default 0 + help + Add a number of spare GPIO entries between each bank for debugging + purposes. This allows any problems where an counter overflows from + one bank to another to be caught, at the expense of using a little + more memory. + +config S3C_GPIO_TRACK + bool + help + Internal configuration option to enable the s3c specific gpio + chip tracking if the platform requires it. + # ADC driver config S3C_ADC @@ -132,6 +185,19 @@ config S3C_DEV_NAND help Compile in platform device definition for NAND controller +config S3C64XX_DEV_SPI + bool + help + Compile in platform device definitions for S3C64XX's type + SPI controllers. + +# DMA + +config S3C_DMA + bool + help + Internal configuration for S3C DMA core + comment "Power management" config SAMSUNG_PM_DEBUG diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile index c8c8caec8cd..22c89d08f6e 100644 --- a/arch/arm/plat-samsung/Makefile +++ b/arch/arm/plat-samsung/Makefile @@ -11,6 +11,8 @@ obj- := # Objects we always build independent of SoC choice +obj-y += init.o +obj-y += time.o obj-y += clock.o obj-y += pwm-clock.o obj-y += gpio.o @@ -39,8 +41,13 @@ obj-$(CONFIG_S3C_DEV_USB_HOST) += dev-usb.o obj-$(CONFIG_S3C_DEV_USB_HSOTG) += dev-usb-hsotg.o obj-$(CONFIG_S3C_DEV_NAND) += dev-nand.o +# DMA support + +obj-$(CONFIG_S3C_DMA) += dma.o + # PM support +obj-$(CONFIG_PM) += pm.o obj-$(CONFIG_PM) += pm-gpio.o obj-$(CONFIG_SAMSUNG_PM_CHECK) += pm-check.o diff --git a/arch/arm/plat-samsung/adc.c b/arch/arm/plat-samsung/adc.c index c7659b7378b..0b5833b9ac5 100644 --- a/arch/arm/plat-samsung/adc.c +++ b/arch/arm/plat-samsung/adc.c @@ -262,6 +262,7 @@ static irqreturn_t s3c_adc_irq(int irq, void *pw) { struct adc_device *adc = pw; struct s3c_adc_client *client = adc->cur; + enum s3c_cpu_type cpu = platform_get_device_id(adc->pdev)->driver_data; unsigned long flags; unsigned data0, data1; @@ -276,9 +277,17 @@ static irqreturn_t s3c_adc_irq(int irq, void *pw) client->nr_samples--; + if (cpu == TYPE_S3C64XX) { + /* S3C64XX ADC resolution is 12-bit */ + data0 &= 0xfff; + data1 &= 0xfff; + } else { + data0 &= 0x3ff; + data1 &= 0x3ff; + } + if (client->convert_cb) - (client->convert_cb)(client, data0 & 0x3ff, data1 & 0x3ff, - &client->nr_samples); + (client->convert_cb)(client, data0, data1, &client->nr_samples); if (client->nr_samples > 0) { /* fire another conversion for this */ @@ -295,7 +304,7 @@ static irqreturn_t s3c_adc_irq(int irq, void *pw) } exit: - if (platform_get_device_id(adc->pdev)->driver_data == TYPE_S3C64XX) { + if (cpu == TYPE_S3C64XX) { /* Clear ADC interrupt */ writel(0, adc->regs + S3C64XX_ADCCLRINT); } @@ -308,6 +317,7 @@ static int s3c_adc_probe(struct platform_device *pdev) struct adc_device *adc; struct resource *regs; int ret; + unsigned tmp; adc = kzalloc(sizeof(struct adc_device), GFP_KERNEL); if (adc == NULL) { @@ -354,8 +364,12 @@ static int s3c_adc_probe(struct platform_device *pdev) clk_enable(adc->clk); - writel(adc->prescale | S3C2410_ADCCON_PRSCEN, - adc->regs + S3C2410_ADCCON); + tmp = adc->prescale | S3C2410_ADCCON_PRSCEN; + if (platform_get_device_id(pdev)->driver_data == TYPE_S3C64XX) { + /* Enable 12-bit ADC resolution */ + tmp |= S3C64XX_ADCCON_RESSEL; + } + writel(tmp, adc->regs + S3C2410_ADCCON); dev_info(dev, "attached adc driver\n"); @@ -398,6 +412,7 @@ static int s3c_adc_suspend(struct platform_device *pdev, pm_message_t state) con |= S3C2410_ADCCON_STDBM; writel(con, adc->regs + S3C2410_ADCCON); + disable_irq(adc->irq); clk_disable(adc->clk); return 0; @@ -408,6 +423,7 @@ static int s3c_adc_resume(struct platform_device *pdev) struct adc_device *adc = platform_get_drvdata(pdev); clk_enable(adc->clk); + enable_irq(adc->irq); writel(adc->prescale | S3C2410_ADCCON_PRSCEN, adc->regs + S3C2410_ADCCON); diff --git a/arch/arm/plat-samsung/clock.c b/arch/arm/plat-samsung/clock.c index e9cdbe47beb..1b25c9d8c40 100644 --- a/arch/arm/plat-samsung/clock.c +++ b/arch/arm/plat-samsung/clock.c @@ -307,6 +307,12 @@ struct clk s3c24xx_uclk = { /* initialise the clock system */ +/** + * s3c24xx_register_clock() - register a clock + * @clk: The clock to register + * + * Add the specified clock to the list of clocks known by the system. + */ int s3c24xx_register_clock(struct clk *clk) { if (clk->enable == NULL) @@ -324,13 +330,25 @@ int s3c24xx_register_clock(struct clk *clk) return 0; } +/** + * s3c24xx_register_clocks() - register an array of clock pointers + * @clks: Pointer to an array of struct clk pointers + * @nr_clks: The number of clocks in the @clks array. + * + * Call s3c24xx_register_clock() for all the clock pointers contained + * in the @clks list. Returns the number of failures. + */ int s3c24xx_register_clocks(struct clk **clks, int nr_clks) { int fails = 0; for (; nr_clks > 0; nr_clks--, clks++) { - if (s3c24xx_register_clock(*clks) < 0) + if (s3c24xx_register_clock(*clks) < 0) { + struct clk *clk = *clks; + printk(KERN_ERR "%s: failed to register %p: %s\n", + __func__, clk, clk->name); fails++; + } } return fails; diff --git a/arch/arm/plat-samsung/dev-usb-hsotg.c b/arch/arm/plat-samsung/dev-usb-hsotg.c index e2f604b51c8..33a844ab691 100644 --- a/arch/arm/plat-samsung/dev-usb-hsotg.c +++ b/arch/arm/plat-samsung/dev-usb-hsotg.c @@ -14,6 +14,7 @@ #include <linux/kernel.h> #include <linux/string.h> #include <linux/platform_device.h> +#include <linux/dma-mapping.h> #include <mach/irqs.h> #include <mach/map.h> @@ -33,9 +34,15 @@ static struct resource s3c_usb_hsotg_resources[] = { }, }; +static u64 s3c_hsotg_dmamask = DMA_BIT_MASK(32); + struct platform_device s3c_device_usb_hsotg = { .name = "s3c-hsotg", .id = -1, .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources), .resource = s3c_usb_hsotg_resources, + .dev = { + .dma_mask = &s3c_hsotg_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, }; diff --git a/arch/arm/plat-s3c/dma.c b/arch/arm/plat-samsung/dma.c index a995850cd9d..cb459dd9545 100644 --- a/arch/arm/plat-s3c/dma.c +++ b/arch/arm/plat-samsung/dma.c @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c/dma.c +/* linux/arch/arm/plat-samsung/dma.c * * Copyright (c) 2003-2009 Simtec Electronics * Ben Dooks <ben@simtec.co.uk> @@ -20,8 +20,6 @@ struct s3c2410_dma_buf; #include <mach/dma.h> #include <mach/irqs.h> -#include <plat/dma-plat.h> - /* dma channel state information */ struct s3c2410_dma_chan s3c2410_chans[S3C_DMA_CHANNELS]; struct s3c2410_dma_chan *s3c_dma_chan_map[DMACH_MAX]; diff --git a/arch/arm/plat-s3c/include/plat/audio.h b/arch/arm/plat-samsung/include/plat/audio.h index f22d23bb627..e32f9edfd4b 100644 --- a/arch/arm/plat-s3c/include/plat/audio.h +++ b/arch/arm/plat-samsung/include/plat/audio.h @@ -1,4 +1,4 @@ -/* arch/arm/plat-s3c/include/plat/audio.h +/* arch/arm/plat-samsung/include/plat/audio.h * * Copyright (c) 2009 Samsung Electronics Co. Ltd * Author: Jaswinder Singh <jassi.brar@samsung.com> @@ -8,6 +8,14 @@ * published by the Free Software Foundation. */ +/* The machine init code calls s3c*_ac97_setup_gpio with + * one of these defines in order to select appropriate bank + * of GPIO for AC97 pins + */ +#define S3C64XX_AC97_GPD 0 +#define S3C64XX_AC97_GPE 1 +extern void s3c64xx_ac97_setup_gpio(int); + /** * struct s3c_audio_pdata - common platform data for audio device drivers * @cfg_gpio: Callback function to setup mux'ed pins in I2S/PCM/AC97 mode diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h index ba9a1cdd3a2..60b62692ac7 100644 --- a/arch/arm/plat-samsung/include/plat/clock.h +++ b/arch/arm/plat-samsung/include/plat/clock.h @@ -94,7 +94,6 @@ extern void s3c_register_clocks(struct clk *clk, int nr_clks); extern int s3c24xx_register_baseclocks(unsigned long xtal); -extern void s3c64xx_register_clocks(void); extern void s5p_register_clocks(unsigned long xtal_freq); extern void s3c24xx_setup_clocks(unsigned long fclk, diff --git a/arch/arm/plat-s3c/include/plat/cpu-freq.h b/arch/arm/plat-samsung/include/plat/cpu-freq.h index 94eb06a2ea5..80c4a809c72 100644 --- a/arch/arm/plat-s3c/include/plat/cpu-freq.h +++ b/arch/arm/plat-samsung/include/plat/cpu-freq.h @@ -1,4 +1,4 @@ -/* arch/arm/plat-s3c/include/plat/cpu-freq.h +/* arch/arm/plat-samsung/include/plat/cpu-freq.h * * Copyright (c) 2006-2007 Simtec Electronics * http://armlinux.simtec.co.uk/ diff --git a/arch/arm/plat-s3c/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h index 676db946567..d316b4a579f 100644 --- a/arch/arm/plat-s3c/include/plat/cpu.h +++ b/arch/arm/plat-samsung/include/plat/cpu.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c/include/plat/cpu.h +/* linux/arch/arm/plat-samsung/include/plat/cpu.h * * Copyright (c) 2004-2005 Simtec Electronics * Ben Dooks <ben@simtec.co.uk> diff --git a/arch/arm/plat-s3c/include/plat/debug-macro.S b/arch/arm/plat-samsung/include/plat/debug-macro.S index 3634d4e3708..dc6efd90e8f 100644 --- a/arch/arm/plat-s3c/include/plat/debug-macro.S +++ b/arch/arm/plat-samsung/include/plat/debug-macro.S @@ -1,4 +1,4 @@ -/* linux/include/asm-arm/plat-s3c/debug-macro.S +/* arch/arm/plat-samsung/include/plat/debug-macro.S * * Copyright 2005, 2007 Simtec Electronics * http://armlinux.simtec.co.uk/ @@ -11,6 +11,18 @@ #include <plat/regs-serial.h> +/* The S5PV210/S5PC110 and S5P6442 implementations are as belows. */ + + .macro fifo_level_s5pv210 rd, rx + ldr \rd, [ \rx, # S3C2410_UFSTAT ] + and \rd, \rd, #S5PV210_UFSTAT_TXMASK + .endm + + .macro fifo_full_s5pv210 rd, rx + ldr \rd, [ \rx, # S3C2410_UFSTAT ] + tst \rd, #S5PV210_UFSTAT_TXFULL + .endm + /* The S3C2440 implementations are used by default as they are the * most widely re-used */ diff --git a/arch/arm/plat-s3c/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h index c6f9b731049..796d2425831 100644 --- a/arch/arm/plat-s3c/include/plat/devs.h +++ b/arch/arm/plat-samsung/include/plat/devs.h @@ -1,4 +1,4 @@ -/* linux/include/asm-arm/plat-s3c24xx/devs.h +/* arch/arm/plat-samsung/include/plat/devs.h * * Copyright (c) 2004 Simtec Electronics * Ben Dooks <ben@simtec.co.uk> @@ -35,7 +35,10 @@ extern struct platform_device s3c64xx_device_spi1; extern struct platform_device s3c64xx_device_pcm0; extern struct platform_device s3c64xx_device_pcm1; +extern struct platform_device s3c64xx_device_ac97; + extern struct platform_device s3c_device_ts; + extern struct platform_device s3c_device_fb; extern struct platform_device s3c_device_ohci; extern struct platform_device s3c_device_lcd; diff --git a/arch/arm/plat-s3c24xx/include/plat/dma-plat.h b/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h index 9565ead1bc9..336d5ac0203 100644 --- a/arch/arm/plat-s3c24xx/include/plat/dma-plat.h +++ b/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h @@ -1,9 +1,9 @@ -/* linux/arch/arm/plat-s3c24xx/include/plat/dma-plat.h +/* linux/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h * * Copyright (C) 2006 Simtec Electronics * Ben Dooks <ben@simtec.co.uk> * - * Samsung S3C24XX DMA support + * Samsung S3C24XX DMA support - per SoC functions * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as diff --git a/arch/arm/plat-s3c/include/plat/dma.h b/arch/arm/plat-samsung/include/plat/dma.h index e429d10be3a..7584d751ed5 100644 --- a/arch/arm/plat-s3c/include/plat/dma.h +++ b/arch/arm/plat-samsung/include/plat/dma.h @@ -1,4 +1,4 @@ -/* arch/arm/plat-s3c/include/plat/dma.h +/* arch/arm/plat-samsung/include/plat/dma.h * * Copyright (C) 2003-2006 Simtec Electronics * Ben Dooks <ben@simtec.co.uk> diff --git a/arch/arm/plat-s3c/include/plat/fb.h b/arch/arm/plat-samsung/include/plat/fb.h index f8db87930f8..ffc01a76b7c 100644 --- a/arch/arm/plat-s3c/include/plat/fb.h +++ b/arch/arm/plat-samsung/include/plat/fb.h @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c/include/plat/fb.h +/* arch/arm/plat-samsung/include/plat/fb.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c/include/plat/map-base.h b/arch/arm/plat-samsung/include/plat/map-base.h index 250be311c85..250be311c85 100644 --- a/arch/arm/plat-s3c/include/plat/map-base.h +++ b/arch/arm/plat-samsung/include/plat/map-base.h diff --git a/arch/arm/plat-s3c/include/plat/pm.h b/arch/arm/plat-samsung/include/plat/pm.h index 2543bd227f2..245836d9193 100644 --- a/arch/arm/plat-s3c/include/plat/pm.h +++ b/arch/arm/plat-samsung/include/plat/pm.h @@ -1,4 +1,4 @@ -/* linux/include/asm-arm/plat-s3c24xx/pm.h +/* arch/arm/plat-samsung/include/plat/pm.h * * Copyright (c) 2004 Simtec Electronics * http://armlinux.simtec.co.uk/ diff --git a/arch/arm/plat-samsung/include/plat/regs-adc.h b/arch/arm/plat-samsung/include/plat/regs-adc.h index f43c8dab39e..7554c4fcddb 100644 --- a/arch/arm/plat-samsung/include/plat/regs-adc.h +++ b/arch/arm/plat-samsung/include/plat/regs-adc.h @@ -25,6 +25,7 @@ /* ADCCON Register Bits */ +#define S3C64XX_ADCCON_RESSEL (1<<16) #define S3C2410_ADCCON_ECFLG (1<<15) #define S3C2410_ADCCON_PRSCEN (1<<14) #define S3C2410_ADCCON_PRSCVL(x) (((x)&0xFF)<<6) diff --git a/arch/arm/plat-s3c/include/plat/regs-fb-v4.h b/arch/arm/plat-samsung/include/plat/regs-fb-v4.h index a60ed0d06c9..0f43599248a 100644 --- a/arch/arm/plat-s3c/include/plat/regs-fb-v4.h +++ b/arch/arm/plat-samsung/include/plat/regs-fb-v4.h @@ -1,4 +1,4 @@ -/* arch/arm/plat-s3c/include/plat/regs-fb-v4.h +/* arch/arm/plat-samsung/include/plat/regs-fb-v4.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c/include/plat/regs-fb.h b/arch/arm/plat-samsung/include/plat/regs-fb.h index e9ee599d430..0ef806e5034 100644 --- a/arch/arm/plat-s3c/include/plat/regs-fb.h +++ b/arch/arm/plat-samsung/include/plat/regs-fb.h @@ -1,4 +1,4 @@ -/* arch/arm/plat-s3c/include/plat/regs-fb.h +/* arch/arm/plat-samsung/include/plat/regs-fb.h * * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics diff --git a/arch/arm/plat-s3c/include/plat/regs-serial.h b/arch/arm/plat-samsung/include/plat/regs-serial.h index 60d6604185e..a6eba8496b2 100644 --- a/arch/arm/plat-s3c/include/plat/regs-serial.h +++ b/arch/arm/plat-samsung/include/plat/regs-serial.h @@ -1,4 +1,4 @@ -/* arch/arm/mach-s3c2410/include/mach/regs-serial.h +/* arch/arm/plat-samsung/include/plat/regs-serial.h * * From linux/include/asm-arm/hardware/serial_s3c2410.h * diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h index 53198673b6b..7d07cd7aa4f 100644 --- a/arch/arm/plat-samsung/include/plat/sdhci.h +++ b/arch/arm/plat-samsung/include/plat/sdhci.h @@ -78,8 +78,8 @@ extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w); /* S3C6400 SDHCI setup */ -#ifdef CONFIG_S3C6400_SETUP_SDHCI -extern char *s3c6400_hsmmc_clksrcs[4]; +#ifdef CONFIG_S3C64XX_SETUP_SDHCI +extern char *s3c64xx_hsmmc_clksrcs[4]; #ifdef CONFIG_S3C_DEV_HSMMC extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev, @@ -89,7 +89,7 @@ extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev, static inline void s3c6400_default_sdhci0(void) { - s3c_hsmmc0_def_platdata.clocks = s3c6400_hsmmc_clksrcs; + s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; s3c_hsmmc0_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; } @@ -101,7 +101,7 @@ static inline void s3c6400_default_sdhci0(void) { } #ifdef CONFIG_S3C_DEV_HSMMC1 static inline void s3c6400_default_sdhci1(void) { - s3c_hsmmc1_def_platdata.clocks = s3c6400_hsmmc_clksrcs; + s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; s3c_hsmmc1_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; } @@ -112,7 +112,7 @@ static inline void s3c6400_default_sdhci1(void) { } #ifdef CONFIG_S3C_DEV_HSMMC2 static inline void s3c6400_default_sdhci2(void) { - s3c_hsmmc2_def_platdata.clocks = s3c6400_hsmmc_clksrcs; + s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; s3c_hsmmc2_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; } @@ -120,27 +120,19 @@ static inline void s3c6400_default_sdhci2(void) static inline void s3c6400_default_sdhci2(void) { } #endif /* CONFIG_S3C_DEV_HSMMC2 */ -#else -static inline void s3c6400_default_sdhci0(void) { } -static inline void s3c6400_default_sdhci1(void) { } -#endif /* CONFIG_S3C6400_SETUP_SDHCI */ - /* S3C6410 SDHCI setup */ -#ifdef CONFIG_S3C6410_SETUP_SDHCI -extern char *s3c6410_hsmmc_clksrcs[4]; - -extern void s3c6410_setup_sdhci0_cfg_card(struct platform_device *dev, - void __iomem *r, - struct mmc_ios *ios, - struct mmc_card *card); +extern void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev, + void __iomem *r, + struct mmc_ios *ios, + struct mmc_card *card); #ifdef CONFIG_S3C_DEV_HSMMC static inline void s3c6410_default_sdhci0(void) { - s3c_hsmmc0_def_platdata.clocks = s3c6410_hsmmc_clksrcs; + s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; - s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card; + s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; } #else static inline void s3c6410_default_sdhci0(void) { } @@ -149,9 +141,9 @@ static inline void s3c6410_default_sdhci0(void) { } #ifdef CONFIG_S3C_DEV_HSMMC1 static inline void s3c6410_default_sdhci1(void) { - s3c_hsmmc1_def_platdata.clocks = s3c6410_hsmmc_clksrcs; + s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; - s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card; + s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; } #else static inline void s3c6410_default_sdhci1(void) { } @@ -160,9 +152,9 @@ static inline void s3c6410_default_sdhci1(void) { } #ifdef CONFIG_S3C_DEV_HSMMC2 static inline void s3c6410_default_sdhci2(void) { - s3c_hsmmc2_def_platdata.clocks = s3c6410_hsmmc_clksrcs; + s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; - s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card; + s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; } #else static inline void s3c6410_default_sdhci2(void) { } @@ -171,7 +163,10 @@ static inline void s3c6410_default_sdhci2(void) { } #else static inline void s3c6410_default_sdhci0(void) { } static inline void s3c6410_default_sdhci1(void) { } -#endif /* CONFIG_S3C6410_SETUP_SDHCI */ +static inline void s3c6400_default_sdhci0(void) { } +static inline void s3c6400_default_sdhci1(void) { } + +#endif /* CONFIG_S3C64XX_SETUP_SDHCI */ /* S5PC100 SDHCI setup */ diff --git a/arch/arm/plat-s3c/include/plat/uncompress.h b/arch/arm/plat-samsung/include/plat/uncompress.h index dc66a477f62..e87ce8ffbbc 100644 --- a/arch/arm/plat-s3c/include/plat/uncompress.h +++ b/arch/arm/plat-samsung/include/plat/uncompress.h @@ -1,4 +1,4 @@ -/* linux/include/asm-arm/plat-s3c/uncompress.h +/* arch/arm/plat-samsung/include/plat/uncompress.h * * Copyright 2003, 2007 Simtec Electronics * http://armlinux.simtec.co.uk/ diff --git a/arch/arm/plat-s3c/include/plat/usb-control.h b/arch/arm/plat-samsung/include/plat/usb-control.h index a6a57bf796b..7fa1fbefc3f 100644 --- a/arch/arm/plat-s3c/include/plat/usb-control.h +++ b/arch/arm/plat-samsung/include/plat/usb-control.h @@ -1,4 +1,4 @@ -/* arch/arm/plat-s3c/include/plat/usb-control.h +/* arch/arm/plat-samsung/include/plat/usb-control.h * * Copyright (c) 2004 Simtec Electronics * Ben Dooks <ben@simtec.co.uk> diff --git a/arch/arm/plat-s3c/init.c b/arch/arm/plat-samsung/init.c index 6790edfaca6..6790edfaca6 100644 --- a/arch/arm/plat-s3c/init.c +++ b/arch/arm/plat-samsung/init.c diff --git a/arch/arm/plat-s3c/pm.c b/arch/arm/plat-samsung/pm.c index e5eef126791..27cfca59769 100644 --- a/arch/arm/plat-s3c/pm.c +++ b/arch/arm/plat-samsung/pm.c @@ -29,7 +29,7 @@ #include <asm/irq.h> #include <plat/pm.h> -#include <plat/pm-core.h> +#include <mach/pm-core.h> /* for external use */ diff --git a/arch/arm/plat-s3c/time.c b/arch/arm/plat-samsung/time.c index 3b27b29da47..2231d80ad81 100644 --- a/arch/arm/plat-s3c/time.c +++ b/arch/arm/plat-samsung/time.c @@ -1,4 +1,4 @@ -/* linux/arch/arm/plat-s3c24xx/time.c +/* linux/arch/arm/plat-samsung/time.c * * Copyright (C) 2003-2005 Simtec Electronics * Ben Dooks, <ben@simtec.co.uk> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index df62f4ea4f6..5351848cfff 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -447,7 +447,7 @@ config SERIAL_CLPS711X_CONSOLE config SERIAL_SAMSUNG tristate "Samsung SoC serial support" - depends on ARM && PLAT_S3C + depends on ARM && PLAT_SAMSUNG select SERIAL_CORE help Support for the on-chip UARTs on the Samsung S3C24XX series CPUs, @@ -455,11 +455,18 @@ config SERIAL_SAMSUNG provide all of these ports, depending on how the serial port pins are configured. +config SERIAL_SAMSUNG_UARTS_4 + bool + depends on ARM && PLAT_SAMSUNG + default y if CPU_S3C2443 + help + Internal node for the common case of 4 Samsung compatible UARTs + config SERIAL_SAMSUNG_UARTS int - depends on ARM && PLAT_S3C + depends on ARM && PLAT_SAMSUNG default 2 if ARCH_S3C2400 - default 4 if ARCH_S5P6440 || ARCH_S5PC1XX || ARCH_S5PV210 || ARCH_S3C64XX || CPU_S3C2443 + default 4 if SERIAL_SAMSUNG_UARTS_4 default 3 help Select the number of available UART ports for the Samsung S3C @@ -526,8 +533,9 @@ config SERIAL_S3C24A0 Serial port support for the Samsung S3C24A0 SoC config SERIAL_S3C6400 - tristate "Samsung S3C6400/S3C6410/S5P6440 Serial port support" + tristate "Samsung S3C6400/S3C6410/S5P6440 Seria port support" depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410 || CPU_S5P6440) + select SERIAL_SAMSUNG_UARTS_4 default y help Serial port support for the Samsung S3C6400, S3C6410 and S5P6440 @@ -536,13 +544,15 @@ config SERIAL_S3C6400 config SERIAL_S5PC100 tristate "Samsung S5PC100 Serial port support" depends on SERIAL_SAMSUNG && CPU_S5PC100 + select SERIAL_SAMSUNG_UARTS_4 default y help Serial port support for the Samsung S5PC100 SoCs config SERIAL_S5PV210 tristate "Samsung S5PV210 Serial port support" - depends on SERIAL_SAMSUNG && CPU_S5PV210 + depends on SERIAL_SAMSUNG && (CPU_S5PV210 || CPU_S5P6442) + select SERIAL_SAMSUNG_UARTS_4 if CPU_S5PV210 default y help Serial port support for Samsung's S5P Family of SoC's diff --git a/drivers/serial/s3c2412.c b/drivers/serial/s3c2412.c index ce75e28e36e..1700b1a2fb7 100644 --- a/drivers/serial/s3c2412.c +++ b/drivers/serial/s3c2412.c @@ -102,6 +102,7 @@ static struct s3c24xx_uart_info s3c2412_uart_inf = { .name = "Samsung S3C2412 UART", .type = PORT_S3C2412, .fifosize = 64, + .has_divslot = 1, .rx_fifomask = S3C2440_UFSTAT_RXMASK, .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT, .rx_fifofull = S3C2440_UFSTAT_RXFULL, |