diff options
| author | Linus Torvalds <torvalds@g5.osdl.org> | 2005-10-28 09:24:22 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-10-28 09:24:22 -0700 |
| commit | 83928e17b92b7a667bfe674f1b330619adc2ac88 (patch) | |
| tree | bdfc0fd037ad1380d75cefa0e47be24e344d977c | |
| parent | 9be16a03928642f944915b8c05945fd87b7a15cb (diff) | |
| parent | 50f4c001bc1534db77663592496204ceba151e97 (diff) | |
Merge master.kernel.org:/home/rmk/linux-2.6-arm
Minor manual fixups for gfp_t clashes.
138 files changed, 4715 insertions, 782 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 11fff042aa8..682367bd0f6 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -204,6 +204,7 @@ config ARCH_H720X config ARCH_AAEC2000 bool "Agilent AAEC-2000 based" + select ARM_AMBA help This enables support for systems based on the Agilent AAEC-2000 @@ -687,7 +688,8 @@ source "drivers/acorn/block/Kconfig" if PCMCIA || ARCH_CLPS7500 || ARCH_IOP3XX || ARCH_IXP4XX \ || ARCH_L7200 || ARCH_LH7A40X || ARCH_PXA || ARCH_RPC \ - || ARCH_S3C2410 || ARCH_SA1100 || ARCH_SHARK || FOOTBRIDGE + || ARCH_S3C2410 || ARCH_SA1100 || ARCH_SHARK || FOOTBRIDGE \ + || MACH_MP1000 source "drivers/ide/Kconfig" endif diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index 7c7f475e213..a54d2eb6489 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -39,7 +39,8 @@ defined(CONFIG_ARCH_IXP4XX) || \ defined(CONFIG_ARCH_IXP2000) || \ defined(CONFIG_ARCH_LH7A40X) || \ - defined(CONFIG_ARCH_OMAP) + defined(CONFIG_ARCH_OMAP) || \ + defined(CONFIG_MACH_MP1000) .macro loadsp, rb addruart \rb .endm diff --git a/arch/arm/configs/mp1000_defconfig b/arch/arm/configs/mp1000_defconfig new file mode 100644 index 00000000000..d2cbc6fada1 --- /dev/null +++ b/arch/arm/configs/mp1000_defconfig @@ -0,0 +1,897 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.14-rc1 +# Fri Sep 16 15:48:13 2005 +# +CONFIG_ARM=y +CONFIG_MMU=y +CONFIG_UID16=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_CALIBRATE_DELAY=y + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +# CONFIG_CLEAN_COMPILE is not set +CONFIG_BROKEN=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +CONFIG_SYSCTL=y +# CONFIG_AUDIT is not set +# CONFIG_HOTPLUG is not set +CONFIG_KOBJECT_UEVENT=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_EMBEDDED=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SHMEM=y +CONFIG_CC_ALIGN_FUNCTIONS=0 +CONFIG_CC_ALIGN_LABELS=0 +CONFIG_CC_ALIGN_LOOPS=0 +CONFIG_CC_ALIGN_JUMPS=0 +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_OBSOLETE_MODPARM=y +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y + +# +# System Type +# +# CONFIG_ARCH_CLPS7500 is not set +CONFIG_ARCH_CLPS711X=y +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_CAMELOT is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_IOP3XX is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_AAEC2000 is not set + +# +# CLPS711X/EP721X Implementations +# +# CONFIG_ARCH_AUTCPU12 is not set +# CONFIG_ARCH_CDB89712 is not set +# CONFIG_ARCH_CEIVA is not set +# CONFIG_ARCH_CLEP7312 is not set +# CONFIG_ARCH_EDB7211 is not set +# CONFIG_ARCH_P720T is not set +# CONFIG_ARCH_FORTUNET is not set +CONFIG_MACH_MP1000=y +CONFIG_MP1000_90MHZ=y + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM720T=y +CONFIG_CPU_32v4=y +CONFIG_CPU_ABRT_LV4T=y +CONFIG_CPU_CACHE_V4=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WT=y +CONFIG_CPU_TLB_V4WT=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y + +# +# Bus support +# +CONFIG_ISA_DMA_API=y + +# +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +# CONFIG_SMP is not set +CONFIG_PREEMPT=y +# CONFIG_NO_IDLE_HZ is not set +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="console=ttyCL,38400 root=/dev/discs/disc0/part1 ip=any cs89x0_media=rj45" +# CONFIG_XIP_KERNEL is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +CONFIG_BINFMT_MISC=y +# CONFIG_ARTHUR is not set + +# +# Power management options +# +# CONFIG_PM is not set + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_BIC=y +CONFIG_IPV6=y +# CONFIG_IPV6_PRIVACY is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_NETFILTER is not set + +# +# DCCP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_DCCP is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set +# CONFIG_NET_CLS_ROUTE is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_NETFILTER_NETLINK is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_IEEE80211 is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set +# CONFIG_DEBUG_DRIVER is not set + +# +# Memory Technology Devices (MTD) +# +CONFIG_MTD=y +CONFIG_MTD_DEBUG=y +CONFIG_MTD_DEBUG_VERBOSE=3 +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_REDBOOT_PARTS=m +CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-2 +CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y +# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=m +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=m +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +CONFIG_MTD_CFI_GEOMETRY=y +# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_2 is not set +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +# CONFIG_MTD_CFI_I1 is not set +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_OTP is not set +CONFIG_MTD_CFI_INTELEXT=m +# CONFIG_MTD_CFI_AMDSTD is not set +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=m +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_OBSOLETE_CHIPS is not set +# CONFIG_MTD_XIP is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=m +CONFIG_MTD_PHYSMAP_START=0x0000000 +CONFIG_MTD_PHYSMAP_LEN=0x4000000 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2 +# CONFIG_MTD_ARM_INTEGRATOR is not set +CONFIG_MTD_EDB7312=m +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLKMTD is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set + +# +# NAND Flash Device Drivers +# +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +CONFIG_MTD_NAND_MP1000=y +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_NANDSIM is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# + +# +# Block devices +# +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=m +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=2 +CONFIG_BLK_DEV_RAM_SIZE=16384 +CONFIG_BLK_DEV_INITRD=y +# CONFIG_CDROM_PKTCDVD is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_ATA_OVER_ETH is not set + +# +# ATA/ATAPI/MFM/RLL support +# +CONFIG_IDE=y +CONFIG_BLK_DEV_IDE=y + +# +# Please see Documentation/ide.txt for help/info on IDE drives +# +# CONFIG_BLK_DEV_IDE_SATA is not set +# CONFIG_BLK_DEV_HD_IDE is not set +CONFIG_BLK_DEV_IDEDISK=y +# CONFIG_IDEDISK_MULTI_MODE is not set +# CONFIG_BLK_DEV_IDECD is not set +# CONFIG_BLK_DEV_IDETAPE is not set +# CONFIG_BLK_DEV_IDEFLOPPY is not set +# CONFIG_IDE_TASK_IOCTL is not set + +# +# IDE chipset support/bugfixes +# +# CONFIG_IDE_GENERIC is not set +CONFIG_IDE_ARM=y +CONFIG_BLK_DEV_IDE_MP1000=y +# CONFIG_BLK_DEV_IDEDMA is not set +# CONFIG_IDEDMA_AUTO is not set +# CONFIG_BLK_DEV_HD is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set + +# +# Multi-device support (RAID and LVM) +# +CONFIG_MD=y +# CONFIG_BLK_DEV_MD is not set +CONFIG_BLK_DEV_DM=y +# CONFIG_DM_CRYPT is not set +# CONFIG_DM_SNAPSHOT is not set +# CONFIG_DM_MIRROR is not set +# CONFIG_DM_ZERO is not set +# CONFIG_DM_MULTIPATH is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_IEEE1394 is not set + +# +# I2O device support +# + +# +# Network device support +# +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# PHY device support +# +# CONFIG_PHYLIB is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +# CONFIG_MII is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +CONFIG_CS89x0=y + +# +# Ethernet (1000 Mbit) +# + +# +# Ethernet (10000 Mbit) +# + +# +# Token Ring devices +# + +# +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +# CONFIG_INPUT_EVDEV is not set +CONFIG_INPUT_EVBUG=y + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_LIBPS2 is not set +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_NR_UARTS=2 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CLPS711X=y +CONFIG_SERIAL_CLPS711X_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +CONFIG_NVRAM=y +CONFIG_RTC=y +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set + +# +# Ftape, the floppy tape device driver +# +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# Hardware Monitoring support +# +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Misc devices +# + +# +# Multimedia Capabilities Port drivers +# + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set + +# +# Graphics support +# +# CONFIG_FB is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y + +# +# Sound +# +# CONFIG_SOUND is not set + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +# CONFIG_USB_ARCH_HAS_OHCI is not set +# CONFIG_USB is not set + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set + +# +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +# CONFIG_EXT2_FS_POSIX_ACL is not set +# CONFIG_EXT2_FS_SECURITY is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_XATTR=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +CONFIG_FS_MBCACHE=y +CONFIG_REISERFS_FS=m +# CONFIG_REISERFS_CHECK is not set +# CONFIG_REISERFS_PROC_INFO is not set +# CONFIG_REISERFS_FS_XATTR is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +CONFIG_QUOTA=y +# CONFIG_QFMT_V1 is not set +# CONFIG_QFMT_V2 is not set +CONFIG_QUOTACTL=y +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_HUGETLBFS is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y +# CONFIG_RELAYFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS_FS is not set +CONFIG_JFFS2_FS=m +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_CRAMFS=m +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +# CONFIG_NFS_DIRECTIO is not set +CONFIG_NFSD=y +CONFIG_NFSD_V3=y +# CONFIG_NFSD_V3_ACL is not set +CONFIG_NFSD_V4=y +CONFIG_NFSD_TCP=y +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_RPCSEC_GSS_KRB5=y +# CONFIG_RPCSEC_GSS_SPKM3 is not set +CONFIG_SMB_FS=m +# CONFIG_SMB_NLS_DEFAULT is not set +CONFIG_CIFS=m +# CONFIG_CIFS_STATS is not set +# CONFIG_CIFS_XATTR is not set +# CONFIG_CIFS_EXPERIMENTAL is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y + +# +# Native Language Support +# +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +# CONFIG_NLS_ISO8859_1 is not set +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +CONFIG_PRINTK_TIME=y +CONFIG_DEBUG_KERNEL=y +# CONFIG_MAGIC_SYSRQ is not set +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_DEBUG_SLAB is not set +CONFIG_DEBUG_PREEMPT=y +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_FS is not set +CONFIG_FRAME_POINTER=y +CONFIG_DEBUG_USER=y +CONFIG_DEBUG_WAITQ=y +CONFIG_DEBUG_ERRORS=y +CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_ICEDCC is not set +# CONFIG_DEBUG_CLPS711X_UART2 is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +CONFIG_CRYPTO=y +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_WP512 is not set +# CONFIG_CRYPTO_TGR192 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_TWOFISH is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Hardware crypto devices +# + +# +# Library routines +# +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +CONFIG_CRC32=y +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=m +CONFIG_ZLIB_DEFLATE=m diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c index 1a85cfdad5a..6055e1427ba 100644 --- a/arch/arm/kernel/module.c +++ b/arch/arm/kernel/module.c @@ -11,6 +11,7 @@ */ #include <linux/config.h> #include <linux/module.h> +#include <linux/moduleloader.h> #include <linux/kernel.h> #include <linux/elf.h> #include <linux/vmalloc.h> diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index f6de76e0a45..baa09601a64 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c @@ -345,7 +345,9 @@ static int bad_syscall(int n, struct pt_regs *regs) struct thread_info *thread = current_thread_info(); siginfo_t info; - if (current->personality != PER_LINUX && thread->exec_domain->handler) { + if (current->personality != PER_LINUX && + current->personality != PER_LINUX_32BIT && + thread->exec_domain->handler) { thread->exec_domain->handler(n, regs); return regs->ARM_r0; } diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index 8725d63e421..71e5b99e519 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -11,7 +11,7 @@ lib-y := backtrace.o changebit.o csumipv6.o csumpartial.o \ strnlen_user.o strchr.o strrchr.o testchangebit.o \ testclearbit.o testsetbit.o uaccess.o getuser.o \ putuser.o ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \ - ucmpdi2.o lib1funcs.o div64.o \ + ucmpdi2.o lib1funcs.o div64.o sha1.o \ io-readsb.o io-writesb.o io-readsl.o io-writesl.o ifeq ($(CONFIG_CPU_32v3),y) diff --git a/arch/arm/lib/sha1.S b/arch/arm/lib/sha1.S new file mode 100644 index 00000000000..ff6ece487ff --- /dev/null +++ b/arch/arm/lib/sha1.S @@ -0,0 +1,206 @@ +/* + * linux/arch/arm/lib/sha1.S + * + * SHA transform optimized for ARM + * + * Copyright: (C) 2005 by Nicolas Pitre <nico@cam.org> + * Created: September 17, 2005 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * The reference implementation for this code is linux/lib/sha1.c + */ + +#include <linux/linkage.h> + + .text + + +/* + * void sha_transform(__u32 *digest, const char *in, __u32 *W) + * + * Note: the "in" ptr may be unaligned. + */ + +ENTRY(sha_transform) + + stmfd sp!, {r4 - r8, lr} + + @ for (i = 0; i < 16; i++) + @ W[i] = be32_to_cpu(in[i]); */ + +#ifdef __ARMEB__ + mov r4, r0 + mov r0, r2 + mov r2, #64 + bl memcpy + mov r2, r0 + mov r0, r4 +#else + mov r3, r2 + mov lr, #16 +1: ldrb r4, [r1], #1 + ldrb r5, [r1], #1 + ldrb r6, [r1], #1 + ldrb r7, [r1], #1 + subs lr, lr, #1 + orr r5, r5, r4, lsl #8 + orr r6, r6, r5, lsl #8 + orr r7, r7, r6, lsl #8 + str r7, [r3], #4 + bne 1b +#endif + + @ for (i = 0; i < 64; i++) + @ W[i+16] = ror(W[i+13] ^ W[i+8] ^ W[i+2] ^ W[i], 31); + + sub r3, r2, #4 + mov lr, #64 +2: ldr r4, [r3, #4]! + subs lr, lr, #1 + ldr r5, [r3, #8] + ldr r6, [r3, #32] + ldr r7, [r3, #52] + eor r4, r4, r5 + eor r4, r4, r6 + eor r4, r4, r7 + mov r4, r4, ror #31 + str r4, [r3, #64] + bne 2b + + /* + * The SHA functions are: + * + * f1(B,C,D) = (D ^ (B & (C ^ D))) + * f2(B,C,D) = (B ^ C ^ D) + * f3(B,C,D) = ((B & C) | (D & (B | C))) + * + * Then the sub-blocks are processed as follows: + * + * A' = ror(A, 27) + f(B,C,D) + E + K + *W++ + * B' = A + * C' = ror(B, 2) + * D' = C + * E' = D + * + * We therefore unroll each loop 5 times to avoid register shuffling. + * Also the ror for C (and also D and E which are successivelyderived + * from it) is applied in place to cut on an additional mov insn for + * each round. + */ + + .macro sha_f1, A, B, C, D, E + ldr r3, [r2], #4 + eor ip, \C, \D + add \E, r1, \E, ror #2 + and ip, \B, ip, ror #2 + add \E, \E, \A, ror #27 + eor ip, ip, \D, ror #2 + add \E, \E, r3 + add \E, \E, ip + .endm + + .macro sha_f2, A, B, C, D, E + ldr r3, [r2], #4 + add \E, r1, \E, ror #2 + eor ip, \B, \C, ror #2 + add \E, \E, \A, ror #27 + eor ip, ip, \D, ror #2 + add \E, \E, r3 + add \E, \E, ip + .endm + + .macro sha_f3, A, B, C, D, E + ldr r3, [r2], #4 + add \E, r1, \E, ror #2 + orr ip, \B, \C, ror #2 + add \E, \E, \A, ror #27 + and ip, ip, \D, ror #2 + add \E, \E, r3 + and r3, \B, \C, ror #2 + orr ip, ip, r3 + add \E, \E, ip + .endm + + ldmia r0, {r4 - r8} + + mov lr, #4 + ldr r1, .L_sha_K + 0 + + /* adjust initial values */ + mov r6, r6, ror #30 + mov r7, r7, ror #30 + mov r8, r8, ror #30 + +3: subs lr, lr, #1 + sha_f1 r4, r5, r6, r7, r8 + sha_f1 r8, r4, r5, r6, r7 + sha_f1 r7, r8, r4, r5, r6 + sha_f1 r6, r7, r8, r4, r5 + sha_f1 r5, r6, r7, r8, r4 + bne 3b + + ldr r1, .L_sha_K + 4 + mov lr, #4 + +4: subs lr, lr, #1 + sha_f2 r4, r5, r6, r7, r8 + sha_f2 r8, r4, r5, r6, r7 + sha_f2 r7, r8, r4, r5, r6 + sha_f2 r6, r7, r8, r4, r5 + sha_f2 r5, r6, r7, r8, r4 + bne 4b + + ldr r1, .L_sha_K + 8 + mov lr, #4 + +5: subs lr, lr, #1 + sha_f3 r4, r5, r6, r7, r8 + sha_f3 r8, r4, r5, r6, r7 + sha_f3 r7, r8, r4, r5, r6 + sha_f3 r6, r7, r8, r4, r5 + sha_f3 r5, r6, r7, r8, r4 + bne 5b + + ldr r1, .L_sha_K + 12 + mov lr, #4 + +6: subs lr, lr, #1 + sha_f2 r4, r5, r6, r7, r8 + sha_f2 r8, r4, r5, r6, r7 + sha_f2 r7, r8, r4, r5, r6 + sha_f2 r6, r7, r8, r4, r5 + sha_f2 r5, r6, r7, r8, r4 + bne 6b + + ldmia r0, {r1, r2, r3, ip, lr} + add r4, r1, r4 + add r5, r2, r5 + add r6, r3, r6, ror #2 + add r7, ip, r7, ror #2 + add r8, lr, r8, ror #2 + stmia r0, {r4 - r8} + + ldmfd sp!, {r4 - r8, pc} + +.L_sha_K: + .word 0x5a827999, 0x6ed9eba1, 0x8f1bbcdc, 0xca62c1d6 + + +/* + * void sha_init(__u32 *buf) + */ + +.L_sha_initial_digest: + .word 0x67452301, 0xefcdab89, 0x98badcfe, 0x10325476, 0xc3d2e1f0 + +ENTRY(sha_init) + + str lr, [sp, #-4]! + adr r1, .L_sha_initial_digest + ldmia r1, {r1, r2, r3, ip, lr} + stmia r0, {r1, r2, r3, ip, lr} + ldr pc, [sp], #4 + diff --git a/arch/arm/mach-aaec2000/Makefile b/arch/arm/mach-aaec2000/Makefile index 20ec83896c3..a8e462f58bc 100644 --- a/arch/arm/mach-aaec2000/Makefile +++ b/arch/arm/mach-aaec2000/Makefile @@ -3,7 +3,7 @@ # # Common support (must be linked before board specific support) -obj-y += core.o +obj-y += core.o clock.o # Specific board support obj-$(CONFIG_MACH_AAED2000) += aaed2000.o diff --git a/arch/arm/mach-aaec2000/aaed2000.c b/arch/arm/mach-aaec2000/aaed2000.c index c9d89988664..f5ef6970229 100644 --- a/arch/arm/mach-aaec2000/aaed2000.c +++ b/arch/arm/mach-aaec2000/aaed2000.c @@ -27,16 +27,65 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> +#include <asm/arch/aaed2000.h> + #include "core.h" +static void aaed2000_clcd_disable(struct clcd_fb *fb) +{ + AAED_EXT_GPIO &= ~AAED_EGPIO_LCD_PWR_EN; +} + +static void aaed2000_clcd_enable(struct clcd_fb *fb) +{ + AAED_EXT_GPIO |= AAED_EGPIO_LCD_PWR_EN; +} + +struct aaec2000_clcd_info clcd_info = { + .enable = aaed2000_clcd_enable, + .disable = aaed2000_clcd_disable, + .panel = { + .mode = { + .name = "Sharp", + .refresh = 60, + .xres = 640, + .yres = 480, + .pixclock = 39721, + .left_margin = 20, + .right_margin = 44, + .upper_margin = 21, + .lower_margin = 34, + .hsync_len = 96, + .vsync_len = 2, + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED, + }, + .width = -1, + .height = -1, + .tim2 = TIM2_IVS | TIM2_IHS, + .cntl = CNTL_LCDTFT, + .bpp = 16, + }, +}; + static void __init aaed2000_init_irq(void) { aaec2000_init_irq(); } +static void __init aaed2000_init(void) +{ + aaec2000_set_clcd_plat_data(&clcd_info); +} + +static struct map_desc aaed2000_io_desc[] __initdata = { + { EXT_GPIO_VBASE, EXT_GPIO_PBASE, EXT_GPIO_LENGTH, MT_DEVICE }, /* Ext GPIO */ +}; + static void __init aaed2000_map_io(void) { aaec2000_map_io(); + iotable_init(aaed2000_io_desc, ARRAY_SIZE(aaed2000_io_desc)); } MACHINE_START(AAED2000, "Agilent AAED-2000 Development Platform") @@ -47,4 +96,5 @@ MACHINE_START(AAED2000, "Agilent AAED-2000 Development Platform") .map_io = aaed2000_map_io, .init_irq = aaed2000_init_irq, .timer = &aaec2000_timer, + .init_machine = aaed2000_init, MACHINE_END diff --git a/arch/arm/mach-aaec2000/clock.c b/arch/arm/mach-aaec2000/clock.c new file mode 100644 index 00000000000..99e019169dd --- /dev/null +++ b/arch/arm/mach-aaec2000/clock.c @@ -0,0 +1,110 @@ +/* + * linux/arch/arm/mach-aaec2000/clock.c + * + * Copyright (C) 2005 Nicolas Bellido Y Ortega + * + * Based on linux/arch/arm/mach-integrator/clock.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/list.h> +#include <linux/errno.h> +#include <linux/err.h> + +#include <asm/semaphore.h> +#include <asm/hardware/clock.h> + +#include "clock.h" + +static LIST_HEAD(clocks); +static DECLARE_MUTEX(clocks_sem); + +struct clk *clk_get(struct device *dev, const char *id) +{ + struct clk *p, *clk = ERR_PTR(-ENOENT); + + down(&clocks_sem); + list_for_each_entry(p, &clocks, node) { + if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) { + clk = p; + break; + } + } + up(&clocks_sem); + + return clk; +} +EXPORT_SYMBOL(clk_get); + +void clk_put(struct clk *clk) +{ + module_put(clk->owner); +} +EXPORT_SYMBOL(clk_put); + +int clk_enable(struct clk *clk) +{ + return 0; +} +EXPORT_SYMBOL(clk_enable); + +void clk_disable(struct clk *clk) +{ +} +EXPORT_SYMBOL(clk_disable); + +int clk_use(struct clk *clk) +{ + return 0; +} +EXPORT_SYMBOL(clk_use); + +void clk_unuse(struct clk *clk) +{ +} +EXPORT_SYMBOL(clk_unuse); + +unsigned long clk_get_rate(struct clk *clk) +{ + return clk->rate; +} +EXPORT_SYMBOL(clk_get_rate); + +long clk_round_rate(struct clk *clk, unsigned long rate) +{ + return rate; +} +EXPORT_SYMBOL(clk_round_rate); + +int clk_set_rate(struct clk *clk, unsigned long rate) +{ + return 0; +} +EXPORT_SYMBOL(clk_set_rate); + +int clk_register(struct clk *clk) +{ + down(&clocks_sem); + list_add(&clk->node, &clocks); + up(&clocks_sem); + return 0; +} +EXPORT_SYMBOL(clk_register); + +void clk_unregister(struct clk *clk) +{ + down(&clocks_sem); + list_del(&clk->node); + up(&clocks_sem); +} +EXPORT_SYMBOL(clk_unregister); + +static int __init clk_init(void) +{ + return 0; +} +arch_initcall(clk_init); diff --git a/arch/arm/mach-aaec2000/clock.h b/arch/arm/mach-aaec2000/clock.h new file mode 100644 index 00000000000..d4bb74ff613 --- /dev/null +++ b/arch/arm/mach-aaec2000/clock.h @@ -0,0 +1,23 @@ +/* + * linux/arch/arm/mach-aaec2000/clock.h + * + * Copyright (C) 2005 Nicolas Bellido Y Ortega + * + * Based on linux/arch/arm/mach-integrator/clock.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +struct module; + +struct clk { + struct list_head node; + unsigned long rate; + struct module *owner; + const char *name; + void *data; +}; + +int clk_register(struct clk *clk); +void clk_unregister(struct clk *clk); diff --git a/arch/arm/mach-aaec2000/core.c b/arch/arm/mach-aaec2000/core.c index aece0cd4f0a..0c53dab8090 100644 --- a/arch/arm/mach-aaec2000/core.c +++ b/arch/arm/mach-aaec2000/core.c @@ -13,19 +13,27 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> +#include <linux/device.h> #include <linux/list.h> #include <linux/errno.h> +#include <linux/dma-mapping.h> #include <linux/interrupt.h> #include <linux/timex.h> #include <linux/signal.h> #include <asm/hardware.h> #include <asm/irq.h> +#include <asm/sizes.h> +#include <asm/hardware/amba.h> +#include <asm/mach/flash.h> #include <asm/mach/irq.h> #include <asm/mach/time.h> #include <asm/mach/map.h> +#include "core.h" +#include "clock.h" + /* * Common I/O mapping: * @@ -40,9 +48,17 @@ * default mapping provided here. */ static struct map_desc standard_io_desc[] __initdata = { - /* virtual physical length type */ - { VIO_APB_BASE, PIO_APB_BASE, IO_APB_LENGTH, MT_DEVICE }, - { VIO_AHB_BASE, PIO_AHB_BASE, IO_AHB_LENGTH, MT_DEVICE } + { + .virtual = VIO_APB_BASE, + .physical = __phys_to_pfn(PIO_APB_BASE), + .length = IO_APB_LENGTH, + .type = MT_DEVICE + }, { + .virtual = VIO_AHB_BASE, + .physical = __phys_to_pfn(PIO_AHB_BASE), + .length = IO_AHB_LENGTH, + .type = MT_DEVICE + } }; void __init aaec2000_map_io(void) @@ -155,3 +171,116 @@ struct sys_timer aaec2000_timer = { .offset = aaec2000_gettimeoffset, }; +static struct clcd_panel mach_clcd_panel; + +static int aaec2000_clcd_setup(struct clcd_fb *fb) +{ + dma_addr_t dma; + + fb->panel = &mach_clcd_panel; + + fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, SZ_1M, + &dma, GFP_KERNEL); + + if (!fb->fb.screen_base) { + printk(KERN_ERR "CLCD: unable to map framebuffer\n"); + return -ENOMEM; + } + + fb->fb.fix.smem_start = dma; + fb->fb.fix.smem_len = SZ_1M; + + return 0; +} + +static int aaec2000_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma) +{ + return dma_mmap_writecombine(&fb->dev->dev, vma, + fb->fb.screen_base, + fb->fb.fix.smem_start, + fb->fb.fix.smem_len); +} + +static void aaec2000_clcd_remove(struct clcd_fb *fb) +{ + dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len, + fb->fb.screen_base, fb->fb.fix.smem_start); +} + +static struct clcd_board clcd_plat_data = { + .name = "AAEC-2000", + .check = clcdfb_check, + .decode = clcdfb_decode, + .setup = aaec2000_clcd_setup, + .mmap = aaec2000_clcd_mmap, + .remove = aaec2000_clcd_remove, +}; + +static struct amba_device clcd_device = { + .dev = { + .bus_id = "mb:16", + .coherent_dma_mask = ~0, + .platform_data = &clcd_plat_data, + }, + .res = { + .start = AAEC_CLCD_PHYS, + .end = AAEC_CLCD_PHYS + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .irq = { INT_LCD, NO_IRQ }, + .periphid = 0x41110, +}; + +static struct amba_device *amba_devs[] __initdata = { + &clcd_device, +}; + +static struct clk aaec2000_clcd_clk = { + .name = "CLCDCLK", +}; + +void __init aaec2000_set_clcd_plat_data(struct aaec2000_clcd_info *clcd) +{ + clcd_plat_data.enable = clcd->enable; + clcd_plat_data.disable = clcd->disable; + memcpy(&mach_clcd_panel, &clcd->panel, sizeof(struct clcd_panel)); +} + +static struct flash_platform_data aaec2000_flash_data = { + .map_name = "cfi_probe", + .width = 4, +}; + +static struct resource aaec2000_flash_resource = { + .start = AAEC_FLASH_BASE, + .end = AAEC_FLASH_BASE + AAEC_FLASH_SIZE, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device aaec2000_flash_device = { + .name = "armflash", + .id = 0, + .dev = { + .platform_data = &aaec2000_flash_data, + }, + .num_resources = 1, + .resource = &aaec2000_flash_resource, +}; + +static int __init aaec2000_init(void) +{ + int i; + + clk_register(&aaec2000_clcd_clk); + + for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { + struct amba_device *d = amba_devs[i]; + amba_device_register(d, &iomem_resource); + } + + platform_device_register(&aaec2000_flash_device); + + return 0; +}; +arch_initcall(aaec2000_init); + diff --git a/arch/arm/mach-aaec2000/core.h b/arch/arm/mach-aaec2000/core.h index 91893d848c1..daefc0ea14a 100644 --- a/arch/arm/mach-aaec2000/core.h +++ b/arch/arm/mach-aaec2000/core.h @@ -9,8 +9,19 @@ * */ +#include <asm/hardware/amba_clcd.h> + struct sys_timer; extern struct sys_timer aaec2000_timer; extern void __init aaec2000_map_io(void); extern void __init aaec2000_init_irq(void); + +struct aaec2000_clcd_info { + struct clcd_panel panel; + void (*disable)(struct clcd_fb *); + void (*enable)(struct clcd_fb *); +}; + +extern void __init aaec2000_set_clcd_plat_data(struct aaec2000_clcd_info *); + diff --git a/arch/arm/mach-clps711x/Kconfig b/arch/arm/mach-clps711x/Kconfig index 0793dcf54f2..d5c15504576 100644 --- a/arch/arm/mach-clps711x/Kconfig +++ b/arch/arm/mach-clps711x/Kconfig @@ -69,6 +69,17 @@ config EP72XX_ROM_BOOT You almost surely want to say N here. +config MACH_MP1000 + bool "MACH_MP1000" + help + Say Y if you intend to run the kernel on the Comdial MP1000 platform. + +config MP1000_90MHZ + bool "MP1000_90MHZ" + depends on MACH_MP1000 + help + Say Y if you have the MP1000 configured to be set at 90MHZ rather than 74MHZ + endmenu endif diff --git a/arch/arm/mach-clps711x/Makefile b/arch/arm/mach-clps711x/Makefile index 4a197315f0c..8a6dc1ccf8f 100644 --- a/arch/arm/mach-clps711x/Makefile +++ b/arch/arm/mach-clps711x/Makefile @@ -15,6 +15,7 @@ obj-$(CONFIG_ARCH_CDB89712) += cdb89712.o obj-$(CONFIG_ARCH_CLEP7312) += clep7312.o obj-$(CONFIG_ARCH_EDB7211) += edb7211-arch.o edb7211-mm.o obj-$(CONFIG_ARCH_FORTUNET) += fortunet.o +obj-$(CONFIG_MACH_MP1000) += mp1000-mach.o mp1000-mm.o mp1000-seprom.o obj-$(CONFIG_ARCH_P720T) += p720t.o leds-$(CONFIG_ARCH_P720T) += p720t-leds.o obj-$(CONFIG_LEDS) += $(leds-y) diff --git a/arch/arm/mach-clps711x/autcpu12.c b/arch/arm/mach-clps711x/autcpu12.c index dc73feb1ffb..43b9423d144 100644 --- a/arch/arm/mach-clps711x/autcpu12.c +++ b/arch/arm/mach-clps711x/autcpu12.c @@ -46,10 +46,14 @@ */ static struct map_desc autcpu12_io_desc[] __initdata = { - /* virtual, physical, length, type */ - /* memory-mapped extra io and CS8900A Ethernet chip */ - /* ethernet chip */ - { AUTCPU12_VIRT_CS8900A, AUTCPU12_PHYS_CS8900A, SZ_1M, MT_DEVICE } + /* memory-mapped extra io and CS8900A Ethernet chip */ + /* ethernet chip */ + { + .virtual = AUTCPU12_VIRT_CS8900A, + .pfn = __phys_to_pfn(AUTCPU12_PHYS_CS8900A), + .length = SZ_1M, + .type = MT_DEVICE + } }; void __init autcpu12_map_io(void) diff --git a/arch/arm/mach-clps711x/cdb89712.c b/arch/arm/mach-clps711x/cdb89712.c index a46c82cd271..cba7be5a06c 100644 --- a/arch/arm/mach-clps711x/cdb89712.c +++ b/arch/arm/mach-clps711x/cdb89712.c @@ -39,7 +39,12 @@ * ethernet driver, perhaps. */ static struct map_desc cdb89712_io_desc[] __initdata = { - { ETHER_BASE, ETHER_START, ETHER_SIZE, MT_DEVICE } + { + .virtual = ETHER_BASE, + .pfn =__phys_to_pfn(ETHER_START), + .length = ETHER_SIZE, + .type = MT_DEVICE + } }; static void __init cdb89712_map_io(void) diff --git a/arch/arm/mach-clps711x/ceiva.c b/arch/arm/mach-clps711x/ceiva.c index 780d9180598..35d51a759b5 100644 --- a/arch/arm/mach-clps711x/ceiva.c +++ b/arch/arm/mach-clps711x/ceiva.c @@ -37,11 +37,13 @@ #include "common.h" static struct map_desc ceiva_io_desc[] __initdata = { - /* virtual, physical, length, type */ - - /* SED1355 controlled video RAM & registers */ - { CEIVA_VIRT_SED1355, CEIVA_PHYS_SED1355, SZ_2M, MT_DEVICE } - + /* SED1355 controlled video RAM & registers */ + { + .virtual = CEIVA_VIRT_SED1355, + .pfn = __phys_to_pfn(CEIVA_PHYS_SED1355), + .length = SZ_2M, + .type = MT_DEVICE + } }; diff --git a/arch/arm/mach-clps711x/edb7211-mm.c b/arch/arm/mach-clps711x/edb7211-mm.c index 7fd7b01822d..72f8bb05d55 100644 --- a/arch/arm/mach-clps711x/edb7211-mm.c +++ b/arch/arm/mach-clps711x/edb7211-mm.c @@ -51,15 +51,27 @@ extern void clps711x_map_io(void); * happens). */ static struct map_desc edb7211_io_desc[] __initdata = { - /* virtual, physical, length, type */ - - /* memory-mapped extra keyboard row and CS8900A Ethernet chip */ - { EP7211_VIRT_EXTKBD, EP7211_PHYS_EXTKBD, SZ_1M, MT_DEVICE }, - { EP7211_VIRT_CS8900A, EP7211_PHYS_CS8900A, SZ_1M, MT_DEVICE }, - - /* flash banks */ - { EP7211_VIRT_FLASH1, EP7211_PHYS_FLASH1, SZ_8M, MT_DEVICE }, - { EP7211_VIRT_FLASH2, EP7211_PHYS_FLASH2, SZ_8M, MT_DEVICE } + { /* memory-mapped extra keyboard row */ + .virtual = EP7211_VIRT_EXTKBD, + .pfn = __phys_to_pfn(EP7211_PHYS_EXTKBD), + .length = SZ_1M, + .type - MT_DEVICE + }, { /* and CS8900A Ethernet chip */ + .virtual = EP7211_VIRT_CS8900A, + .pfn = __phys_to_pfn(EP7211_PHYS_CS8900A), + .length = SZ_1M, + .type = MT_DEVICE + }, { /* flash banks */ + .virtual = EP7211_VIRT_FLASH1, + .pfn = __phys_to_pfn(EP7211_PHYS_FLASH1), + .length = SZ_8M, + .type = MT_DEVICE + }, { + .virtual = EP7211_VIRT_FLASH2, + .pfn = __phys_to_pfn(EP7211_PHYS_FLASH2), + .length = SZ_8M, + .type = MT_DEVICE + } }; void __init edb7211_map_io(void) diff --git a/arch/arm/mach-clps711x/mm.c b/arch/arm/mach-clps711x/mm.c index 120b7cac84b..a00f77ef8df 100644 --- a/arch/arm/mach-clps711x/mm.c +++ b/arch/arm/mach-clps711x/mm.c @@ -24,6 +24,7 @@ #include <linux/init.h> #include <linux/bootmem.h> +#include <asm/sizes.h> #include <asm/hardware.h> #include <asm/pgtable.h> #include <asm/page.h> @@ -34,7 +35,12 @@ * This maps the generic CLPS711x registers */ static struct map_desc clps711x_io_desc[] __initdata = { - { CLPS7111_VIRT_BASE, CLPS7111_PHYS_BASE, 1048576, MT_DEVICE } + { + .virtual = CLPS7111_VIRT_BASE, + .pfn = __phys_to_pfn(CLPS7111_PHYS_BASE), + .length = SZ_1M, + .type = MT_DEVICE + } }; void __init clps711x_map_io(void) diff --git a/arch/arm/mach-clps711x/mp1000-mach.c b/arch/arm/mach-clps711x/mp1000-mach.c new file mode 100644 index 00000000000..c2816bcde5e --- /dev/null +++ b/arch/arm/mach-clps711x/mp1000-mach.c @@ -0,0 +1,49 @@ +/* + * linux/arch/arm/mach-mp1000/mp1000.c + * + * Copyright (C) 2005 Comdial Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include <linux/init.h> +#include <linux/types.h> +#include <linux/string.h> + +#include <asm/setup.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/arch/mp1000-seprom.h> + +#include "common.h" + +extern void mp1000_map_io(void); + +static void __init mp1000_init(void) +{ + seprom_init(); +} + +MACHINE_START(MP1000, "Comdial MP1000") + /* Maintainer: Jon Ringle */ + .phys_ram = 0xc0000000, + .phys_io = 0x80000000, + .io_pg_offst = ((0xff000000) >> 18) & 0xfffc, + .boot_params = 0xc0015100, + .map_io = mp1000_map_io, + .init_irq = clps711x_init_irq, + .init_machine = mp1000_init, + .timer = &clps711x_timer, +MACHINE_END + diff --git a/arch/arm/mach-clps711x/mp1000-mm.c b/arch/arm/mach-clps711x/mp1000-mm.c new file mode 100644 index 00000000000..20e810b0ec0 --- /dev/null +++ b/arch/arm/mach-clps711x/mp1000-mm.c @@ -0,0 +1,47 @@ +/* + * linux/arch/arm/mach-mp1000/mm.c + * + * Extra MM routines for the MP1000 + * + * Copyright (C) 2005 Comdial Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include <linux/kernel.h> +#include <linux/init.h> + +#include <asm/hardware.h> +#include <asm/page.h> +#include <asm/pgtable.h> +#include <asm/sizes.h> + +#include <asm/mach/map.h> + +extern void clps711x_map_io(void); + +static struct map_desc mp1000_io_desc[] __initdata = { + { MP1000_EIO_BASE, MP1000_EIO_START, MP1000_EIO_SIZE, MT_DEVICE }, + { MP1000_FIO_BASE, MP1000_FIO_START, MP1000_FIO_SIZE, MT_DEVICE }, + { MP1000_LIO_BASE, MP1000_LIO_START, MP1000_LIO_SIZE, MT_DEVICE }, + { MP1000_NIO_BASE, MP1000_NIO_START, MP1000_NIO_SIZE, MT_DEVICE }, + { MP1000_IDE_BASE, MP1000_IDE_START, MP1000_IDE_SIZE, MT_DEVICE }, + { MP1000_DSP_BASE, MP1000_DSP_START, MP1000_DSP_SIZE, MT_DEVICE } +}; + +void __init mp1000_map_io(void) +{ + clps711x_map_io(); + iotable_init(mp1000_io_desc, ARRAY_SIZE(mp1000_io_desc)); +} diff --git a/arch/arm/mach-clps711x/mp1000-seprom.c b/arch/arm/mach-clps711x/mp1000-seprom.c new file mode 100644 index 00000000000..b22d0bebb85 --- /dev/null +++ b/arch/arm/mach-clps711x/mp1000-seprom.c @@ -0,0 +1,195 @@ +/*` + * mp1000-seprom.c + * + * This file contains the Serial EEPROM code for the MP1000 board + * + * Copyright (C) 2005 Comdial Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <asm/hardware.h> +#include <asm/hardware/clps7111.h> +#include <asm/arch/mp1000-seprom.h> + +/* If SepromInit() can initialize and checksum the seprom successfully, */ +/* then it will point seprom_data_ptr at the shadow copy. */ + +static eeprom_struct seprom_data; /* shadow copy of seprom content */ + +eeprom_struct *seprom_data_ptr = 0; /* 0 => not initialized */ + +/* + * Port D Bit 5 is Chip Select for EEPROM + * Port E Bit 0 is Input, Data out from EEPROM + * Port E Bit 1 is Output, Data in to EEPROM + * Port E Bit 2 is Output, CLK to EEPROM + */ + +static char *port_d_ptr = (char *)(CLPS7111_VIRT_BASE + PDDR); +static char *port_e_ptr = (char *)(CLPS7111_VIRT_BASE + PEDR); + +#define NO_OF_SHORTS 64 // Device is 64 x 16 bits +#define ENABLE_RW 0 +#define DISABLE_RW 1 + +static inline void toggle_seprom_clock(void) +{ + *port_e_ptr |= HwPortESepromCLK; + *port_e_ptr &= ~(HwPortESepromCLK); +} + +static inline void select_eeprom(void) +{ + *port_d_ptr |= HwPortDEECS; + *port_e_ptr &= ~(HwPortESepromCLK); +} + +static inline void deselect_eeprom(void) +{ + *port_d_ptr &= ~(HwPortDEECS); + *port_e_ptr &= ~(HwPortESepromDIn); +} + +/* + * GetSepromDataPtr - returns pointer to shadow (RAM) copy of seprom + * and returns 0 if seprom is not initialized or + * has a checksum error. + */ + +eeprom_struct* get_seprom_ptr(void) +{ + return seprom_data_ptr; +} + +unsigned char* get_eeprom_mac_address(void) +{ + return seprom_data_ptr->variant.eprom_struct.mac_Address; +} + +/* + * ReadSProm, Physically reads data from the Serial PROM + */ +static void read_sprom(short address, int length, eeprom_struct *buffer) +{ + short data = COMMAND_READ | (address & 0x3F); + short bit; + int i; + + select_eeprom(); + + // Clock in 9 bits of the command + for (i = 0, bit = 0x100; i < 9; i++, bit >>= 1) { + if (data & bit) + *port_e_ptr |= HwPortESepromDIn; + else + *port_e_ptr &= ~(HwPortESepromDIn); + + toggle_seprom_clock(); + } + + // + // Now read one or more shorts of data from the Seprom + // + while (length-- > 0) { + data = 0; + + // Read 16 bits at a time + for (i = 0; i < 16; i++) { + data <<= 1; + toggle_seprom_clock(); + data |= *port_e_ptr & HwPortESepromDOut; + + } + + buffer->variant.eprom_short_data[address++] = data; + } + + deselect_eeprom(); + + return; +} + + + +/* + * ReadSerialPROM + * + * Input: Pointer to array of 64 x 16 Bits + * + * Output: if no problem reading data is filled in + */ +static void read_serial_prom(eeprom_struct *data) +{ + read_sprom(0, 64, data); +} + + +// +// Compute Serial EEPROM checksum +// +// Input: Pointer to struct with Eprom data +// +// Output: The computed Eprom checksum +// +static short compute_seprom_checksum(eeprom_struct *data) +{ + short checksum = 0; + int i; + + for (i = 0; i < 126; i++) { + checksum += (short)data->variant.eprom_byte_data[i]; + } + + return((short)(0x5555 - (checksum & 0xFFFF))); +} + +// +// Make sure the data port bits for the SEPROM are correctly initialised +// + +void __init seprom_init(void) +{ + short checksum; + + // Init Port D + *(char *)(CLPS7111_VIRT_BASE + PDDDR) = 0x0; + *(char *)(CLPS7111_VIRT_BASE + PDDR) = 0x15; + + // Init Port E + *(int *)(CLPS7111_VIRT_BASE + PEDDR) = 0x06; + *(int *)(CLPS7111_VIRT_BASE + PEDR) = 0x04; + + // + // Make sure that EEPROM struct size never exceeds 128 bytes + // + if (sizeof(eeprom_struct) > 128) { + panic("Serial PROM struct size > 128, aborting read\n"); + } + + read_serial_prom(&seprom_data); + + checksum = compute_seprom_checksum(&seprom_data); + + if (checksum != seprom_data.variant.eprom_short_data[63]) { + panic("Serial EEPROM checksum failed\n"); + } + + seprom_data_ptr = &seprom_data; +} + diff --git a/arch/arm/mach-clps711x/p720t.c b/arch/arm/mach-clps711x/p720t.c index 5bdb90edf99..a1acb945fb5 100644 --- a/arch/arm/mach-clps711x/p720t.c +++ b/arch/arm/mach-clps711x/p720t.c @@ -29,6 +29,7 @@ #include <asm/pgtable.h> #include <asm/page.h> #include <asm/setup.h> +#include <asm/sizes.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -42,8 +43,17 @@ * We map both here. */ static struct map_desc p720t_io_desc[] __initdata = { - { SYSPLD_VIRT_BASE, SYSPLD_PHYS_BASE, 1048576, MT_DEVICE }, - { 0xfe400000, 0x10400000, 1048576, MT_DEVICE } + { + .virtual = SYSPLD_VIRT_BASE, + .pfn = __phys_to_pfn(SYSPLD_PHYS_BASE), + .length = SZ_1M, + .type = MT_DEVICE + }, { + .virtual = 0xfe400000, + .pfn = __phys_to_pfn(0x10400000), + .length = SZ_1M, + .type = MT_DEVICE + } }; static void __init diff --git a/arch/arm/mach-clps7500/core.c b/arch/arm/mach-clps7500/core.c index e216ab8b9e8..0364ba4b539 100644 --- a/arch/arm/mach-clps7500/core.c +++ b/arch/arm/mach-clps7500/core.c @@ -259,10 +259,27 @@ static void __init clps7500_init_irq(void) } static struct map_desc cl7500_io_desc[] __initdata = { - { IO_BASE, IO_START, IO_SIZE, MT_DEVICE }, /* IO space */ - { ISA_BASE, ISA_START, ISA_SIZE, MT_DEVICE }, /* ISA space */ - { FLASH_BASE, FLASH_START, FLASH_SIZE, MT_DEVICE }, /* Flash */ - { LED_BASE, LED_START, LED_SIZE, MT_DEVICE } /* LED */ + { /* IO space */ + .virtual = IO_BASE, + .pfn = __phys_to_pfn(IO_START), + .length = IO_SIZE, + .type = MT_DEVICE + }, { /* ISA space */ + .virtual = ISA_BASE, + .pfn = __phys_to_pfn(ISA_START), + .length = ISA_SIZE, + .type = MT_DEVICE + }, { /* Flash */ + .virtual = FLASH_BASE, + .pfn = __phys_to_pfn(FLASH_START), + .length = FLASH_SIZE, + .type = MT_DEVICE + }, { /* LED */ + .virtual = LED_BASE, + .pfn = __phys_to_pfn(LED_START), + .length = LED_SIZE, + .type = MT_DEVICE + } }; static void __init clps7500_map_io(void) diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c index 5aeadfd7214..15261646dcd 100644 --- a/arch/arm/mach-ebsa110/core.c +++ b/arch/arm/mach-ebsa110/core.c @@ -76,16 +76,42 @@ static struct map_desc ebsa110_io_desc[] __initdata = { /* * sparse external-decode ISAIO space */ - { IRQ_STAT, TRICK4_PHYS, PGDIR_SIZE, MT_DEVICE }, /* IRQ_STAT/IRQ_MCLR */ - { IRQ_MASK, TRICK3_PHYS, PGDIR_SIZE, MT_DEVICE }, /* IRQ_MASK/IRQ_MSET */ - { SOFT_BASE, TRICK1_PHYS, PGDIR_SIZE, MT_DEVICE }, /* SOFT_BASE */ - { PIT_BASE, TRICK0_PHYS, PGDIR_SIZE, MT_DEVICE }, /* PIT_BASE */ + { /* IRQ_STAT/IRQ_MCLR */ + .virtual = IRQ_STAT, + .pfn = __phys_to_pfn(TRICK4_PHYS), + .length = PGDIR_SIZE, + .type = MT_DEVICE + }, { /* IRQ_MASK/IRQ_MSET */ + .virtual = IRQ_MASK, + .pfn = __phys_to_pfn(TRICK3_PHYS), + .length = PGDIR_SIZE, + .type = MT_DEVICE + }, { /* SOFT_BASE */ + .virtual = SOFT_BASE, + .pfn = __phys_to_pfn(TRICK1_PHYS), + .length = PGDIR_SIZE, + .type = MT_DEVICE + }, { /* PIT_BASE */ + .virtual = PIT_BASE, + .pfn = __phys_to_pfn(TRICK0_PHYS), + .length = PGDIR_SIZE, + .type = MT_DEVICE + }, /* * self-decode ISAIO space */ - { ISAIO_BASE, ISAIO_PHYS, ISAIO_SIZE, MT_DEVICE }, - { ISAMEM_BASE, ISAMEM_PHYS, ISAMEM_SIZE, MT_DEVICE } + { + .virtual = ISAIO_BASE, + .pfn = __phys_to_pfn(ISAIO_PHYS), + .length = ISAIO_SIZE, + .type = MT_DEVICE + }, { + .virtual = ISAMEM_BASE, + .pfn = __phys_to_pfn(ISAMEM_PHYS), + .length = ISAMEM_SIZE, + .type = MT_DEVICE + } }; static void __init ebsa110_map_io(void) diff --git a/arch/arm/mach-ebsa110/io.c b/arch/arm/mach-ebsa110/io.c index ef7eb5dc91b..c648bfb676a 100644 --- a/arch/arm/mach-ebsa110/io.c +++ b/arch/arm/mach-ebsa110/io.c @@ -24,6 +24,7 @@ #include <linux/kernel.h> #include <linux/types.h> +#include <asm/hardware.h> #include <asm/io.h> #include <asm/page.h> diff --git a/arch/arm/mach-epxa10db/mm.c b/arch/arm/mach-epxa10db/mm.c index 2aa57fa46da..e8832d0910e 100644 --- a/arch/arm/mach-epxa10db/mm.c +++ b/arch/arm/mach-epxa10db/mm.c @@ -31,12 +31,37 @@ /* Page table mapping for I/O region */ static struct map_desc epxa10db_io_desc[] __initdata = { - { IO_ADDRESS(EXC_REGISTERS_BASE), EXC_REGISTERS_BASE, SZ_16K, MT_DEVICE }, - { IO_ADDRESS(EXC_PLD_BLOCK0_BASE), EXC_PLD_BLOCK0_BASE, SZ_16K, MT_DEVICE }, - { IO_ADDRESS(EXC_PLD_BLOCK1_BASE), EXC_PLD_BLOCK1_BASE, SZ_16K, MT_DEVICE }, - { IO_ADDRESS(EXC_PLD_BLOCK2_BASE), EXC_PLD_BLOCK2_BASE, SZ_16K, MT_DEVICE }, - { IO_ADDRESS(EXC_PLD_BLOCK3_BASE), EXC_PLD_BLOCK3_BASE, SZ_16K, MT_DEVICE }, - { FLASH_VADDR(EXC_EBI_BLOCK0_BASE), EXC_EBI_BLOCK0_BASE, SZ_16M, MT_DEVICE } + { + .virtual = IO_ADDRESS(EXC_REGISTERS_BASE), + .pfn = __phys_to_pfn(EXC_REGISTERS_BASE), + .length = SZ_16K, + .type = MT_DEVICE + }, { + .virtual = IO_ADDRESS(EXC_PLD_BLOCK0_BASE), + .pfn = __phys_to_pfn(EXC_PLD_BLOCK0_BASE), + .length = SZ_16K, + .type = MT_DEVICE + }, { + .virtual = IO_ADDRESS(EXC_PLD_BLOCK1_BASE), + .pfn =__phys_to_pfn(EXC_PLD_BLOCK1_BASE), + .length = SZ_16K, + .type = MT_DEVICE + }, { + .virtual = IO_ADDRESS(EXC_PLD_BLOCK2_BASE), + .physical = __phys_to_pfn(EXC_PLD_BLOCK2_BASE), + .length = SZ_16K, + .type = MT_DEVICE + }, { + .virtual = IO_ADDRESS(EXC_PLD_BLOCK3_BASE), + .pfn = __phys_to_pfn(EXC_PLD_BLOCK3_BASE), + .length = SZ_16K, + .type = MT_DEVICE + }, { + .virtual = FLASH_VADDR(EXC_EBI_BLOCK0_BASE), + .pfn = __phys_to_pfn(EXC_EBI_BLOCK0_BASE), + .length = SZ_16M, + .type = MT_DEVICE + } }; void __init epxa10db_map_io(void) diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c index eb8238c1ef0..dc09fd200c1 100644 --- a/arch/arm/mach-footbridge/common.c +++ b/arch/arm/mach-footbridge/common.c @@ -130,8 +130,17 @@ void __init footbridge_init_irq(void) * it means that we have extra bullet protection on our feet. */ static struct map_desc fb_common_io_desc[] __initdata = { - { ARMCSR_BASE, DC21285_ARMCSR_BASE, ARMCSR_SIZE, MT_DEVICE }, - { XBUS_BASE, 0x40000000, XBUS_SIZE, MT_DEVICE } + { + .virtual = ARMCSR_BASE, + .pfn = DC21285_ARMCSR_BASE, + .length = ARMCSR_SIZE, + .type = MT_DEVICE + }, { + .virtual = XBUS_BASE, + .pfn = __phys_to_pfn(0x40000000), + .length = XBUS_SIZE, + .type = MT_DEVICE + } }; /* @@ -140,11 +149,32 @@ static struct map_desc fb_common_io_desc[] __initdata = { */ static struct map_desc ebsa285_host_io_desc[] __initdata = { #if defined(CONFIG_ARCH_FOOTBRIDGE) && defined(CONFIG_FOOTBRIDGE_HOST) - { PCIMEM_BASE, DC21285_PCI_MEM, PCIMEM_SIZE, MT_DEVICE }, - { PCICFG0_BASE, DC21285_PCI_TYPE_0_CONFIG, PCICFG0_SIZE, MT_DEVICE }, - { PCICFG1_BASE, DC21285_PCI_TYPE_1_CONFIG, PCICFG1_SIZE, MT_DEVICE }, - { PCIIACK_BASE, DC21285_PCI_IACK, PCIIACK_SIZE, MT_DEVICE }, - { PCIO_BASE, DC21285_PCI_IO, PCIO_SIZE, MT_DEVICE } + { + .virtual = PCIMEM_BASE, + .pfn = __phys_to_pfn(DC21285_PCI_MEM), + .length = PCIMEM_SIZE, + .type = MT_DEVICE + }, { + .virtual = PCICFG0_BASE, + .pfn = __phys_to_pfn(DC21285_PCI_TYPE_0_CONFIG), + .length = PCICFG0_SIZE, + .type = MT_DEVICE + }, { + .virtual = PCICFG1_BASE, + .pfn = __phys_to_pfn(DC21285_PCI_TYPE_1_CONFIG), + .length = PCICFG1_SIZE, + .type = MT_DEVICE + }, { + .virtual = PCIIACK_BASE, + .pfn = __phys_to_pfn(DC21285_PCI_IACK), + .length = PCIIACK_SIZE, + .type = MT_DEVICE + }, { + .virtual = PCIO_BASE, + .pfn = __phys_to_pfn(DC21285_PCI_IO), + .length = PCIO_SIZE, + .type = MT_DEVICE + } #endif }; @@ -153,8 +183,17 @@ static struct map_desc ebsa285_host_io_desc[] __initdata = { */ static struct map_desc co285_io_desc[] __initdata = { #ifdef CONFIG_ARCH_CO285 - { PCIO_BASE, DC21285_PCI_IO, PCIO_SIZE, MT_DEVICE }, - { PCIMEM_BASE, DC21285_PCI_MEM, PCIMEM_SIZE, MT_DEVICE } + { + .virtual = PCIO_BASE, + .pfn = __phys_to_pfn(DC21285_PCI_IO), + .length = PCIO_SIZE, + .type = MT_DEVICE + }, { + .virtual = PCIMEM_BASE, + .pfn = __phys_to_pfn(DC21285_PCI_MEM), + .length = PCIMEM_SIZE, + .type = MT_DEVICE + } #endif }; diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c index 5110e2e65dd..c096b456930 100644 --- a/arch/arm/mach-h720x/common.c +++ b/arch/arm/mach-h720x/common.c @@ -237,7 +237,12 @@ void __init h720x_init_irq (void) } static struct map_desc h720x_io_desc[] __initdata = { - { IO_VIRT, IO_PHYS, IO_SIZE, MT_DEVICE }, + { + .virtual = IO_VIRT, + .pfn = __phys_to_pfn(IO_PHYS), + .length = IO_SIZE, + .type = MT_DEVICE + }, }; /* Initialize io tables */ diff --git a/arch/arm/mach-imx/generic.c b/arch/arm/mach-imx/generic.c index f8a742bb2d5..cb14b0682ce 100644 --- a/arch/arm/mach-imx/generic.c +++ b/arch/arm/mach-imx/generic.c @@ -273,8 +273,12 @@ static struct platform_device *devices[] __initdata = { }; static struct map_desc imx_io_desc[] __initdata = { - /* virtual physical length type */ - {IMX_IO_BASE, IMX_IO_PHYS, IMX_IO_SIZE, MT_DEVICE}, + { + .virtual = IMX_IO_BASE, + .pfn = __phys_to_pfn(IMX_IO_PHYS), + .length = IMX_IO_SIZE, + .type = MT_DEVICE + } }; void __init diff --git a/arch/arm/mach-imx/mx1ads.c b/arch/arm/mach-imx/mx1ads.c index a7511ddfe36..4cbdc1fe04b 100644 --- a/arch/arm/mach-imx/mx1ads.c +++ b/arch/arm/mach-imx/mx1ads.c @@ -61,13 +61,37 @@ mx1ads_init(void) } static struct map_desc mx1ads_io_desc[] __initdata = { - /* virtual physical length type */ - {IMX_CS0_VIRT, IMX_CS0_PHYS, IMX_CS0_SIZE, MT_DEVICE}, - {IMX_CS1_VIRT, IMX_CS1_PHYS, IMX_CS1_SIZE, MT_DEVICE}, - {IMX_CS2_VIRT, IMX_CS2_PHYS, IMX_CS2_SIZE, MT_DEVICE}, - {IMX_CS3_VIRT, IMX_CS3_PHYS, IMX_CS3_SIZE, MT_DEVICE}, - {IMX_CS4_VIRT, IMX_CS4_PHYS, IMX_CS4_SIZE, MT_DEVICE}, - {IMX_CS5_VIRT, IMX_CS5_PHYS, IMX_CS5_SIZE, MT_DEVICE}, + { + .virtual = IMX_CS0_VIRT, + .pfn = __phys_to_pfn(IMX_CS0_PHYS), + .length = IMX_CS0_SIZE, + .type = MT_DEVICE + }, { + .virtual = IMX_CS1_VIRT, + .pfn = __phys_to_pfn(IMX_CS1_PHYS), + .length = IMX_CS1_SIZE, + .type = MT_DEVICE + }, { + .virtual = IMX_CS2_VIRT, + .pfn = __phys_to_pfn(IMX_CS2_PHYS), + .length = IMX_CS2_SIZE, + .type = MT_DEVICE + }, { + .virtual = IMX_CS3_VIRT, + .pfn = __phys_to_pfn(IMX_CS3_PHYS), + .length = IMX_CS3_SIZE, + .type = MT_DEVICE + }, { + .virtual = IMX_CS4_VIRT, + .pfn = __phys_to_pfn(IMX_CS4_PHYS), + .length = IMX_CS4_SIZE, + .type = MT_DEVICE + }, { + .virtual = IMX_CS5_VIRT, + .pfn = __phys_to_pfn(IMX_CS5_PHYS), + .length = IMX_CS5_SIZE, + .type = MT_DEVICE + } }; static void __init diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c index 36e2b6eb67b..f368b85f044 100644 --- a/arch/arm/mach-integrator/integrator_ap.c +++ b/arch/arm/mach-integrator/integrator_ap.c @@ -75,19 +75,72 @@ */ static struct map_desc ap_io_desc[] __initdata = { - { IO_ADDRESS(INTEGRATOR_HDR_BASE), INTEGRATOR_HDR_BASE, SZ_4K, MT_DEVICE }, - { IO_ADDRESS(INTEGRATOR_SC_BASE), INTEGRATOR_SC_BASE, SZ_4K, MT_DEVICE }, - { IO_ADDRESS(INTEGRATOR_EBI_BASE), INTEGRATOR_EBI_BASE, SZ_4K, MT_DEVICE }, - { IO_ADDRESS(INTEGRATOR_CT_BASE), INTEGRATOR_CT_BASE, SZ_4K, MT_DEVICE }, - { IO_ADDRESS(INTEGRATOR_IC_BASE), INTEGRATOR_IC_BASE, SZ_4K, MT_DEVICE }, - { IO_ADDRESS(INTEGRATOR_UART0_BASE), INTEGRATOR_UART0_BASE, SZ_4K, MT_DEVICE }, - { IO_ADDRESS(INTEGRATOR_UART1_BASE), INTEGRATOR_UART1_BASE, SZ_4K, MT_DEVICE }, - { IO_ADDRESS(INTEGRATOR_DBG_BASE), INTEGRATOR_DBG_BASE, SZ_4K, MT_DEVICE }, - { IO_ADDRESS(INTEGRATOR_GPIO_BASE), INTEGRATOR_GPIO_BASE, SZ_4K, MT_DEVICE }, - { PCI_MEMORY_VADDR, PHYS_PCI_MEM_BASE, SZ_16M, MT_DEVICE }, - { PCI_CONFIG_VADDR, PHYS_PCI_CONFIG_BASE, SZ_16M, MT_DEVICE }, - { PCI_V3_VADDR, PHYS_PCI_V3_BASE, SZ_64K, MT_DEVICE }, - { PCI_IO_VADDR, PHYS_PCI_IO_BASE, SZ_64K, MT_DEVICE } + { + .virtual = IO_ADDRESS(INTEGRATOR_HDR_BASE), + .pfn = __phys_to_pfn(INTEGRATOR_HDR_BASE), + .length = SZ_4K, + .type = MT_DEVICE + }, { + .virtual = IO_ADDRESS(INTEGRATOR_SC_BASE), + .pfn = __phys_to_pfn(INTEGRATOR_SC_BASE), + .length = SZ_4K, + .type = MT_DEVICE + }, { + .virtual = IO_ADDRESS(INTEGRATOR_EBI_BASE), + .pfn = __phys_to_pfn(INTEGRATOR_EBI_BASE), + .length = SZ_4K, + .type = MT_DEVICE + }, { + .virtual = IO_ADDRESS(INTEGRATOR_CT_BASE), + .pfn = __phys_to_pfn(INTEGRATOR_CT_BASE), + .length = SZ_4K, + .type = MT_DEVICE + }, { + .virtual = IO_ADDRESS(INTEGRATOR_IC_BASE), + .pfn = __phys_to_pfn(INTEGRATOR_IC_BASE), + .length = SZ_4K, + .type = MT_DEVICE + }, { + .virtual = IO_ADDRESS(INTEGRATOR_UART0_BASE), + .pfn = __phys_to_pfn(INTEGRATOR_UART0_BASE), + .length = SZ_4K, + .type = MT_DEVICE + }, { + .virtual = IO_ADDRESS(INTEGRATOR_UART1_BASE), + .pfn = __phys_to_pfn(INTEGRATOR_UART1_BASE), + .length = SZ_4K, + .type = MT_DEVICE + }, { + .virtual = IO_ADDRESS(INTEGRATOR_DBG_BASE), + .pfn = __phys_to_pfn(INTEGRATOR_DBG_BASE), + .length = SZ_4K, + .type = MT_DEVICE + }, { + .virtual = IO_ADDRESS(INTEGRATOR_GPIO_BASE), + .pfn = __phys_to_pfn(INTEGRATOR_GPIO_BASE), + .length = SZ_4K, + .type = MT_DEVICE + }, { + .virtual = PCI_MEMORY_VADDR, + .pfn = __phys_to_pfn(PHYS_PCI_MEM_BASE), + .length = SZ_16M, + .type = MT_DEVICE + }, { + .virtual = PCI_CONFIG_VADDR, + .pfn = __phys_to_pfn(PHYS_PCI_CONFIG_BASE), + .length = SZ_16M, + .type = MT_DEVICE + }, { + .virtual = PCI_V3_VADDR, + .pfn = __phys_to_pfn(PHYS_PCI_V3_BASE), + .length = SZ_64K, + .type = MT_DEVICE + }, { + .virtual = PCI_IO_VADDR, + .pfn = __phys_to_pfn(PHYS_PCI_IO_BASE), + .length = SZ_64K, + .type = MT_DEVICE + } }; static void __init ap_map_io(void) diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c index 2be5c03ab87..aa34c58b96c 100644 --- a/arch/arm/mach-integrator/integrator_cp.c +++ b/arch/arm/mach-integrator/integrator_cp.c @@ -74,17 +74,62 @@ */ static struct map_desc intcp_io_desc[] __initdata = { - { IO_ADDRESS(INTEGRATOR_HDR_BASE), INTEGRATOR_HDR_BASE, SZ_4K, MT_DEVICE }, - { IO_ADDRESS(INTEGRATOR_SC_BASE), INTEGRATOR_SC_BASE, SZ_4K, MT_DEVICE }, - { IO_ADDRESS(INTEGRATOR_EBI_BASE), INTEGRATOR_EBI_BASE, SZ_4K, MT_DEVICE }, - { IO_ADDRESS(INTEGRATOR_CT_BASE), INTEGRATOR_CT_BASE, SZ_4K, MT_DEVICE }, - { IO_ADDRESS(INTEGRATOR_IC_BASE), INTEGRATOR_IC_BASE, SZ_4K, MT_DEVICE }, - { IO_ADDRESS(INTEGRATOR_UART0_BASE), INTEGRATOR_UART0_BASE, SZ_4K, MT_DEVICE }, - { IO_ADDRESS(INTEGRATOR_UART1_BASE), INTEGRATOR_UART1_BASE, SZ_4K, MT_DEVICE }, - { IO_ADDRESS(INTEGRATOR_DBG_BASE), INTEGRATOR_DBG_BASE, SZ_4K, MT_DEVICE }, - { IO_ADDRESS(INTEGRATOR_GPIO_BASE), INTEGRATOR_GPIO_BASE, SZ_4K, MT_DEVICE }, - { 0xfca00000, 0xca000000, SZ_4K, MT_DEVICE }, - { 0xfcb00000, 0xcb000000, SZ_4K, MT_DEVICE }, + { + .virtual = IO_ADDRESS(INTEGRATOR_HDR_BASE), + .pfn = __phys_to_pfn(INTEGRATOR_HDR_BASE), + .length = SZ_4K, + .type = MT_DEVICE + }, { + .virtual = IO_ADDRESS(INTEGRATOR_SC_BASE), + .pfn = __phys_to_pfn(INTEGRATOR_SC_BASE), + .length = SZ_4K, + .type = MT_DEVICE + }, { + .virtual = IO_ADDRESS(INTEGRATOR_EBI_BASE), + .pfn = __phys_to_pfn(INTEGRATOR_EBI_BASE), + .length = SZ_4K, + .type = MT_DEVICE + }, { + .virtual = IO_ADDRESS(INTEGRATOR_CT_BASE), + .pfn = __phys_to_pfn(INTEGRATOR_CT_BASE), + .length = SZ_4K, + .type = MT_DEVICE + }, { + .virtual = IO_ADDRESS(INTEGRATOR_IC_BASE), + .pfn = __phys_to_pfn(INTEGRATOR_IC_BASE), + .length = SZ_4K, + .type = MT_DEVICE + }, { + .virtual = IO_ADDRESS(INTEGRATOR_UART0_BASE), + .pfn = __phys_to_pfn(INTEGRATOR_UART0_BASE), + .length = SZ_4K, + .type = MT_DEVICE + }, { + .virtual = IO_ADDRESS(INTEGRATOR_UART1_BASE), + .pfn = __phys_to_pfn(INTEGRATOR_UART1_BASE), + .length = SZ_4K, + .type = MT_DEVICE + }, { + .virtual = IO_ADDRESS(INTEGRATOR_DBG_BASE), + .pfn = __phys_to_pfn(INTEGRATOR_DBG_BASE), + .length = SZ_4K, + .type = MT_DEVICE + }, { + .virtual = IO_ADDRESS(INTEGRATOR_GPIO_BASE), + .pfn = __phys_to_pfn(INTEGRATOR_GPIO_BASE), + .length = SZ_4K, + .type = MT_DEVICE + }, { + .virtual = 0xfca00000, + .pfn = __phys_to_pfn(0xca000000), + .length = SZ_4K, + .type = MT_DEVICE + }, { + .virtual = 0xfcb00000, + .pfn = __phys_to_pfn(0xcb000000), + .length = SZ_4K, + .type = MT_DEVICE + } }; static void __init intcp_map_io(void) diff --git a/arch/arm/mach-iop3xx/iop321-setup.c b/arch/arm/mach-iop3xx/iop321-setup.c index 0f921ba2750..bb5091223b6 100644 --- a/arch/arm/mach-iop3xx/iop321-setup.c +++ b/arch/arm/mach-iop3xx/iop321-setup.c @@ -38,13 +38,17 @@ * Standard IO mapping for all IOP321 based systems */ static struct map_desc iop321_std_desc[] __initdata = { - /* virtual physical length type */ - - /* mem mapped registers */ - { IOP321_VIRT_MEM_BASE, IOP321_PHYS_MEM_BASE, 0x00002000, MT_DEVICE }, - - /* PCI IO space */ - { IOP321_PCI_LOWER_IO_VA, IOP321_PCI_LOWER_IO_PA, IOP321_PCI_IO_WINDOW_SIZE, MT_DEVICE } + { /* mem mapped registers */ + .virtual = IOP321_VIRT_MEM_BASE, + .pfn = __phys_to_pfn(IOP321_PHYS_MEM_BASE), + .length = 0x00002000, + .type = MT_DEVICE + }, { /* PCI IO space */ + .virtual = IOP321_PCI_LOWER_IO_VA, + .pfn = __phys_to_pfn(IOP321_PCI_LOWER_IO_PA), + .length = IOP321_PCI_IO_WINDOW_SIZE, + .type = MT_DEVICE + } }; #ifdef CONFIG_ARCH_IQ80321 diff --git a/arch/arm/mach-iop3xx/iop331-setup.c b/arch/arm/mach-iop3xx/iop331-setup.c index fc74b722f72..a2533c3ab42 100644 --- a/arch/arm/mach-iop3xx/iop331-setup.c +++ b/arch/arm/mach-iop3xx/iop331-setup.c @@ -37,13 +37,17 @@ * Standard IO mapping for all IOP331 based systems */ static struct map_desc iop331_std_desc[] __initdata = { - /* virtual physical length type */ - - /* mem mapped registers */ - { IOP331_VIRT_MEM_BASE, IOP331_PHYS_MEM_BASE, 0x00002000, MT_DEVICE }, - - /* PCI IO space */ - { IOP331_PCI_LOWER_IO_VA, IOP331_PCI_LOWER_IO_PA, IOP331_PCI_IO_WINDOW_SIZE, MT_DEVICE } + { /* mem mapped registers */ + .virtual = IOP331_VIRT_MEM_BASE, + .pfn = __phys_to_pfn(IOP331_PHYS_MEM_BASE), + .length = 0x00002000, + .type = MT_DEVICE + }, { /* PCI IO space */ + .virtual = IOP331_PCI_LOWER_IO_VA, + .pfn = __phys_to_pfn(IOP331_PCI_LOWER_IO_PA), + .length = IOP331_PCI_IO_WINDOW_SIZE, + .type = MT_DEVICE + } }; static struct uart_port iop331_serial_ports[] = { diff --git a/arch/arm/mach-iop3xx/iq31244-mm.c b/arch/arm/mach-iop3xx/iq31244-mm.c index 55992ab586b..e874b54eefe 100644 --- a/arch/arm/mach-iop3xx/iq31244-mm.c +++ b/arch/arm/mach-iop3xx/iq31244-mm.c @@ -29,10 +29,12 @@ * We use RedBoot's setup for the onboard devices. */ static struct map_desc iq31244_io_desc[] __initdata = { - /* virtual physical length type */ - - /* on-board devices */ - { IQ31244_UART, IQ31244_UART, 0x00100000, MT_DEVICE } + { /* on-board devices */ + .virtual = IQ31244_UART, + .pfn = __phys_to_pfn(IQ31244_UART), + .length = 0x00100000, + .type = MT_DEVICE + } }; void __init iq31244_map_io(void) diff --git a/arch/arm/mach-iop3xx/iq80321-mm.c b/arch/arm/mach-iop3xx/iq80321-mm.c index bb3e9e5a9af..d9cac5e1fc3 100644 --- a/arch/arm/mach-iop3xx/iq80321-mm.c +++ b/arch/arm/mach-iop3xx/iq80321-mm.c @@ -29,10 +29,12 @@ * We use RedBoot's setup for the onboard devices. */ static struct map_desc iq80321_io_desc[] __initdata = { - /* virtual physical length type */ - - /* on-board devices */ - { IQ80321_UART, IQ80321_UART, 0x00100000, MT_DEVICE } + { /* on-board devices */ + .virtual = IQ80321_UART, + .pfn = __phys_to_pfn(IQ80321_UART), + .length = 0x00100000, + .type = MT_DEVICE + } }; void __init iq80321_map_io(void) diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c index f4d7f1f6ef8..01c393c504d 100644 --- a/arch/arm/mach-ixp2000/core.c +++ b/arch/arm/mach-ixp2000/core.c @@ -83,42 +83,42 @@ void ixp2000_release_slowport(struct slowport_cfg *old_cfg) static struct map_desc ixp2000_io_desc[] __initdata = { { .virtual = IXP2000_CAP_VIRT_BASE, - .physical = IXP2000_CAP_PHYS_BASE, + .pfn = __phys_to_pfn(IXP2000_CAP_PHYS_BASE), .length = IXP2000_CAP_SIZE, .type = MT_DEVICE }, { .virtual = IXP2000_INTCTL_VIRT_BASE, - .physical = IXP2000_INTCTL_PHYS_BASE, + .pfn = __phys_to_pfn(IXP2000_INTCTL_PHYS_BASE), .length = IXP2000_INTCTL_SIZE, .type = MT_DEVICE }, { .virtual = IXP2000_PCI_CREG_VIRT_BASE, - .physical = IXP2000_PCI_CREG_PHYS_BASE, + .pfn = __phys_to_pfn(IXP2000_PCI_CREG_PHYS_BASE), .length = IXP2000_PCI_CREG_SIZE, .type = MT_DEVICE }, { .virtual = IXP2000_PCI_CSR_VIRT_BASE, - .physical = IXP2000_PCI_CSR_PHYS_BASE, + .pfn = __phys_to_pfn(IXP2000_PCI_CSR_PHYS_BASE), .length = IXP2000_PCI_CSR_SIZE, .type = MT_DEVICE }, { .virtual = IXP2000_MSF_VIRT_BASE, - .physical = IXP2000_MSF_PHYS_BASE, + .pfn = __phys_to_pfn(IXP2000_MSF_PHYS_BASE), .length = IXP2000_MSF_SIZE, .type = MT_DEVICE }, { .virtual = IXP2000_PCI_IO_VIRT_BASE, - .physical = IXP2000_PCI_IO_PHYS_BASE, + .pfn = __phys_to_pfn(IXP2000_PCI_IO_PHYS_BASE), .length = IXP2000_PCI_IO_SIZE, .type = MT_DEVICE }, { .virtual = IXP2000_PCI_CFG0_VIRT_BASE, - .physical = IXP2000_PCI_CFG0_PHYS_BASE, + .pfn = __phys_to_pfn(IXP2000_PCI_CFG0_PHYS_BASE), .length = IXP2000_PCI_CFG0_SIZE, .type = MT_DEVICE }, { .virtual = IXP2000_PCI_CFG1_VIRT_BASE, - .physical = IXP2000_PCI_CFG1_PHYS_BASE, + .pfn = __phys_to_pfn(IXP2000_PCI_CFG1_PHYS_BASE), .length = IXP2000_PCI_CFG1_SIZE, .type = MT_DEVICE } diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c index 63ba0191aa6..8b4a839b627 100644 --- a/arch/arm/mach-ixp2000/ixdp2x00.c +++ b/arch/arm/mach-ixp2000/ixdp2x00.c @@ -176,7 +176,7 @@ void ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigned long *************************************************************************/ static struct map_desc ixdp2x00_io_desc __initdata = { .virtual = IXDP2X00_VIRT_CPLD_BASE, - .physical = IXDP2X00_PHYS_CPLD_BASE, + .pfn = __phys_to_pfn(IXDP2X00_PHYS_CPLD_BASE), .length = IXDP2X00_CPLD_SIZE, .type = MT_DEVICE }; diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c index 7a510992128..fee1d7b7350 100644 --- a/arch/arm/mach-ixp2000/ixdp2x01.c +++ b/arch/arm/mach-ixp2000/ixdp2x01.c @@ -136,7 +136,7 @@ void __init ixdp2x01_init_irq(void) *************************************************************************/ static struct map_desc ixdp2x01_io_desc __initdata = { .virtual = IXDP2X01_VIRT_CPLD_BASE, - .physical = IXDP2X01_PHYS_CPLD_BASE, + .pfn = __phys_to_pfn(IXDP2X01_PHYS_CPLD_BASE), .length = IXDP2X01_CPLD_REGION_SIZE, .type = MT_DEVICE }; diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 36b6045213e..6c396447c4e 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -44,24 +44,24 @@ static struct map_desc ixp4xx_io_desc[] __initdata = { { /* UART, Interrupt ctrl, GPIO, timers, NPEs, MACs, USB .... */ .virtual = IXP4XX_PERIPHERAL_BASE_VIRT, - .physical = IXP4XX_PERIPHERAL_BASE_PHYS, + .pfn = __phys_to_pfn(IXP4XX_PERIPHERAL_BASE_PHYS), .length = IXP4XX_PERIPHERAL_REGION_SIZE, .type = MT_DEVICE }, { /* Expansion Bus Config Registers */ .virtual = IXP4XX_EXP_CFG_BASE_VIRT, - .physical = IXP4XX_EXP_CFG_BASE_PHYS, + .pfn = __phys_to_pfn(IXP4XX_EXP_CFG_BASE_PHYS), .length = IXP4XX_EXP_CFG_REGION_SIZE, .type = MT_DEVICE }, { /* PCI Registers */ .virtual = IXP4XX_PCI_CFG_BASE_VIRT, - .physical = IXP4XX_PCI_CFG_BASE_PHYS, + .pfn = __phys_to_pfn(IXP4XX_PCI_CFG_BASE_PHYS), .length = IXP4XX_PCI_CFG_REGION_SIZE, .type = MT_DEVICE }, #ifdef CONFIG_DEBUG_LL { /* Debug UART mapping */ .virtual = IXP4XX_DEBUG_UART_BASE_VIRT, - .physical = IXP4XX_DEBUG_UART_BASE_PHYS, + .pfn = __phys_to_pfn(IXP4XX_DEBUG_UART_BASE_PHYS), .length = IXP4XX_DEBUG_UART_REGION_SIZE, .type = MT_DEVICE } diff --git a/arch/arm/mach-lh7a40x/arch-kev7a400.c b/arch/arm/mach-lh7a40x/arch-kev7a400.c index cb3dcd3bd00..19f2fa2244c 100644 --- a/arch/arm/mach-lh7a40x/arch-kev7a400.c +++ b/arch/arm/mach-lh7a40x/arch-kev7a400.c @@ -26,8 +26,17 @@ /* This function calls the board specific IRQ initialization function. */ static struct map_desc kev7a400_io_desc[] __initdata = { - { IO_VIRT, IO_PHYS, IO_SIZE, MT_DEVICE }, - { CPLD_VIRT, CPLD_PHYS, CPLD_SIZE, MT_DEVICE }, + { + .virtual = IO_VIRT, + .pfn = __phys_to_pfn(IO_PHYS), + .length = IO_SIZE, + .type = MT_DEVICE + }, { + .virtual = CPLD_VIRT, + .pfn = __phys_to_pfn(CPLD_PHYS), + .length = CPLD_SIZE, + .type = MT_DEVICE + } }; void __init kev7a400_map_io(void) diff --git a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c index 6eb61a17c63..a20eabc132b 100644 --- a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c +++ b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c @@ -227,23 +227,79 @@ void __init lh7a40x_init_board_irq (void) } static struct map_desc lpd7a400_io_desc[] __initdata = { - { IO_VIRT, IO_PHYS, IO_SIZE, MT_DEVICE }, - /* Mapping added to work around chip select problems */ - { IOBARRIER_VIRT, IOBARRIER_PHYS, IOBARRIER_SIZE, MT_DEVICE }, - { CF_VIRT, CF_PHYS, CF_SIZE, MT_DEVICE }, + { + .virtual = IO_VIRT, + .pfn = __phys_to_pfn(IO_PHYS), + .length = IO_SIZE, + .type = MT_DEVICE + }, { /* Mapping added to work around chip select problems */ + .virtual = IOBARRIER_VIRT, + .pfn = __phys_to_pfn(IOBARRIER_PHYS), + .length = IOBARRIER_SIZE, + .type = MT_DEVICE + }, { + .virtual = CF_VIRT, + .pfn = __phys_to_pfn(CF_PHYS), + .length = CF_SIZE, + .type = MT_DEVICE + }, { + .virtual = CPLD02_VIRT, + .pfn = __phys_to_pfn(CPLD02_PHYS), + .length = CPLD02_SIZE, + .type = MT_DEVICE + }, { + .virtual = CPLD06_VIRT, + .pfn = __phys_to_pfn(CPLD06_PHYS), + .length = CPLD06_SIZE, + .type = MT_DEVICE + }, { + .virtual = CPLD08_VIRT, + .pfn = __phys_to_pfn(CPLD08_PHYS), + .length = CPLD08_SIZE, + .type = MT_DEVICE + }, { + .virtual = CPLD0C_VIRT, + .pfn = __phys_to_pfn(CPLD0C_PHYS), + .length = CPLD0C_SIZE, + .type = MT_DEVICE + }, { + .virtual = CPLD0E_VIRT, + .pfn = __phys_to_pfn(CPLD0E_PHYS), + .length = CPLD0E_SIZE, + .type = MT_DEVICE + }, { + .virtual = CPLD10_VIRT, + .pfn = __phys_to_pfn(CPLD10_PHYS), + .length = CPLD10_SIZE, + .type = MT_DEVICE + }, { + .virtual = CPLD12_VIRT, + .pfn = __phys_to_pfn(CPLD12_PHYS), + .length = CPLD12_SIZE, + .type = MT_DEVICE + }, { + .virtual = CPLD14_VIRT, + .pfn = __phys_to_pfn(CPLD14_PHYS), + .length = CPLD14_SIZE, + .type = MT_DEVICE + }, { + .virtual = CPLD16_VIRT, + .pfn = __phys_to_pfn(CPLD16_PHYS), + .length = CPLD16_SIZE, + .type = MT_DEVICE + }, { + .virtual = CPLD18_VIRT, + .pfn = __phys_to_pfn(CPLD18_PHYS), + .length = CPLD18_SIZE, + .type = MT_DEVICE + }, { + .virtual = CPLD1A_VIRT, + .pfn = __phys_to_pfn(CPLD1A_PHYS), + .length = CPLD1A_SIZE, + .type = MT_DEVICE + }, /* This mapping is redundant since the smc driver performs another. */ /* { CPLD00_VIRT, CPLD00_PHYS, CPLD00_SIZE, MT_DEVICE }, */ - { CPLD02_VIRT, CPLD02_PHYS, CPLD02_SIZE, MT_DEVICE }, - { CPLD06_VIRT, CPLD06_PHYS, CPLD06_SIZE, MT_DEVICE }, - { CPLD08_VIRT, CPLD08_PHYS, CPLD08_SIZE, MT_DEVICE }, - { CPLD0C_VIRT, CPLD0C_PHYS, CPLD0C_SIZE, MT_DEVICE }, - { CPLD0E_VIRT, CPLD0E_PHYS, CPLD0E_SIZE, MT_DEVICE }, - { CPLD10_VIRT, CPLD10_PHYS, CPLD10_SIZE, MT_DEVICE }, - { CPLD12_VIRT, CPLD12_PHYS, CPLD12_SIZE, MT_DEVICE }, - { CPLD14_VIRT, CPLD14_PHYS, CPLD14_SIZE, MT_DEVICE }, - { CPLD16_VIRT, CPLD16_PHYS, CPLD16_SIZE, MT_DEVICE }, - { CPLD18_VIRT, CPLD18_PHYS, CPLD18_SIZE, MT_DEVICE }, - { CPLD1A_VIRT, CPLD1A_PHYS, CPLD1A_SIZE, MT_DEVICE }, }; void __init diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index df0312b596e..fd9183ff2ed 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c @@ -103,8 +103,12 @@ static struct platform_device innovator_flash_device = { /* Only FPGA needs to be mapped here. All others are done with ioremap */ static struct map_desc innovator1510_io_desc[] __initdata = { -{ OMAP1510_FPGA_BASE, OMAP1510_FPGA_START, OMAP1510_FPGA_SIZE, - MT_DEVICE }, + { + .virtual = OMAP1510_FPGA_BASE, + .pfn = __phys_to_pfn(OMAP1510_FPGA_START), + .length = OMAP1510_FPGA_SIZE, + .type = MT_DEVICE + } }; static struct resource innovator1510_smc91x_resources[] = { diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index 107c68c8ab5..2ba26e23910 100644 --- a/arch/arm/mach-omap1/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c @@ -134,8 +134,12 @@ void omap_perseus2_init_irq(void) /* Only FPGA needs to be mapped here. All others are done with ioremap */ static struct map_desc omap_perseus2_io_desc[] __initdata = { - {H2P2_DBG_FPGA_BASE, H2P2_DBG_FPGA_START, H2P2_DBG_FPGA_SIZE, - MT_DEVICE}, + { + .virtual = H2P2_DBG_FPGA_BASE, + .pfn = __phys_to_pfn(H2P2_DBG_FPGA_START), + .length = H2P2_DBG_FPGA_SIZE, + .type = MT_DEVICE + } }; static void __init omap_perseus2_map_io(void) diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c index eb8261d7dea..79fb86535eb 100644 --- a/arch/arm/mach-omap1/io.c +++ b/arch/arm/mach-omap1/io.c @@ -26,27 +26,59 @@ extern void omap_sram_init(void); * default mapping provided here. */ static struct map_desc omap_io_desc[] __initdata = { - { IO_VIRT, IO_PHYS, IO_SIZE, MT_DEVICE }, + { + .virtual = IO_VIRT, + .pfn = __phys_to_pfn(IO_PHYS), + .length = IO_SIZE, + .type = MT_DEVICE + } }; #ifdef CONFIG_ARCH_OMAP730 static struct map_desc omap730_io_desc[] __initdata = { - { OMAP730_DSP_BASE, OMAP730_DSP_START, OMAP730_DSP_SIZE, MT_DEVICE }, - { OMAP730_DSPREG_BASE, OMAP730_DSPREG_START, OMAP730_DSPREG_SIZE, MT_DEVICE }, + { + .virtual = OMAP730_DSP_BASE, + .pfn = __phys_to_pfn(OMAP730_DSP_START), + .length = OMAP730_DSP_SIZE, + .type = MT_DEVICE + }, { + .virtual = OMAP730_DSPREG_BASE, + .pfn = __phys_to_pfn(OMAP730_DSPREG_START), + .length = OMAP730_DSPREG_SIZE, + .type = MT_DEVICE + } }; #endif #ifdef CONFIG_ARCH_OMAP1510 static struct map_desc omap1510_io_desc[] __initdata = { - { OMAP1510_DSP_BASE, OMAP1510_DSP_START, OMAP1510_DSP_SIZE, MT_DEVICE }, - { OMAP1510_DSPREG_BASE, OMAP1510_DSPREG_START, OMAP1510_DSPREG_SIZE, MT_DEVICE }, + { + .virtual = OMAP1510_DSP_BASE, + .pfn = __phys_to_pfn(OMAP1510_DSP_START), + .length = OMAP1510_DSP_SIZE, + .type = MT_DEVICE + }, { + .virtual = OMAP1510_DSPREG_BASE, + .pfn = __phys_to_pfn(OMAP1510_DSPREG_START), + .length = OMAP1510_DSPREG_SIZE, + .type = MT_DEVICE + } }; #endif #if defined(CONFIG_ARCH_OMAP16XX) static struct map_desc omap16xx_io_desc[] __initdata = { - { OMAP16XX_DSP_BASE, OMAP16XX_DSP_START, OMAP16XX_DSP_SIZE, MT_DEVICE }, - { OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_START, OMAP16XX_DSPREG_SIZE, MT_DEVICE }, + { + .virtual = OMAP16XX_DSP_BASE, + .pfn = __phys_to_pfn(OMAP16XX_DSP_START), + .length = OMAP16XX_DSP_SIZE, + .type = MT_DEVICE + }, { + .virtual = OMAP16XX_DSPREG_BASE, + .pfn = __phys_to_pfn(OMAP16XX_DSPREG_START), + .length = OMAP16XX_DSPREG_SIZE, + .type = MT_DEVICE + } }; #endif diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c index 1d7677669a7..3248bc9b949 100644 --- a/arch/arm/mach-pxa/generic.c +++ b/arch/arm/mach-pxa/generic.c @@ -34,6 +34,7 @@ #include <asm/arch/udc.h> #include <asm/arch/pxafb.h> #include <asm/arch/mmc.h> +#include <asm/arch/irda.h> #include <asm/arch/i2c.h> #include "generic.h" @@ -92,14 +93,42 @@ EXPORT_SYMBOL(pxa_set_cken); * and cache flush area. */ static struct map_desc standard_io_desc[] __initdata = { - /* virtual physical length type */ - { 0xf2000000, 0x40000000, 0x02000000, MT_DEVICE }, /* Devs */ - { 0xf4000000, 0x44000000, 0x00100000, MT_DEVICE }, /* LCD */ - { 0xf6000000, 0x48000000, 0x00100000, MT_DEVICE }, /* Mem Ctl */ - { 0xf8000000, 0x4c000000, 0x00100000, MT_DEVICE }, /* USB host */ - { 0xfa000000, 0x50000000, 0x00100000, MT_DEVICE }, /* Camera */ - { 0xfe000000, 0x58000000, 0x00100000, MT_DEVICE }, /* IMem ctl */ - { 0xff000000, 0x00000000, 0x00100000, MT_DEVICE } /* UNCACHED_PHYS_0 */ + { /* Devs */ + .virtual = 0xf2000000, + .pfn = __phys_to_pfn(0x40000000), + .length = 0x02000000, + .type = MT_DEVICE + }, { /* LCD */ + .virtual = 0xf4000000, + .pfn = __phys_to_pfn(0x44000000), + .length = 0x00100000, + .type = MT_DEVICE + }, { /* Mem Ctl */ + .virtual = 0xf6000000, + .pfn = __phys_to_pfn(0x48000000), + .length = 0x00100000, + .type = MT_DEVICE + }, { /* USB host */ + .virtual = 0xf8000000, + .pfn = __phys_to_pfn(0x4c000000), + .length = 0x00100000, + .type = MT_DEVICE + }, { /* Camera */ + .virtual = 0xfa000000, + .pfn = __phys_to_pfn(0x50000000), + .length = 0x00100000, + .type = MT_DEVICE + }, { /* IMem ctl */ + .virtual = 0xfe000000, + .pfn = __phys_to_pfn(0x58000000), + .length = 0x00100000, + .type = MT_DEVICE + }, { /* UNCACHED_PHYS_0 */ + .virtual = 0xff000000, + .pfn = __phys_to_pfn(0x00000000), + .length = 0x00100000, + .type = MT_DEVICE + } }; void __init pxa_map_io(void) @@ -225,6 +254,10 @@ static struct platform_device stuart_device = { .name = "pxa2xx-uart", .id = 2, }; +static struct platform_device hwuart_device = { + .name = "pxa2xx-uart", + .id = 3, +}; static struct resource i2c_resources[] = { { @@ -265,10 +298,26 @@ static struct resource i2s_resources[] = { static struct platform_device i2s_device = { .name = "pxa2xx-i2s", .id = -1, - .resource = i2c_resources, + .resource = i2s_resources, .num_resources = ARRAY_SIZE(i2s_resources), }; +static u64 pxaficp_dmamask = ~(u32)0; + +static struct platform_device pxaficp_device = { + .name = "pxa2xx-ir", + .id = -1, + .dev = { + .dma_mask = &pxaficp_dmamask, + .coherent_dma_mask = 0xffffffff, + }, +}; + +void __init pxa_set_ficp_info(struct pxaficp_platform_data *info) +{ + pxaficp_device.dev.platform_data = info; +} + static struct platform_device *devices[] __initdata = { &pxamci_device, &udc_device, @@ -276,13 +325,26 @@ static struct platform_device *devices[] __initdata = { &ffuart_device, &btuart_device, &stuart_device, + &pxaficp_device, &i2c_device, &i2s_device, }; static int __init pxa_init(void) { - return platform_add_devices(devices, ARRAY_SIZE(devices)); + int cpuid, ret; + + ret = platform_add_devices(devices, ARRAY_SIZE(devices)); + if (ret) + return ret; + + /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */ + cpuid = read_cpuid(CPUID_ID); + if (((cpuid >> 4) & 0xfff) == 0x2d0 || + ((cpuid >> 4) & 0xfff) == 0x290) + ret = platform_device_register(&hwuart_device); + + return ret; } subsys_initcall(pxa_init); diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c index 386e107b53c..01a83ab09ac 100644 --- a/arch/arm/mach-pxa/idp.c +++ b/arch/arm/mach-pxa/idp.c @@ -152,16 +152,17 @@ static void __init idp_init_irq(void) } static struct map_desc idp_io_desc[] __initdata = { - /* virtual physical length type */ - - { IDP_COREVOLT_VIRT, - IDP_COREVOLT_PHYS, - IDP_COREVOLT_SIZE, - MT_DEVICE }, - { IDP_CPLD_VIRT, - IDP_CPLD_PHYS, - IDP_CPLD_SIZE, - MT_DEVICE } + { + .virtual = IDP_COREVOLT_VIRT, + .pfn = __phys_to_pfn(IDP_COREVOLT_PHYS), + .length = IDP_COREVOLT_SIZE, + .type = MT_DEVICE + }, { + .virtual = IDP_CPLD_VIRT, + .pfn = __phys_to_pfn(IDP_CPLD_PHYS), + .length = IDP_CPLD_SIZE, + .type = MT_DEVICE + } }; static void __init idp_map_io(void) diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c index 1f38033921e..beccf455f79 100644 --- a/arch/arm/mach-pxa/lubbock.c +++ b/arch/arm/mach-pxa/lubbock.c @@ -35,6 +35,7 @@ #include <asm/arch/pxa-regs.h> #include <asm/arch/lubbock.h> #include <asm/arch/udc.h> +#include <asm/arch/irda.h> #include <asm/arch/pxafb.h> #include <asm/arch/mmc.h> @@ -237,16 +238,40 @@ static struct pxamci_platform_data lubbock_mci_platform_data = { .init = lubbock_mci_init, }; +static void lubbock_irda_transceiver_mode(struct device *dev, int mode) +{ + unsigned long flags; + + local_irq_save(flags); + if (mode & IR_SIRMODE) { + LUB_MISC_WR &= ~(1 << 4); + } else if (mode & IR_FIRMODE) { + LUB_MISC_WR |= 1 << 4; + } + local_irq_restore(flags); +} + +static struct pxaficp_platform_data lubbock_ficp_platform_data = { + .transceiver_cap = IR_SIRMODE | IR_FIRMODE, + .transceiver_mode = lubbock_irda_transceiver_mode, +}; + static void __init lubbock_init(void) { pxa_set_udc_info(&udc_info); set_pxa_fb_info(&sharp_lm8v31); pxa_set_mci_info(&lubbock_mci_platform_data); + pxa_set_ficp_info(&lubbock_ficp_platform_data); (void) platform_add_devices(devices, ARRAY_SIZE(devices)); } static struct map_desc lubbock_io_desc[] __initdata = { - { LUBBOCK_FPGA_VIRT, LUBBOCK_FPGA_PHYS, 0x00100000, MT_DEVICE }, /* CPLD */ + { /* CPLD */ + .virtual = LUBBOCK_FPGA_VIRT, + .pfn = __phys_to_pfn(LUBBOCK_FPGA_PHYS), + .length = 0x00100000, + .type = MT_DEVICE + } }; static void __init lubbock_map_io(void) diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index 85fdb5b1470..a48c64026e1 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c @@ -37,6 +37,7 @@ #include <asm/arch/audio.h> #include <asm/arch/pxafb.h> #include <asm/arch/mmc.h> +#include <asm/arch/irda.h> #include "generic.h" @@ -294,6 +295,29 @@ static struct pxamci_platform_data mainstone_mci_platform_data = { .exit = mainstone_mci_exit, }; +static void mainstone_irda_transceiver_mode(struct device *dev, int mode) +{ + unsigned long flags; + + local_irq_save(flags); + if (mode & IR_SIRMODE) { + MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR; + } else if (mode & IR_FIRMODE) { + MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR; + } + if (mode & IR_OFF) { + MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF; + } else { + MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL; + } + local_irq_restore(flags); +} + +static struct pxaficp_platform_data mainstone_ficp_platform_data = { + .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF, + .transceiver_mode = mainstone_irda_transceiver_mode, +}; + static void __init mainstone_init(void) { /* @@ -313,11 +337,17 @@ static void __init mainstone_init(void) set_pxa_fb_info(&toshiba_ltm035a776c); pxa_set_mci_info(&mainstone_mci_platform_data); + pxa_set_ficp_info(&mainstone_ficp_platform_data); } static struct map_desc mainstone_io_desc[] __initdata = { - { MST_FPGA_VIRT, MST_FPGA_PHYS, 0x00100000, MT_DEVICE }, /* CPLD */ + { /* CPLD */ + .virtual = MST_FPGA_VIRT, + .pfn = __phys_to_pfn(MST_FPGA_PHYS), + .length = 0x00100000, + .type = MT_DEVICE + } }; static void __init mainstone_map_io(void) diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index 7869c3b4e62..573a5758e78 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c @@ -129,7 +129,7 @@ void pxa_cpu_pm_enter(suspend_state_t state) case PM_SUSPEND_MEM: /* set resume return address */ PSPR = virt_to_phys(pxa_cpu_resume); - pxa_cpu_suspend(3); + pxa_cpu_suspend(PWRMODE_SLEEP); break; } } diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index 9a791b07118..09a5d593f04 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c @@ -157,7 +157,7 @@ void pxa_cpu_pm_enter(suspend_state_t state) case PM_SUSPEND_MEM: /* set resume return address */ PSPR = virt_to_phys(pxa_cpu_resume); - pxa_cpu_suspend(3); + pxa_cpu_suspend(PWRMODE_SLEEP); break; } } diff --git a/arch/arm/mach-pxa/sleep.S b/arch/arm/mach-pxa/sleep.S index 5786ccad938..c9862688ff3 100644 --- a/arch/arm/mach-pxa/sleep.S +++ b/arch/arm/mach-pxa/sleep.S @@ -28,7 +28,9 @@ /* * pxa_cpu_suspend() * - * Forces CPU into sleep state + * Forces CPU into sleep state. + * + * r0 = value for PWRMODE M field for desired sleep state */ ENTRY(pxa_cpu_suspend) @@ -53,6 +55,7 @@ ENTRY(pxa_cpu_suspend) mov r10, sp stmfd sp!, {r3 - r10} + mov r5, r0 @ save sleep mode @ preserve phys address of stack mov r0, sp bl sleep_phys_sp @@ -66,7 +69,7 @@ ENTRY(pxa_cpu_suspend) @ (also workaround for sighting 28071) @ prepare value for sleep mode - mov r1, #3 @ sleep mode + mov r1, r5 @ sleep mode @ prepare pointer to physical address 0 (virtual mapping in generic.c) mov r2, #UNCACHED_PHYS_0 diff --git a/arch/arm/mach-pxa/standby.S b/arch/arm/mach-pxa/standby.S index 8a3f27b7678..6f6dbbd0802 100644 --- a/arch/arm/mach-pxa/standby.S +++ b/arch/arm/mach-pxa/standby.S @@ -21,7 +21,7 @@ ENTRY(pxa_cpu_standby) ldr r0, =PSSR mov r1, #(PSSR_PH | PSSR_STS) - mov r2, #2 + mov r2, #PWRMODE_STANDBY mov r3, #UNCACHED_PHYS_0 @ Read mem context in. ldr ip, [r3] b 1f diff --git a/arch/arm/mach-rpc/riscpc.c b/arch/arm/mach-rpc/riscpc.c index e3587efec4b..5c4ac1c008a 100644 --- a/arch/arm/mach-rpc/riscpc.c +++ b/arch/arm/mach-rpc/riscpc.c @@ -61,9 +61,22 @@ static int __init parse_tag_acorn(const struct tag *tag) __tagtable(ATAG_ACORN, parse_tag_acorn); static struct map_desc rpc_io_desc[] __initdata = { - { SCREEN_BASE, SCREEN_START, 2*1048576, MT_DEVICE }, /* VRAM */ - { (u32)IO_BASE, IO_START, IO_SIZE , MT_DEVICE }, /* IO space */ - { EASI_BASE, EASI_START, EASI_SIZE, MT_DEVICE } /* EASI space */ + { /* VRAM */ + .virtual = SCREEN_BASE, + .pfn = __phys_to_pfn(SCREEN_START), + .length = 2*1048576, + .type = MT_DEVICE + }, { /* IO space */ + .virtual = (u32)IO_BASE, + .pfn = __phys_to_pfn(IO_START), + .length = IO_SIZE , + .type = MT_DEVICE + }, { /* EASI space */ + .virtual = EASI_BASE, + .pfn = __phys_to_pfn(EASI_START), + .length = EASI_SIZE, + .type = MT_DEVICE + } }; static void __init rpc_map_io(void) diff --git a/arch/arm/mach-s3c2410/cpu.h b/arch/arm/mach-s3c2410/cpu.h index 478c15c0e36..9cbe5eef492 100644 --- a/arch/arm/mach-s3c2410/cpu.h +++ b/arch/arm/mach-s3c2410/cpu.h @@ -21,7 +21,7 @@ /* todo - fix when rmk changes iodescs to use `void __iomem *` */ -#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, S3C2410_PA_##x, S3C24XX_SZ_##x, MT_DEVICE } +#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C2410_PA_##x), S3C24XX_SZ_##x, MT_DEVICE } #ifndef MHZ #define MHZ (1000*1000) diff --git a/arch/arm/mach-s3c2410/devs.c b/arch/arm/mach-s3c2410/devs.c index 0077937a7ab..08bc7d95a45 100644 --- a/arch/arm/mach-s3c2410/devs.c +++ b/arch/arm/mach-s3c2410/devs.c @@ -47,7 +47,7 @@ struct platform_device *s3c24xx_uart_devs[3]; static struct resource s3c_usb_resource[] = { [0] = { .start = S3C2410_PA_USBHOST, - .end = S3C2410_PA_USBHOST + S3C24XX_SZ_USBHOST, + .end = S3C2410_PA_USBHOST + S3C24XX_SZ_USBHOST - 1, .flags = IORESOURCE_MEM, }, [1] = { @@ -77,7 +77,7 @@ EXPORT_SYMBOL(s3c_device_usb); static struct resource s3c_lcd_resource[] = { [0] = { .start = S3C2410_PA_LCD, - .end = S3C2410_PA_LCD + S3C24XX_SZ_LCD, + .end = S3C2410_PA_LCD + S3C24XX_SZ_LCD - 1, .flags = IORESOURCE_MEM, }, [1] = { @@ -103,21 +103,25 @@ struct platform_device s3c_device_lcd = { EXPORT_SYMBOL(s3c_device_lcd); -static struct s3c2410fb_mach_info s3c2410fb_info; - -void __init set_s3c2410fb_info(struct s3c2410fb_mach_info *hard_s3c2410fb_info) +void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd) { - memcpy(&s3c2410fb_info,hard_s3c2410fb_info,sizeof(struct s3c2410fb_mach_info)); - s3c_device_lcd.dev.platform_data = &s3c2410fb_info; + struct s3c2410fb_mach_info *npd; + + npd = kmalloc(sizeof(*npd), GFP_KERNEL); + if (npd) { + memcpy(npd, pd, sizeof(*npd)); + s3c_device_lcd.dev.platform_data = npd; + } else { + printk(KERN_ERR "no memory for LCD platform data\n"); + } } -EXPORT_SYMBOL(set_s3c2410fb_info); /* NAND Controller */ static struct resource s3c_nand_resource[] = { [0] = { .start = S3C2410_PA_NAND, - .end = S3C2410_PA_NAND + S3C24XX_SZ_NAND, + .end = S3C2410_PA_NAND + S3C24XX_SZ_NAND - 1, .flags = IORESOURCE_MEM, } }; @@ -136,7 +140,7 @@ EXPORT_SYMBOL(s3c_device_nand); static struct resource s3c_usbgadget_resource[] = { [0] = { .start = S3C2410_PA_USBDEV, - .end = S3C2410_PA_USBDEV + S3C24XX_SZ_USBDEV, + .end = S3C2410_PA_USBDEV + S3C24XX_SZ_USBDEV - 1, .flags = IORESOURCE_MEM, }, [1] = { @@ -161,7 +165,7 @@ EXPORT_SYMBOL(s3c_device_usbgadget); static struct resource s3c_wdt_resource[] = { [0] = { .start = S3C2410_PA_WATCHDOG, - .end = S3C2410_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG, + .end = S3C2410_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1, .flags = IORESOURCE_MEM, }, [1] = { @@ -186,7 +190,7 @@ EXPORT_SYMBOL(s3c_device_wdt); static struct resource s3c_i2c_resource[] = { [0] = { .start = S3C2410_PA_IIC, - .end = S3C2410_PA_IIC + S3C24XX_SZ_IIC, + .end = S3C2410_PA_IIC + S3C24XX_SZ_IIC - 1, .flags = IORESOURCE_MEM, }, [1] = { @@ -211,7 +215,7 @@ EXPORT_SYMBOL(s3c_device_i2c); static struct resource s3c_iis_resource[] = { [0] = { .start = S3C2410_PA_IIS, - .end = S3C2410_PA_IIS + S3C24XX_SZ_IIS, + .end = S3C2410_PA_IIS + S3C24XX_SZ_IIS -1, .flags = IORESOURCE_MEM, } }; @@ -265,7 +269,7 @@ EXPORT_SYMBOL(s3c_device_rtc); static struct resource s3c_adc_resource[] = { [0] = { .start = S3C2410_PA_ADC, - .end = S3C2410_PA_ADC + S3C24XX_SZ_ADC, + .end = S3C2410_PA_ADC + S3C24XX_SZ_ADC - 1, .flags = IORESOURCE_MEM, }, [1] = { @@ -288,7 +292,7 @@ struct platform_device s3c_device_adc = { static struct resource s3c_sdi_resource[] = { [0] = { .start = S3C2410_PA_SDI, - .end = S3C2410_PA_SDI + S3C24XX_SZ_SDI, + .end = S3C2410_PA_SDI + S3C24XX_SZ_SDI - 1, .flags = IORESOURCE_MEM, }, [1] = { @@ -465,7 +469,7 @@ EXPORT_SYMBOL(s3c_device_timer3); static struct resource s3c_camif_resource[] = { [0] = { .start = S3C2440_PA_CAMIF, - .end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF, + .end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF - 1, .flags = IORESOURCE_MEM, }, [1] = { diff --git a/arch/arm/mach-s3c2410/gpio.c b/arch/arm/mach-s3c2410/gpio.c index 94f1776cf31..23ea3d5fa09 100644 --- a/arch/arm/mach-s3c2410/gpio.c +++ b/arch/arm/mach-s3c2410/gpio.c @@ -30,6 +30,7 @@ * 04-Oct-2004 BJD Added irq filter controls for GPIO * 05-Nov-2004 BJD EXPORT_SYMBOL() added for all code * 13-Mar-2005 BJD Updates for __iomem + * 26-Oct-2005 BJD Added generic configuration types */ @@ -58,6 +59,27 @@ void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function) mask = 3 << S3C2410_GPIO_OFFSET(pin)*2; } + switch (function) { + case S3C2410_GPIO_LEAVE: + mask = 0; + function = 0; + break; + + case S3C2410_GPIO_INPUT: + case S3C2410_GPIO_OUTPUT: + case S3C2410_GPIO_SFN2: + case S3C2410_GPIO_SFN3: + if (pin < S3C2410_GPIO_BANKB) { + function &= 1; + function <<= S3C2410_GPIO_OFFSET(pin); + } else { + function &= 3; + function <<= S3C2410_GPIO_OFFSET(pin)*2; + } + } + + /* modify the specified register wwith IRQs off */ + local_irq_save(flags); con = __raw_readl(base + 0x00); diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c index 7b51bfd0ba6..c1b5c63ec24 100644 --- a/arch/arm/mach-s3c2410/mach-bast.c +++ b/arch/arm/mach-s3c2410/mach-bast.c @@ -32,6 +32,7 @@ * 25-Jul-2005 BJD Removed ASIX static mappings * 27-Jul-2005 BJD Ensure maximum frequency of i2c bus * 20-Sep-2005 BJD Added static to non-exported items + * 26-Oct-2005 BJD Added FB platform data */ #include <linux/kernel.h> @@ -61,8 +62,10 @@ #include <asm/arch/regs-gpio.h> #include <asm/arch/regs-mem.h> #include <asm/arch/regs-lcd.h> + #include <asm/arch/nand.h> #include <asm/arch/iic.h> +#include <asm/arch/fb.h> #include <linux/mtd/mtd.h> #include <linux/mtd/nand.h> @@ -399,6 +402,38 @@ static struct s3c2410_platform_i2c bast_i2c_info = { .max_freq = 130*1000, }; + +static struct s3c2410fb_mach_info __initdata bast_lcd_info = { + .width = 640, + .height = 480, + + .xres = { + .min = 320, + .max = 1024, + .defval = 640, + }, + + .yres = { + .min = 240, + .max = 600, + .defval = 480, + }, + + .bpp = { + .min = 4, + .max = 16, + .defval = 8, + }, + + .regs = { + .lcdcon1 = 0x00000176, + .lcdcon2 = 0x1d77c7c2, + .lcdcon3 = 0x013a7f13, + .lcdcon4 = 0x00000057, + .lcdcon5 = 0x00014b02, + } +}; + /* Standard BAST devices */ static struct platform_device *bast_devices[] __initdata = { @@ -454,6 +489,10 @@ static void __init bast_map_io(void) usb_simtec_init(); } +static void __init bast_init(void) +{ + s3c24xx_fb_set_platdata(&bast_lcd_info); +} MACHINE_START(BAST, "Simtec-BAST") /* Maintainer: Ben Dooks <ben@simtec.co.uk> */ @@ -463,5 +502,6 @@ MACHINE_START(BAST, "Simtec-BAST") .boot_params = S3C2410_SDRAM_PA + 0x100, .map_io = bast_map_io, .init_irq = s3c24xx_init_irq, + .init_machine = bast_init, .timer = &s3c24xx_timer, MACHINE_END diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c index fb3cb01266e..7efeaaad236 100644 --- a/arch/arm/mach-s3c2410/mach-h1940.c +++ b/arch/arm/mach-s3c2410/mach-h1940.c @@ -25,6 +25,7 @@ * 14-Jan-2005 BJD Added clock init * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA * 20-Sep-2005 BJD Added static to non-exported items + * 26-Oct-2005 BJD Changed name of fb init call */ #include <linux/kernel.h> @@ -164,7 +165,7 @@ static void __init h1940_init_irq(void) static void __init h1940_init(void) { - set_s3c2410fb_info(&h1940_lcdcfg); + s3c24xx_fb_set_platdata(&h1940_lcdcfg); } MACHINE_START(H1940, "IPAQ-H1940") diff --git a/arch/arm/mach-s3c2410/mach-smdk2440.c b/arch/arm/mach-s3c2410/mach-smdk2440.c index 722ef46b630..6950e61b791 100644 --- a/arch/arm/mach-s3c2410/mach-smdk2440.c +++ b/arch/arm/mach-s3c2410/mach-smdk2440.c @@ -19,6 +19,7 @@ * 10-Mar-2005 LCVR Replaced S3C2410_VA by S3C24XX_VA * 14-Mar-2005 BJD void __iomem fixes * 20-Sep-2005 BJD Added static to non-exported items + * 26-Oct-2005 BJD Added framebuffer data */ #include <linux/kernel.h> @@ -41,7 +42,10 @@ //#include <asm/debug-ll.h> #include <asm/arch/regs-serial.h> #include <asm/arch/regs-gpio.h> +#include <asm/arch/regs-lcd.h> + #include <asm/arch/idle.h> +#include <asm/arch/fb.h> #include "s3c2410.h" #include "s3c2440.h" @@ -86,6 +90,70 @@ static struct s3c2410_uartcfg smdk2440_uartcfgs[] = { } }; +/* LCD driver info */ + +static struct s3c2410fb_mach_info smdk2440_lcd_cfg __initdata = { + .regs = { + + .lcdcon1 = S3C2410_LCDCON1_TFT16BPP | + S3C2410_LCDCON1_TFT | + S3C2410_LCDCON1_CLKVAL(0x04), + + .lcdcon2 = S3C2410_LCDCON2_VBPD(7) | + S3C2410_LCDCON2_LINEVAL(319) | + S3C2410_LCDCON2_VFPD(6) | + S3C2410_LCDCON2_VSPW(3), + + .lcdcon3 = S3C2410_LCDCON3_HBPD(19) | + S3C2410_LCDCON3_HOZVAL(239) | + S3C2410_LCDCON3_HFPD(7), + + .lcdcon4 = S3C2410_LCDCON4_MVAL(0) | + S3C2410_LCDCON4_HSPW(3), + + .lcdcon5 = S3C2410_LCDCON5_FRM565 | + S3C2410_LCDCON5_INVVLINE | + S3C2410_LCDCON5_INVVFRAME | + S3C2410_LCDCON5_PWREN | + S3C2410_LCDCON5_HWSWP, + }, + +#if 0 + /* currently setup by downloader */ + .gpccon = 0xaa940659, + .gpccon_mask = 0xffffffff, + .gpcup = 0x0000ffff, + .gpcup_mask = 0xffffffff, + .gpdcon = 0xaa84aaa0, + .gpdcon_mask = 0xffffffff, + .gpdup = 0x0000faff, + .gpdup_mask = 0xffffffff, +#endif + + .lpcsel = ((0xCE6) & ~7) | 1<<4, + + .width = 240, + .height = 320, + + .xres = { + .min = 240, + .max = 240, + .defval = 240, + }, + + .yres = { + .min = 320, + .max = 320, + .defval = 320, + }, + + .bpp = { + .min = 16, + .max = 16, + .defval = 16, + }, +}; + static struct platform_device *smdk2440_devices[] __initdata = { &s3c_device_usb, &s3c_device_lcd, @@ -121,6 +189,8 @@ static void __init smdk2440_machine_init(void) s3c2410_gpio_setpin(S3C2410_GPF6, 0); s3c2410_gpio_setpin(S3C2410_GPF7, 0); + s3c24xx_fb_set_platdata(&smdk2440_lcd_cfg); + s3c2410_pm_init(); } diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c index 24687f511bf..75efb5da5b6 100644 --- a/arch/arm/mach-sa1100/assabet.c +++ b/arch/arm/mach-sa1100/assabet.c @@ -388,9 +388,17 @@ static struct sa1100_port_fns assabet_port_fns __initdata = { }; static struct map_desc assabet_io_desc[] __initdata = { - /* virtual physical length type */ - { 0xf1000000, 0x12000000, 0x00100000, MT_DEVICE }, /* Board Control Register */ - { 0xf2800000, 0x4b800000, 0x00800000, MT_DEVICE } /* MQ200 */ + { /* Board Control Register */ + .virtual = 0xf1000000, + .pfn = __phys_to_pfn(0x12000000), + .length = 0x00100000, + .type = MT_DEVICE + }, { /* MQ200 */ + .virtual = 0xf2800000, + .pfn = __phys_to_pfn(0x4b800000), + .length = 0x00800000, + .type = MT_DEVICE + } }; static void __init assabet_map_io(void) diff --git a/arch/arm/mach-sa1100/badge4.c b/arch/arm/mach-sa1100/badge4.c index b6169cb0919..c92cebff7f8 100644 --- a/arch/arm/mach-sa1100/badge4.c +++ b/arch/arm/mach-sa1100/badge4.c @@ -254,10 +254,22 @@ EXPORT_SYMBOL(badge4_set_5V); static struct map_desc badge4_io_desc[] __initdata = { - /* virtual physical length type */ - {0xf1000000, 0x08000000, 0x00100000, MT_DEVICE },/* SRAM bank 1 */ - {0xf2000000, 0x10000000, 0x00100000, MT_DEVICE },/* SRAM bank 2 */ - {0xf4000000, 0x48000000, 0x00100000, MT_DEVICE } /* SA-1111 */ + { /* SRAM bank 1 */ + .virtual = 0xf1000000, + .pfn = __phys_to_pfn(0x08000000), + .length = 0x00100000, + .type = MT_DEVICE + }, { /* SRAM bank 2 */ + .virtual = 0xf2000000, + .pfn = __phys_to_pfn(0x10000000), + .length = 0x00100000, + .type = MT_DEVICE + }, { /* SA-1111 */ + .virtual = 0xf4000000, + .pfn = __phys_to_pfn(0x48000000), + .length = 0x00100000, + .type = MT_DEVICE + } }; static void diff --git a/arch/arm/mach-sa1100/cerf.c b/arch/arm/mach-sa1100/cerf.c index 9484be7dc67..23cb7488527 100644 --- a/arch/arm/mach-sa1100/cerf.c +++ b/arch/arm/mach-sa1100/cerf.c @@ -100,8 +100,12 @@ static void __init cerf_init_irq(void) } static struct map_desc cerf_io_desc[] __initdata = { - /* virtual physical length type */ - { 0xf0000000, 0x08000000, 0x00100000, MT_DEVICE } /* Crystal Ethernet Chip */ + { /* Crystal Ethernet Chip */ + .virtual = 0xf0000000, + .pfn = __phys_to_pfn(0x08000000), + .length = 0x00100000, + .type = MT_DEVICE + } }; static void __init cerf_map_io(void) diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c index 6ecab7e2c23..7fd6e29c36b 100644 --- a/arch/arm/mach-sa1100/collie.c +++ b/arch/arm/mach-sa1100/collie.c @@ -171,9 +171,17 @@ static void __init collie_init(void) } static struct map_desc collie_io_desc[] __initdata = { - /* virtual physical length type */ - {0xe8000000, 0x00000000, 0x02000000, MT_DEVICE}, /* 32M main flash (cs0) */ - {0xea000000, 0x08000000, 0x02000000, MT_DEVICE}, /* 32M boot flash (cs1) */ + { /* 32M main flash (cs0) */ + .virtual = 0xe8000000, + .pfn = __phys_to_pfn(0x00000000), + .length = 0x02000000, + .type = MT_DEVICE + }, { /* 32M boot flash (cs1) */ + .virtual = 0xea000000, + .pfn = __phys_to_pfn(0x08000000), + .length = 0x02000000, + .type = MT_DEVICE + } }; static void __init collie_map_io(void) diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c index 3f1e358455e..93619497779 100644 --- a/arch/arm/mach-sa1100/generic.c +++ b/arch/arm/mach-sa1100/generic.c @@ -369,11 +369,27 @@ EXPORT_SYMBOL(sa1100fb_lcd_power); */ static struct map_desc standard_io_desc[] __initdata = { - /* virtual physical length type */ - { 0xf8000000, 0x80000000, 0x00100000, MT_DEVICE }, /* PCM */ - { 0xfa000000, 0x90000000, 0x00100000, MT_DEVICE }, /* SCM */ - { 0xfc000000, 0xa0000000, 0x00100000, MT_DEVICE }, /* MER */ - { 0xfe000000, 0xb0000000, 0x00200000, MT_DEVICE } /* LCD + DMA */ + { /* PCM */ + .virtual = 0xf8000000, + .pfn = __phys_to_pfn(0x80000000), + .length = 0x00100000, + .type = MT_DEVICE + }, { /* SCM */ + .virtual = 0xfa000000, + .pfn = __phys_to_pfn(0x90000000), + .length = 0x00100000, + .type = MT_DEVICE + }, { /* MER */ + .virtual = 0xfc000000, + .pfn = __phys_to_pfn(0xa0000000), + .length = 0x00100000, + .type = MT_DEVICE + }, { /* LCD + DMA */ + .virtual = 0xfe000000, + .pfn = __phys_to_pfn(0xb0000000), + .length = 0x00200000, + .type = MT_DEVICE + }, }; void __init sa1100_map_io(void) diff --git a/arch/arm/mach-sa1100/h3600.c b/arch/arm/mach-sa1100/h3600.c index e7aa2681ca6..e8352b7f74b 100644 --- a/arch/arm/mach-sa1100/h3600.c +++ b/arch/arm/mach-sa1100/h3600.c @@ -223,10 +223,22 @@ static void h3xxx_lcd_power(int enable) } static struct map_desc h3600_io_desc[] __initdata = { - /* virtual physical length type */ - { H3600_BANK_2_VIRT, SA1100_CS2_PHYS, 0x02800000, MT_DEVICE }, /* static memory bank 2 CS#2 */ - { H3600_BANK_4_VIRT, SA1100_CS4_PHYS, 0x00800000, MT_DEVICE }, /* static memory bank 4 CS#4 */ - { H3600_EGPIO_VIRT, H3600_EGPIO_PHYS, 0x01000000, MT_DEVICE }, /* EGPIO 0 CS#5 */ + { /* static memory bank 2 CS#2 */ + .virtual = H3600_BANK_2_VIRT, + .pfn = __phys_to_pfn(SA1100_CS2_PHYS), + .length = 0x02800000, + .type = MT_DEVICE + }, { /* static memory bank 4 CS#4 */ + .virtual = H3600_BANK_4_VIRT, + .pfn = __phys_to_pfn(SA1100_CS4_PHYS), + .length = 0x00800000, + .type = MT_DEVICE + }, { /* EGPIO 0 CS#5 */ + .virtual = H3600_EGPIO_VIRT, + .pfn = __phys_to_pfn(H3600_EGPIO_PHYS), + .length = 0x01000000, + .type = MT_DEVICE + } }; /* diff --git a/arch/arm/mach-sa1100/hackkit.c b/arch/arm/mach-sa1100/hackkit.c index 502d65cfe65..c922e043c42 100644 --- a/arch/arm/mach-sa1100/hackkit.c +++ b/arch/arm/mach-sa1100/hackkit.c @@ -57,8 +57,12 @@ static void hackkit_uart_pm(struct uart_port *port, u_int state, u_int oldstate) */ static struct map_desc hackkit_io_desc[] __initdata = { - /* virtual physical length type */ - { 0xe8000000, 0x00000000, 0x01000000, MT_DEVICE } /* Flash bank 0 */ + { /* Flash bank 0 */ + .virtual = 0xe8000000, + .pfn = __phys_to_pfn(0x00000000), + .length = 0x01000000, + .type = MT_DEVICE + }, }; static struct sa1100_port_fns hackkit_port_fns __initdata = { diff --git a/arch/arm/mach-sa1100/jornada720.c b/arch/arm/mach-sa1100/jornada720.c index 2f497112c96..9c363bfcf31 100644 --- a/arch/arm/mach-sa1100/jornada720.c +++ b/arch/arm/mach-sa1100/jornada720.c @@ -81,10 +81,22 @@ static int __init jornada720_init(void) arch_initcall(jornada720_init); static struct map_desc jornada720_io_desc[] __initdata = { - /* virtual physical length type */ - { 0xf0000000, 0x48000000, 0x00100000, MT_DEVICE }, /* Epson registers */ - { 0xf1000000, 0x48200000, 0x00100000, MT_DEVICE }, /* Epson frame buffer */ - { 0xf4000000, 0x40000000, 0x00100000, MT_DEVICE } /* SA-1111 */ + { /* Epson registers */ + .virtual = 0xf0000000, + .pfn = __phys_to_pfn(0x48000000), + .length = 0x00100000, + .type = MT_DEVICE + }, { /* Epson frame buffer */ + .virtual = 0xf1000000, + .pfn = __phys_to_pfn(0x48200000), + .length = 0x00100000, + .type = MT_DEVICE + }, { /* SA-1111 */ + .virtual = 0xf4000000, + .pfn = __phys_to_pfn(0x40000000), + .length = 0x00100000, + .type = MT_DEVICE + } }; static void __init jornada720_map_io(void) diff --git a/arch/arm/mach-sa1100/lart.c b/arch/arm/mach-sa1100/lart.c index ed6744d480a..8c9e3dd5294 100644 --- a/arch/arm/mach-sa1100/lart.c +++ b/arch/arm/mach-sa1100/lart.c @@ -31,9 +31,17 @@ static void __init lart_init(void) } static struct map_desc lart_io_desc[] __initdata = { - /* virtual physical length type */ - { 0xe8000000, 0x00000000, 0x00400000, MT_DEVICE }, /* main flash memory */ - { 0xec000000, 0x08000000, 0x00400000, MT_DEVICE } /* main flash, alternative location */ + { /* main flash memory */ + .virtual = 0xe8000000, + .pfn = __phys_to_pfn(0x00000000), + .length = 0x00400000, + .type = MT_DEVICE + }, { /* main flash, alternative location */ + .virtual = 0xec000000, + .pfn = __phys_to_pfn(0x08000000), + .length = 0x00400000, + .type = MT_DEVICE + } }; static void __init lart_map_io(void) diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c index fc061641b7b..0c5eff3bdc0 100644 --- a/arch/arm/mach-sa1100/neponset.c +++ b/arch/arm/mach-sa1100/neponset.c @@ -331,9 +331,17 @@ static int __init neponset_init(void) subsys_initcall(neponset_init); static struct map_desc neponset_io_desc[] __initdata = { - /* virtual physical length type */ - { 0xf3000000, 0x10000000, SZ_1M, MT_DEVICE }, /* System Registers */ - { 0xf4000000, 0x40000000, SZ_1M, MT_DEVICE } /* SA-1111 */ + { /* System Registers */ + .virtual = 0xf3000000, + .pfn = __phys_to_pfn(0x10000000), + .length = SZ_1M, + .type = MT_DEVICE + }, { /* SA-1111 */ + .virtual = 0xf4000000, + .pfn = __phys_to_pfn(0x40000000), + .length = SZ_1M, + .type = MT_DEVICE + } }; void __init neponset_map_io(void) diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c index 07f6d5fd7bb..cfb6658e5cd 100644 --- a/arch/arm/mach-sa1100/simpad.c +++ b/arch/arm/mach-sa1100/simpad.c @@ -60,11 +60,17 @@ EXPORT_SYMBOL(set_cs3_bit); EXPORT_SYMBOL(clear_cs3_bit); static struct map_desc simpad_io_desc[] __initdata = { - /* virtual physical length type */ - /* MQ200 */ - { 0xf2800000, 0x4b800000, 0x00800000, MT_DEVICE }, - /* Paules CS3, write only */ - { 0xf1000000, 0x18000000, 0x00100000, MT_DEVICE }, + { /* MQ200 */ + .virtual = 0xf2800000, + .pfn = __phys_to_pfn(0x4b800000), + .length = 0x00800000, + .type = MT_DEVICE + }, { /* Paules CS3, write only */ + .virtual = 0xf1000000, + .pfn = __phys_to_pfn(0x18000000), + .length = 0x00100000, + .type = MT_DEVICE + }, }; diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c index 946c0d11c73..2d428b6dbb5 100644 --- a/arch/arm/mach-shark/core.c +++ b/arch/arm/mach-shark/core.c @@ -62,7 +62,12 @@ arch_initcall(shark_init); extern void shark_init_irq(void); static struct map_desc shark_io_desc[] __initdata = { - { IO_BASE , IO_START , IO_SIZE , MT_DEVICE } + { + .virtual = IO_BASE, + .pfn = __phys_to_pfn(IO_START), + .length = IO_SIZE, + .type = MT_DEVICE + } }; static void __init shark_map_io(void) diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index a30e0451df7..7e4bdd07f4a 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c @@ -186,25 +186,82 @@ void __init versatile_init_irq(void) } static struct map_desc versatile_io_desc[] __initdata = { - { IO_ADDRESS(VERSATILE_SYS_BASE), VERSATILE_SYS_BASE, SZ_4K, MT_DEVICE }, - { IO_ADDRESS(VERSATILE_SIC_BASE), VERSATILE_SIC_BASE, SZ_4K, MT_DEVICE }, - { IO_ADDRESS(VERSATILE_VIC_BASE), VERSATILE_VIC_BASE, SZ_4K, MT_DEVICE }, - { IO_ADDRESS(VERSATILE_SCTL_BASE), VERSATILE_SCTL_BASE, SZ_4K * 9, MT_DEVICE }, + { + .virtual = IO_ADDRESS(VERSATILE_SYS_BASE), + .pfn = __phys_to_pfn(VERSATILE_SYS_BASE), + .length = SZ_4K, + .type = MT_DEVICE + }, { + .virtual = IO_ADDRESS(VERSATILE_SIC_BASE), + .pfn = __phys_to_pfn(VERSATILE_SIC_BASE), + .length = SZ_4K, + .type = MT_DEVICE + }, { + .virtual = IO_ADDRESS(VERSATILE_VIC_BASE), + .pfn = __phys_to_pfn(VERSATILE_VIC_BASE), + .length = SZ_4K, + .type = MT_DEVICE + }, { + .virtual = IO_ADDRESS(VERSATILE_SCTL_BASE), + .pfn = __phys_to_pfn(VERSATILE_SCTL_BASE), + .length = SZ_4K * 9, + .type = MT_DEVICE + }, #ifdef CONFIG_MACH_VERSATILE_AB - { IO_ADDRESS(VERSATILE_GPIO0_BASE), VERSATILE_GPIO0_BASE, SZ_4K, MT_DEVICE }, - { IO_ADDRESS(VERSATILE_IB2_BASE), VERSATILE_IB2_BASE, SZ_64M, MT_DEVICE }, + { + .virtual = IO_ADDRESS(VERSATILE_GPIO0_BASE), + .pfn = __phys_to_pfn(VERSATILE_GPIO0_BASE), + .length = SZ_4K, + .type = MT_DEVICE + }, { + .virtual = IO_ADDRESS(VERSATILE_IB2_BASE), + .pfn = __phys_to_pfn(VERSATILE_IB2_BASE), + .length = SZ_64M, + .type = MT_DEVICE + }, #endif #ifdef CONFIG_DEBUG_LL - { IO_ADDRESS(VERSATILE_UART0_BASE), VERSATILE_UART0_BASE, SZ_4K, MT_DEVICE }, + { + .virtual = IO_ADDRESS(VERSATILE_UART0_BASE), + .pfn = __phys_to_pfn(VERSATILE_UART0_BASE), + .length = SZ_4K, + .type = MT_DEVICE + }, #endif #ifdef CONFIG_PCI - { IO_ADDRESS(VERSATILE_PCI_CORE_BASE), VERSATILE_PCI_CORE_BASE, SZ_4K, MT_DEVICE }, - { VERSATILE_PCI_VIRT_BASE, VERSATILE_PCI_BASE, VERSATILE_PCI_BASE_SIZE, MT_DEVICE }, - { VERSATILE_PCI_CFG_VIRT_BASE, VERSATILE_PCI_CFG_BASE, VERSATILE_PCI_CFG_BASE_SIZE, MT_DEVICE }, + { + .virtual = IO_ADDRESS(VERSATILE_PCI_CORE_BASE), + .pfn = __phys_to_pfn(VERSATILE_PCI_CORE_BASE), + .length = SZ_4K, + .type = MT_DEVICE + }, { + .virtual = VERSATILE_PCI_VIRT_BASE, + .pfn = __phys_to_pfn(VERSATILE_PCI_BASE), + .length = VERSATILE_PCI_BASE_SIZE, + .type = MT_DEVICE + }, { + .virtual = VERSATILE_PCI_CFG_VIRT_BASE, + .pfn = __phys_to_pfn(VERSATILE_PCI_CFG_BASE), + .length = VERSATILE_PCI_CFG_BASE_SIZE, + .type = MT_DEVICE + }, #if 0 - { VERSATILE_PCI_VIRT_MEM_BASE0, VERSATILE_PCI_MEM_BASE0, SZ_16M, MT_DEVICE }, - { VERSATILE_PCI_VIRT_MEM_BASE1, VERSATILE_PCI_MEM_BASE1, SZ_16M, MT_DEVICE }, - { VERSATILE_PCI_VIRT_MEM_BASE2, VERSATILE_PCI_MEM_BASE2, SZ_16M, MT_DEVICE }, + { + .virtual = VERSATILE_PCI_VIRT_MEM_BASE0, + .pfn = __phys_to_pfn(VERSATILE_PCI_MEM_BASE0), + .length = SZ_16M, + .type = MT_DEVICE + }, { + .virtual = VERSATILE_PCI_VIRT_MEM_BASE1, + .pfn = __phys_to_pfn(VERSATILE_PCI_MEM_BASE1), + .length = SZ_16M, + .type = MT_DEVICE + }, { + .virtual = VERSATILE_PCI_VIRT_MEM_BASE2, + .pfn = __phys_to_pfn(VERSATILE_PCI_MEM_BASE2), + .length = SZ_16M, + .type = MT_DEVICE + }, #endif #endif }; diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index edffa47a4b2..f4496813615 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c @@ -1,7 +1,7 @@ /* * linux/arch/arm/mm/init.c * - * Copyright (C) 1995-2002 Russell King + * Copyright (C) 1995-2005 Russell King * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -86,14 +86,19 @@ void show_mem(void) printk("%d pages swap cached\n", cached); } -struct node_info { - unsigned int start; - unsigned int end; - int bootmap_pages; -}; +static inline pmd_t *pmd_off(pgd_t *pgd, unsigned long virt) +{ + return pmd_offset(pgd, virt); +} + +static inline pmd_t *pmd_off_k(unsigned long virt) +{ + return pmd_off(pgd_offset_k(virt), virt); +} -#define O_PFN_DOWN(x) ((x) >> PAGE_SHIFT) -#define O_PFN_UP(x) (PAGE_ALIGN(x) >> PAGE_SHIFT) +#define for_each_nodebank(iter,mi,no) \ + for (iter = 0; iter < mi->nr_banks; iter++) \ + if (mi->bank[iter].node == no) /* * FIXME: We really want to avoid allocating the bootmap bitmap @@ -106,15 +111,12 @@ find_bootmap_pfn(int node, struct meminfo *mi, unsigned int bootmap_pages) { unsigned int start_pfn, bank, bootmap_pfn; - start_pfn = O_PFN_UP(__pa(&_end)); + start_pfn = PAGE_ALIGN(__pa(&_end)) >> PAGE_SHIFT; bootmap_pfn = 0; - for (bank = 0; bank < mi->nr_banks; bank ++) { + for_each_nodebank(bank, mi, node) { unsigned int start, end; - if (mi->bank[bank].node != node) - continue; - start = mi->bank[bank].start >> PAGE_SHIFT; end = (mi->bank[bank].size + mi->bank[bank].start) >> PAGE_SHIFT; @@ -140,92 +142,6 @@ find_bootmap_pfn(int node, struct meminfo *mi, unsigned int bootmap_pages) return bootmap_pfn; } -/* - * Scan the memory info structure and pull out: - * - the end of memory - * - the number of nodes - * - the pfn range of each node - * - the number of bootmem bitmap pages - */ -static unsigned int __init -find_memend_and_nodes(struct meminfo *mi, struct node_info *np) -{ - unsigned int i, bootmem_pages = 0, memend_pfn = 0; - - for (i = 0; i < MAX_NUMNODES; i++) { - np[i].start = -1U; - np[i].end = 0; - np[i].bootmap_pages = 0; - } - - for (i = 0; i < mi->nr_banks; i++) { - unsigned long start, end; - int node; - - if (mi->bank[i].size == 0) { - /* - * Mark this bank with an invalid node number - */ - mi->bank[i].node = -1; - continue; - } - - node = mi->bank[i].node; - - /* - * Make sure we haven't exceeded the maximum number of nodes - * that we have in this configuration. If we have, we're in - * trouble. (maybe we ought to limit, instead of bugging?) - */ - if (node >= MAX_NUMNODES) - BUG(); - node_set_online(node); - - /* - * Get the start and end pfns for this bank - */ - start = mi->bank[i].start >> PAGE_SHIFT; - end = (mi->bank[i].start + mi->bank[i].size) >> PAGE_SHIFT; - - if (np[node].start > start) - np[node].start = start; - - if (np[node].end < end) - np[node].end = end; - - if (memend_pfn < end) - memend_pfn = end; - } - - /* - * Calculate the number of pages we require to - * store the bootmem bitmaps. - */ - for_each_online_node(i) { - if (np[i].end == 0) - continue; - - np[i].bootmap_pages = bootmem_bootmap_pages(np[i].end - - np[i].start); - bootmem_pages += np[i].bootmap_pages; - } - - high_memory = __va(memend_pfn << PAGE_SHIFT); - - /* - * This doesn't seem to be used by the Linux memory - * manager any more. If we can get rid of it, we - * also get rid of some of the stuff above as well. - * - * Note: max_low_pfn and max_pfn reflect the number - * of _pages_ in the system, not the maximum PFN. - */ - max_low_pfn = memend_pfn - O_PFN_DOWN(PHYS_OFFSET); - max_pfn = memend_pfn - O_PFN_DOWN(PHYS_OFFSET); - - return bootmem_pages; -} - static int __init check_initrd(struct meminfo *mi) { int initrd_node = -2; @@ -266,9 +182,8 @@ static int __init check_initrd(struct meminfo *mi) /* * Reserve the various regions of node 0 */ -static __init void reserve_node_zero(unsigned int bootmap_pfn, unsigned int bootmap_pages) +static __init void reserve_node_zero(pg_data_t *pgdat) { - pg_data_t *pgdat = NODE_DATA(0); unsigned long res_size = 0; /* @@ -289,13 +204,6 @@ static __init void reserve_node_zero(unsigned int bootmap_pfn, unsigned int boot PTRS_PER_PGD * sizeof(pgd_t)); /* - * And don't forget to reserve the allocator bitmap, - * which will be freed later. - */ - reserve_bootmem_node(pgdat, bootmap_pfn << PAGE_SHIFT, - bootmap_pages << PAGE_SHIFT); - - /* * Hmm... This should go elsewhere, but we really really need to * stop things allocating the low memory; ideally we need a better * implementation of GFP_DMA which does not assume that DMA-able @@ -324,183 +232,276 @@ static __init void reserve_node_zero(unsigned int bootmap_pfn, unsigned int boot reserve_bootmem_node(pgdat, PHYS_OFFSET, res_size); } -/* - * Register all available RAM in this node with the bootmem allocator. - */ -static inline void free_bootmem_node_bank(int node, struct meminfo *mi) +void __init build_mem_type_table(void); +void __init create_mapping(struct map_desc *md); + +static unsigned long __init +bootmem_init_node(int node, int initrd_node, struct meminfo *mi) { - pg_data_t *pgdat = NODE_DATA(node); - int bank; + unsigned long zone_size[MAX_NR_ZONES], zhole_size[MAX_NR_ZONES]; + unsigned long start_pfn, end_pfn, boot_pfn; + unsigned int boot_pages; + pg_data_t *pgdat; + int i; - for (bank = 0; bank < mi->nr_banks; bank++) - if (mi->bank[bank].node == node) - free_bootmem_node(pgdat, mi->bank[bank].start, - mi->bank[bank].size); -} + start_pfn = -1UL; + end_pfn = 0; -/* - * Initialise the bootmem allocator for all nodes. This is called - * early during the architecture specific initialisation. - */ -static void __init bootmem_init(struct meminfo *mi) -{ - struct node_info node_info[MAX_NUMNODES], *np = node_info; - unsigned int bootmap_pages, bootmap_pfn, map_pg; - int node, initrd_node; + /* + * Calculate the pfn range, and map the memory banks for this node. + */ + for_each_nodebank(i, mi, node) { + unsigned long start, end; + struct map_desc map; - bootmap_pages = find_memend_and_nodes(mi, np); - bootmap_pfn = find_bootmap_pfn(0, mi, bootmap_pages); - initrd_node = check_initrd(mi); + start = mi->bank[i].start >> PAGE_SHIFT; + end = (mi->bank[i].start + mi->bank[i].size) >> PAGE_SHIFT; - map_pg = bootmap_pfn; + if (start_pfn > start) + start_pfn = start; + if (end_pfn < end) + end_pfn = end; + + map.pfn = __phys_to_pfn(mi->bank[i].start); + map.virtual = __phys_to_virt(mi->bank[i].start); + map.length = mi->bank[i].size; + map.type = MT_MEMORY; + + create_mapping(&map); + } /* - * Initialise the bootmem nodes. - * - * What we really want to do is: - * - * unmap_all_regions_except_kernel(); - * for_each_node_in_reverse_order(node) { - * map_node(node); - * allocate_bootmem_map(node); - * init_bootmem_node(node); - * free_bootmem_node(node); - * } - * - * but this is a 2.5-type change. For now, we just set - * the nodes up in reverse order. - * - * (we could also do with rolling bootmem_init and paging_init - * into one generic "memory_init" type function). + * If there is no memory in this node, ignore it. */ - np += num_online_nodes() - 1; - for (node = num_online_nodes() - 1; node >= 0; node--, np--) { - /* - * If there are no pages in this node, ignore it. - * Note that node 0 must always have some pages. - */ - if (np->end == 0 || !node_online(node)) { - if (node == 0) - BUG(); - continue; - } + if (end_pfn == 0) + return end_pfn; - /* - * Initialise the bootmem allocator. - */ - init_bootmem_node(NODE_DATA(node), map_pg, np->start, np->end); - free_bootmem_node_bank(node, mi); - map_pg += np->bootmap_pages; + /* + * Allocate the bootmem bitmap page. + */ + boot_pages = bootmem_bootmap_pages(end_pfn - start_pfn); + boot_pfn = find_bootmap_pfn(node, mi, boot_pages); - /* - * If this is node 0, we need to reserve some areas ASAP - - * we may use bootmem on node 0 to setup the other nodes. - */ - if (node == 0) - reserve_node_zero(bootmap_pfn, bootmap_pages); - } + /* + * Initialise the bootmem allocator for this node, handing the + * memory banks over to bootmem. + */ + node_set_online(node); + pgdat = NODE_DATA(node); + init_bootmem_node(pgdat, boot_pfn, start_pfn, end_pfn); + for_each_nodebank(i, mi, node) + free_bootmem_node(pgdat, mi->bank[i].start, mi->bank[i].size); + + /* + * Reserve the bootmem bitmap for this node. + */ + reserve_bootmem_node(pgdat, boot_pfn << PAGE_SHIFT, + boot_pages << PAGE_SHIFT); #ifdef CONFIG_BLK_DEV_INITRD - if (phys_initrd_size && initrd_node >= 0) { - reserve_bootmem_node(NODE_DATA(initrd_node), phys_initrd_start, + /* + * If the initrd is in this node, reserve its memory. + */ + if (node == initrd_node) { + reserve_bootmem_node(pgdat, phys_initrd_start, phys_initrd_size); initrd_start = __phys_to_virt(phys_initrd_start); initrd_end = initrd_start + phys_initrd_size; } #endif - BUG_ON(map_pg != bootmap_pfn + bootmap_pages); + /* + * Finally, reserve any node zero regions. + */ + if (node == 0) + reserve_node_zero(pgdat); + + /* + * initialise the zones within this node. + */ + memset(zone_size, 0, sizeof(zone_size)); + memset(zhole_size, 0, sizeof(zhole_size)); + + /* + * The size of this node has already been determined. If we need + * to do anything fancy with the allocation of this memory to the + * zones, now is the time to do it. + */ + zone_size[0] = end_pfn - start_pfn; + + /* + * For each bank in this node, calculate the size of the holes. + * holes = node_size - sum(bank_sizes_in_node) + */ + zhole_size[0] = zone_size[0]; + for_each_nodebank(i, mi, node) + zhole_size[0] -= mi->bank[i].size >> PAGE_SHIFT; + + /* + * Adjust the sizes according to any special requirements for + * this machine type. + */ + arch_adjust_zones(node, zone_size, zhole_size); + + free_area_init_node(node, pgdat, zone_size, start_pfn, zhole_size); + + return end_pfn; } -/* - * paging_init() sets up the page tables, initialises the zone memory - * maps, and sets up the zero page, bad page and bad page tables. - */ -void __init paging_init(struct meminfo *mi, struct machine_desc *mdesc) +static void __init bootmem_init(struct meminfo *mi) { - void *zero_page; - int node; + unsigned long addr, memend_pfn = 0; + int node, initrd_node, i; - bootmem_init(mi); + /* + * Invalidate the node number for empty or invalid memory banks + */ + for (i = 0; i < mi->nr_banks; i++) + if (mi->bank[i].size == 0 || mi->bank[i].node >= MAX_NUMNODES) + mi->bank[i].node = -1; memcpy(&meminfo, mi, sizeof(meminfo)); +#ifdef CONFIG_XIP_KERNEL +#error needs fixing + p->pfn = __phys_to_pfn(CONFIG_XIP_PHYS_ADDR & PMD_MASK); + p->virtual = (unsigned long)&_stext & PMD_MASK; + p->length = ((unsigned long)&_etext - p->virtual + ~PMD_MASK) & PMD_MASK; + p->type = MT_ROM; + p ++; +#endif + /* - * allocate the zero page. Note that we count on this going ok. + * Clear out all the mappings below the kernel image. + * FIXME: what about XIP? */ - zero_page = alloc_bootmem_low_pages(PAGE_SIZE); + for (addr = 0; addr < PAGE_OFFSET; addr += PGDIR_SIZE) + pmd_clear(pmd_off_k(addr)); /* - * initialise the page tables. + * Clear out all the kernel space mappings, except for the first + * memory bank, up to the end of the vmalloc region. */ - memtable_init(mi); - if (mdesc->map_io) - mdesc->map_io(); - local_flush_tlb_all(); + for (addr = __phys_to_virt(mi->bank[0].start + mi->bank[0].size); + addr < VMALLOC_END; addr += PGDIR_SIZE) + pmd_clear(pmd_off_k(addr)); /* - * initialise the zones within each node + * Locate which node contains the ramdisk image, if any. */ - for_each_online_node(node) { - unsigned long zone_size[MAX_NR_ZONES]; - unsigned long zhole_size[MAX_NR_ZONES]; - struct bootmem_data *bdata; - pg_data_t *pgdat; - int i; + initrd_node = check_initrd(mi); - /* - * Initialise the zone size information. - */ - for (i = 0; i < MAX_NR_ZONES; i++) { - zone_size[i] = 0; - zhole_size[i] = 0; - } + /* + * Run through each node initialising the bootmem allocator. + */ + for_each_node(node) { + unsigned long end_pfn; - pgdat = NODE_DATA(node); - bdata = pgdat->bdata; + end_pfn = bootmem_init_node(node, initrd_node, mi); /* - * The size of this node has already been determined. - * If we need to do anything fancy with the allocation - * of this memory to the zones, now is the time to do - * it. + * Remember the highest memory PFN. */ - zone_size[0] = bdata->node_low_pfn - - (bdata->node_boot_start >> PAGE_SHIFT); + if (end_pfn > memend_pfn) + memend_pfn = end_pfn; + } - /* - * If this zone has zero size, skip it. - */ - if (!zone_size[0]) - continue; + high_memory = __va(memend_pfn << PAGE_SHIFT); - /* - * For each bank in this node, calculate the size of the - * holes. holes = node_size - sum(bank_sizes_in_node) - */ - zhole_size[0] = zone_size[0]; - for (i = 0; i < mi->nr_banks; i++) { - if (mi->bank[i].node != node) - continue; + /* + * This doesn't seem to be used by the Linux memory manager any + * more, but is used by ll_rw_block. If we can get rid of it, we + * also get rid of some of the stuff above as well. + * + * Note: max_low_pfn and max_pfn reflect the number of _pages_ in + * the system, not the maximum PFN. + */ + max_pfn = max_low_pfn = memend_pfn - PHYS_PFN_OFFSET; +} - zhole_size[0] -= mi->bank[i].size >> PAGE_SHIFT; - } +/* + * Set up device the mappings. Since we clear out the page tables for all + * mappings above VMALLOC_END, we will remove any debug device mappings. + * This means you have to be careful how you debug this function, or any + * called function. (Do it by code inspection!) + */ +static void __init devicemaps_init(struct machine_desc *mdesc) +{ + struct map_desc map; + unsigned long addr; + void *vectors; - /* - * Adjust the sizes according to any special - * requirements for this machine type. - */ - arch_adjust_zones(node, zone_size, zhole_size); + for (addr = VMALLOC_END; addr; addr += PGDIR_SIZE) + pmd_clear(pmd_off_k(addr)); - free_area_init_node(node, pgdat, zone_size, - bdata->node_boot_start >> PAGE_SHIFT, zhole_size); + /* + * Map the cache flushing regions. + */ +#ifdef FLUSH_BASE + map.pfn = __phys_to_pfn(FLUSH_BASE_PHYS); + map.virtual = FLUSH_BASE; + map.length = PGDIR_SIZE; + map.type = MT_CACHECLEAN; + create_mapping(&map); +#endif +#ifdef FLUSH_BASE_MINICACHE + map.pfn = __phys_to_pfn(FLUSH_BASE_PHYS + PGDIR_SIZE); + map.virtual = FLUSH_BASE_MINICACHE; + map.length = PGDIR_SIZE; + map.type = MT_MINICLEAN; + create_mapping(&map); +#endif + + flush_cache_all(); + local_flush_tlb_all(); + + vectors = alloc_bootmem_low_pages(PAGE_SIZE); + BUG_ON(!vectors); + + /* + * Create a mapping for the machine vectors at the high-vectors + * location (0xffff0000). If we aren't using high-vectors, also + * create a mapping at the low-vectors virtual address. + */ + map.pfn = __phys_to_pfn(virt_to_phys(vectors)); + map.virtual = 0xffff0000; + map.length = PAGE_SIZE; + map.type = MT_HIGH_VECTORS; + create_mapping(&map); + + if (!vectors_high()) { + map.virtual = 0; + map.type = MT_LOW_VECTORS; + create_mapping(&map); } /* - * finish off the bad pages once - * the mem_map is initialised + * Ask the machine support to map in the statically mapped devices. + * After this point, we can start to touch devices again. + */ + if (mdesc->map_io) + mdesc->map_io(); +} + +/* + * paging_init() sets up the page tables, initialises the zone memory + * maps, and sets up the zero page, bad page and bad page tables. + */ +void __init paging_init(struct meminfo *mi, struct machine_desc *mdesc) +{ + void *zero_page; + + build_mem_type_table(); + bootmem_init(mi); + devicemaps_init(mdesc); + + top_pmd = pmd_off_k(0xffff0000); + + /* + * allocate the zero page. Note that we count on this going ok. */ + zero_page = alloc_bootmem_low_pages(PAGE_SIZE); memzero(zero_page, PAGE_SIZE); empty_zero_page = virt_to_page(zero_page); flush_dcache_page(empty_zero_page); @@ -562,10 +563,7 @@ static void __init free_unused_memmap_node(int node, struct meminfo *mi) * may not be the case, especially if the user has provided the * information on the command line. */ - for (i = 0; i < mi->nr_banks; i++) { - if (mi->bank[i].size == 0 || mi->bank[i].node != node) - continue; - + for_each_nodebank(i, mi, node) { bank_start = mi->bank[i].start >> PAGE_SHIFT; if (bank_start < prev_bank_end) { printk(KERN_ERR "MEM: unordered memory banks. " diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c index 7110e54182b..6fb1258df1b 100644 --- a/arch/arm/mm/ioremap.c +++ b/arch/arm/mm/ioremap.c @@ -26,6 +26,7 @@ #include <linux/vmalloc.h> #include <asm/cacheflush.h> +#include <asm/hardware.h> #include <asm/io.h> #include <asm/tlbflush.h> diff --git a/arch/arm/mm/mm-armv.c b/arch/arm/mm/mm-armv.c index d125a3dc061..61bc2fa0511 100644 --- a/arch/arm/mm/mm-armv.c +++ b/arch/arm/mm/mm-armv.c @@ -1,7 +1,7 @@ /* * linux/arch/arm/mm/mm-armv.c * - * Copyright (C) 1998-2002 Russell King + * Copyright (C) 1998-2005 Russell King * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -305,16 +305,6 @@ alloc_init_page(unsigned long virt, unsigned long phys, unsigned int prot_l1, pg set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot)); } -/* - * Clear any PGD mapping. On a two-level page table system, - * the clearance is done by the middle-level functions (pmd) - * rather than the top-level (pgd) functions. - */ -static inline void clear_mapping(unsigned long virt) -{ - pmd_clear(pmd_off_k(virt)); -} - struct mem_types { unsigned int prot_pte; unsigned int prot_l1; @@ -373,7 +363,7 @@ static struct mem_types mem_types[] __initdata = { /* * Adjust the PMD section entries according to the CPU in use. */ -static void __init build_mem_type_table(void) +void __init build_mem_type_table(void) { struct cachepolicy *cp; unsigned int cr = get_cr(); @@ -483,25 +473,25 @@ static void __init build_mem_type_table(void) * offsets, and we take full advantage of sections and * supersections. */ -static void __init create_mapping(struct map_desc *md) +void __init create_mapping(struct map_desc *md) { unsigned long virt, length; int prot_sect, prot_l1, domain; pgprot_t prot_pte; - long off; + unsigned long off = (u32)__pfn_to_phys(md->pfn); if (md->virtual != vectors_base() && md->virtual < TASK_SIZE) { printk(KERN_WARNING "BUG: not creating mapping for " - "0x%08lx at 0x%08lx in user region\n", - md->physical, md->virtual); + "0x%016llx at 0x%08lx in user region\n", + __pfn_to_phys((u64)md->pfn), md->virtual); return; } if ((md->type == MT_DEVICE || md->type == MT_ROM) && md->virtual >= PAGE_OFFSET && md->virtual < VMALLOC_END) { - printk(KERN_WARNING "BUG: mapping for 0x%08lx at 0x%08lx " + printk(KERN_WARNING "BUG: mapping for 0x%016llx at 0x%08lx " "overlaps vmalloc space\n", - md->physical, md->virtual); + __pfn_to_phys((u64)md->pfn), md->virtual); } domain = mem_types[md->type].domain; @@ -509,15 +499,40 @@ static void __init create_mapping(struct map_desc *md) prot_l1 = mem_types[md->type].prot_l1 | PMD_DOMAIN(domain); prot_sect = mem_types[md->type].prot_sect | PMD_DOMAIN(domain); + /* + * Catch 36-bit addresses + */ + if(md->pfn >= 0x100000) { + if(domain) { + printk(KERN_ERR "MM: invalid domain in supersection " + "mapping for 0x%016llx at 0x%08lx\n", + __pfn_to_phys((u64)md->pfn), md->virtual); + return; + } + if((md->virtual | md->length | __pfn_to_phys(md->pfn)) + & ~SUPERSECTION_MASK) { + printk(KERN_ERR "MM: cannot create mapping for " + "0x%016llx at 0x%08lx invalid alignment\n", + __pfn_to_phys((u64)md->pfn), md->virtual); + return; + } + + /* + * Shift bits [35:32] of address into bits [23:20] of PMD + * (See ARMv6 spec). + */ + off |= (((md->pfn >> (32 - PAGE_SHIFT)) & 0xF) << 20); + } + virt = md->virtual; - off = md->physical - virt; + off -= virt; length = md->length; if (mem_types[md->type].prot_l1 == 0 && (virt & 0xfffff || (virt + off) & 0xfffff || (virt + length) & 0xfffff)) { printk(KERN_WARNING "BUG: map for 0x%08lx at 0x%08lx can not " "be mapped using pages, ignoring.\n", - md->physical, md->virtual); + __pfn_to_phys(md->pfn), md->virtual); return; } @@ -535,13 +550,22 @@ static void __init create_mapping(struct map_desc *md) * of the actual domain assignments in use. */ if (cpu_architecture() >= CPU_ARCH_ARMv6 && domain == 0) { - /* Align to supersection boundary */ - while ((virt & ~SUPERSECTION_MASK || (virt + off) & - ~SUPERSECTION_MASK) && length >= (PGDIR_SIZE / 2)) { - alloc_init_section(virt, virt + off, prot_sect); - - virt += (PGDIR_SIZE / 2); - length -= (PGDIR_SIZE / 2); + /* + * Align to supersection boundary if !high pages. + * High pages have already been checked for proper + * alignment above and they will fail the SUPSERSECTION_MASK + * check because of the way the address is encoded into + * offset. + */ + if (md->pfn <= 0x100000) { + while ((virt & ~SUPERSECTION_MASK || + (virt + off) & ~SUPERSECTION_MASK) && + length >= (PGDIR_SIZE / 2)) { + alloc_init_section(virt, virt + off, prot_sect); + + virt += (PGDIR_SIZE / 2); + length -= (PGDIR_SIZE / 2); + } } while (length >= SUPERSECTION_SIZE) { @@ -601,100 +625,6 @@ void setup_mm_for_reboot(char mode) } } -extern void _stext, _etext; - -/* - * Setup initial mappings. We use the page we allocated for zero page to hold - * the mappings, which will get overwritten by the vectors in traps_init(). - * The mappings must be in virtual address order. - */ -void __init memtable_init(struct meminfo *mi) -{ - struct map_desc *init_maps, *p, *q; - unsigned long address = 0; - int i; - - build_mem_type_table(); - - init_maps = p = alloc_bootmem_low_pages(PAGE_SIZE); - -#ifdef CONFIG_XIP_KERNEL - p->physical = CONFIG_XIP_PHYS_ADDR & PMD_MASK; - p->virtual = (unsigned long)&_stext & PMD_MASK; - p->length = ((unsigned long)&_etext - p->virtual + ~PMD_MASK) & PMD_MASK; - p->type = MT_ROM; - p ++; -#endif - - for (i = 0; i < mi->nr_banks; i++) { - if (mi->bank[i].size == 0) - continue; - - p->physical = mi->bank[i].start; - p->virtual = __phys_to_virt(p->physical); - p->length = mi->bank[i].size; - p->type = MT_MEMORY; - p ++; - } - -#ifdef FLUSH_BASE - p->physical = FLUSH_BASE_PHYS; - p->virtual = FLUSH_BASE; - p->length = PGDIR_SIZE; - p->type = MT_CACHECLEAN; - p ++; -#endif - -#ifdef FLUSH_BASE_MINICACHE - p->physical = FLUSH_BASE_PHYS + PGDIR_SIZE; - p->virtual = FLUSH_BASE_MINICACHE; - p->length = PGDIR_SIZE; - p->type = MT_MINICLEAN; - p ++; -#endif - - /* - * Go through the initial mappings, but clear out any - * pgdir entries that are not in the description. - */ - q = init_maps; - do { - if (address < q->virtual || q == p) { - clear_mapping(address); - address += PGDIR_SIZE; - } else { - create_mapping(q); - - address = q->virtual + q->length; - address = (address + PGDIR_SIZE - 1) & PGDIR_MASK; - - q ++; - } - } while (address != 0); - - /* - * Create a mapping for the machine vectors at the high-vectors - * location (0xffff0000). If we aren't using high-vectors, also - * create a mapping at the low-vectors virtual address. - */ - init_maps->physical = virt_to_phys(init_maps); - init_maps->virtual = 0xffff0000; - init_maps->length = PAGE_SIZE; - init_maps->type = MT_HIGH_VECTORS; - create_mapping(init_maps); - - if (!vectors_high()) { - init_maps->virtual = 0; - init_maps->type = MT_LOW_VECTORS; - create_mapping(init_maps); - } - - flush_cache_all(); - local_flush_tlb_all(); - - top_pmd = pmd_off_k(0xffff0000); -} - /* * Create the architecture specific mappings */ diff --git a/arch/arm/oprofile/Makefile b/arch/arm/oprofile/Makefile index 8ffb523e6c7..6a94e54848f 100644 --- a/arch/arm/oprofile/Makefile +++ b/arch/arm/oprofile/Makefile @@ -6,6 +6,6 @@ DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \ oprofilefs.o oprofile_stats.o \ timer_int.o ) -oprofile-y := $(DRIVER_OBJS) init.o backtrace.o -oprofile-$(CONFIG_CPU_XSCALE) += common.o op_model_xscale.o +oprofile-y := $(DRIVER_OBJS) common.o backtrace.o +oprofile-$(CONFIG_CPU_XSCALE) += op_model_xscale.o diff --git a/arch/arm/oprofile/common.c b/arch/arm/oprofile/common.c index e57dde88289..1415930ceee 100644 --- a/arch/arm/oprofile/common.c +++ b/arch/arm/oprofile/common.c @@ -10,74 +10,23 @@ #include <linux/init.h> #include <linux/oprofile.h> #include <linux/errno.h> -#include <asm/semaphore.h> #include <linux/sysdev.h> +#include <asm/semaphore.h> #include "op_counter.h" #include "op_arm_model.h" -static struct op_arm_model_spec *pmu_model; -static int pmu_enabled; -static struct semaphore pmu_sem; - -static int pmu_start(void); -static int pmu_setup(void); -static void pmu_stop(void); -static int pmu_create_files(struct super_block *, struct dentry *); - -#ifdef CONFIG_PM -static int pmu_suspend(struct sys_device *dev, pm_message_t state) -{ - if (pmu_enabled) - pmu_stop(); - return 0; -} - -static int pmu_resume(struct sys_device *dev) -{ - if (pmu_enabled) - pmu_start(); - return 0; -} - -static struct sysdev_class oprofile_sysclass = { - set_kset_name("oprofile"), - .resume = pmu_resume, - .suspend = pmu_suspend, -}; - -static struct sys_device device_oprofile = { - .id = 0, - .cls = &oprofile_sysclass, -}; - -static int __init init_driverfs(void) -{ - int ret; - - if (!(ret = sysdev_class_register(&oprofile_sysclass))) - ret = sysdev_register(&device_oprofile); - - return ret; -} - -static void exit_driverfs(void) -{ - sysdev_unregister(&device_oprofile); - sysdev_class_unregister(&oprofile_sysclass); -} -#else -#define init_driverfs() do { } while (0) -#define exit_driverfs() do { } while (0) -#endif /* CONFIG_PM */ +static struct op_arm_model_spec *op_arm_model; +static int op_arm_enabled; +static struct semaphore op_arm_sem; struct op_counter_config counter_config[OP_MAX_COUNTER]; -static int pmu_create_files(struct super_block *sb, struct dentry *root) +static int op_arm_create_files(struct super_block *sb, struct dentry *root) { unsigned int i; - for (i = 0; i < pmu_model->num_counters; i++) { + for (i = 0; i < op_arm_model->num_counters; i++) { struct dentry *dir; char buf[2]; @@ -94,63 +43,123 @@ static int pmu_create_files(struct super_block *sb, struct dentry *root) return 0; } -static int pmu_setup(void) +static int op_arm_setup(void) { int ret; spin_lock(&oprofilefs_lock); - ret = pmu_model->setup_ctrs(); + ret = op_arm_model->setup_ctrs(); spin_unlock(&oprofilefs_lock); return ret; } -static int pmu_start(void) +static int op_arm_start(void) { int ret = -EBUSY; - down(&pmu_sem); - if (!pmu_enabled) { - ret = pmu_model->start(); - pmu_enabled = !ret; + down(&op_arm_sem); + if (!op_arm_enabled) { + ret = op_arm_model->start(); + op_arm_enabled = !ret; } - up(&pmu_sem); + up(&op_arm_sem); return ret; } -static void pmu_stop(void) +static void op_arm_stop(void) +{ + down(&op_arm_sem); + if (op_arm_enabled) + op_arm_model->stop(); + op_arm_enabled = 0; + up(&op_arm_sem); +} + +#ifdef CONFIG_PM +static int op_arm_suspend(struct sys_device *dev, pm_message_t state) { - down(&pmu_sem); - if (pmu_enabled) - pmu_model->stop(); - pmu_enabled = 0; - up(&pmu_sem); + down(&op_arm_sem); + if (op_arm_enabled) + op_arm_model->stop(); + up(&op_arm_sem); + return 0; } -int __init pmu_init(struct oprofile_operations *ops, struct op_arm_model_spec *spec) +static int op_arm_resume(struct sys_device *dev) { - init_MUTEX(&pmu_sem); + down(&op_arm_sem); + if (op_arm_enabled && op_arm_model->start()) + op_arm_enabled = 0; + up(&op_arm_sem); + return 0; +} + +static struct sysdev_class oprofile_sysclass = { + set_kset_name("oprofile"), + .resume = op_arm_resume, + .suspend = op_arm_suspend, +}; - if (spec->init() < 0) - return -ENODEV; +static struct sys_device device_oprofile = { + .id = 0, + .cls = &oprofile_sysclass, +}; - pmu_model = spec; - init_driverfs(); - ops->create_files = pmu_create_files; - ops->setup = pmu_setup; - ops->shutdown = pmu_stop; - ops->start = pmu_start; - ops->stop = pmu_stop; - ops->cpu_type = pmu_model->name; - printk(KERN_INFO "oprofile: using %s PMU\n", spec->name); +static int __init init_driverfs(void) +{ + int ret; - return 0; + if (!(ret = sysdev_class_register(&oprofile_sysclass))) + ret = sysdev_register(&device_oprofile); + + return ret; +} + +static void exit_driverfs(void) +{ + sysdev_unregister(&device_oprofile); + sysdev_class_unregister(&oprofile_sysclass); +} +#else +#define init_driverfs() do { } while (0) +#define exit_driverfs() do { } while (0) +#endif /* CONFIG_PM */ + +int __init oprofile_arch_init(struct oprofile_operations *ops) +{ + struct op_arm_model_spec *spec = NULL; + int ret = -ENODEV; + +#ifdef CONFIG_CPU_XSCALE + spec = &op_xscale_spec; +#endif + + if (spec) { + init_MUTEX(&op_arm_sem); + + if (spec->init() < 0) + return -ENODEV; + + op_arm_model = spec; + init_driverfs(); + ops->create_files = op_arm_create_files; + ops->setup = op_arm_setup; + ops->shutdown = op_arm_stop; + ops->start = op_arm_start; + ops->stop = op_arm_stop; + ops->cpu_type = op_arm_model->name; + ops->backtrace = arm_backtrace; + printk(KERN_INFO "oprofile: using %s\n", spec->name); + } + + return ret; } -void pmu_exit(void) +void oprofile_arch_exit(void) { - if (pmu_model) { + if (op_arm_model) { exit_driverfs(); - pmu_model = NULL; + op_arm_model = NULL; } } diff --git a/arch/arm/oprofile/init.c b/arch/arm/oprofile/init.c deleted file mode 100644 index d315a3a86c8..00000000000 --- a/arch/arm/oprofile/init.c +++ /dev/null @@ -1,33 +0,0 @@ -/** - * @file init.c - * - * @remark Copyright 2004 Oprofile Authors - * @remark Read the file COPYING - * - * @author Zwane Mwaikambo - */ - -#include <linux/oprofile.h> -#include <linux/init.h> -#include <linux/errno.h> -#include "op_arm_model.h" - -int __init oprofile_arch_init(struct oprofile_operations *ops) -{ - int ret = -ENODEV; - -#ifdef CONFIG_CPU_XSCALE - ret = pmu_init(ops, &op_xscale_spec); -#endif - - ops->backtrace = arm_backtrace; - - return ret; -} - -void oprofile_arch_exit(void) -{ -#ifdef CONFIG_CPU_XSCALE - pmu_exit(); -#endif -} diff --git a/arch/arm/oprofile/op_arm_model.h b/arch/arm/oprofile/op_arm_model.h index 2148d07484b..38c6ad15854 100644 --- a/arch/arm/oprofile/op_arm_model.h +++ b/arch/arm/oprofile/op_arm_model.h @@ -26,6 +26,6 @@ extern struct op_arm_model_spec op_xscale_spec; extern void arm_backtrace(struct pt_regs * const regs, unsigned int depth); -extern int __init pmu_init(struct oprofile_operations *ops, struct op_arm_model_spec *spec); -extern void pmu_exit(void); +extern int __init op_arm_init(struct oprofile_operations *ops, struct op_arm_model_spec *spec); +extern void op_arm_exit(void); #endif /* OP_ARM_MODEL_H */ diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c index 7719a4062e3..7ad69f14a3e 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c @@ -59,7 +59,11 @@ void __init omap_detect_sram(void) } static struct map_desc omap_sram_io_desc[] __initdata = { - { OMAP1_SRAM_BASE, OMAP1_SRAM_START, 0, MT_DEVICE } + { /* .length gets filled in at runtime */ + .virtual = OMAP1_SRAM_BASE, + .pfn = __phys_to_pfn(OMAP1_SRAM_START), + .type = MT_DEVICE + } }; /* diff --git a/drivers/char/nvram.c b/drivers/char/nvram.c index 1af733d0732..9e24bbd4090 100644 --- a/drivers/char/nvram.c +++ b/drivers/char/nvram.c @@ -32,9 +32,11 @@ * added changelog * 1.2 Erik Gilling: Cobalt Networks support * Tim Hockin: general cleanup, Cobalt support + * 1.3 Jon Ringle: Comdial MP1000 support + * */ -#define NVRAM_VERSION "1.2" +#define NVRAM_VERSION "1.3" #include <linux/module.h> #include <linux/config.h> @@ -45,6 +47,7 @@ #define PC 1 #define ATARI 2 #define COBALT 3 +#define MP1000 4 /* select machine configuration */ #if defined(CONFIG_ATARI) @@ -54,6 +57,9 @@ # if defined(CONFIG_COBALT) # include <linux/cobalt-nvram.h> # define MACH COBALT +# elif defined(CONFIG_MACH_MP1000) +# undef MACH +# define MACH MP1000 # else # define MACH PC # endif @@ -112,6 +118,23 @@ #endif +#if MACH == MP1000 + +/* RTC in a MP1000 */ +#define CHECK_DRIVER_INIT() 1 + +#define MP1000_CKS_RANGE_START 0 +#define MP1000_CKS_RANGE_END 111 +#define MP1000_CKS_LOC 112 + +#define NVRAM_BYTES (128-NVRAM_FIRST_BYTE) + +#define mach_check_checksum mp1000_check_checksum +#define mach_set_checksum mp1000_set_checksum +#define mach_proc_infos mp1000_proc_infos + +#endif + /* Note that *all* calls to CMOS_READ and CMOS_WRITE must be done with * rtc_lock held. Due to the index-port/data-port design of the RTC, we * don't want two different things trying to get to it at once. (e.g. the @@ -915,6 +938,91 @@ atari_proc_infos(unsigned char *nvram, char *buffer, int *len, #endif /* MACH == ATARI */ +#if MACH == MP1000 + +static int +mp1000_check_checksum(void) +{ + int i; + unsigned short sum = 0; + unsigned short expect; + + for (i = MP1000_CKS_RANGE_START; i <= MP1000_CKS_RANGE_END; ++i) + sum += __nvram_read_byte(i); + + expect = __nvram_read_byte(MP1000_CKS_LOC+1)<<8 | + __nvram_read_byte(MP1000_CKS_LOC); + return ((sum & 0xffff) == expect); +} + +static void +mp1000_set_checksum(void) +{ + int i; + unsigned short sum = 0; + + for (i = MP1000_CKS_RANGE_START; i <= MP1000_CKS_RANGE_END; ++i) + sum += __nvram_read_byte(i); + __nvram_write_byte(sum >> 8, MP1000_CKS_LOC + 1); + __nvram_write_byte(sum & 0xff, MP1000_CKS_LOC); +} + +#ifdef CONFIG_PROC_FS + +#define SERVER_N_LEN 32 +#define PATH_N_LEN 32 +#define FILE_N_LEN 32 +#define NVRAM_MAGIC_SIG 0xdead + +typedef struct NvRamImage +{ + unsigned short int magic; + unsigned short int mode; + char fname[FILE_N_LEN]; + char path[PATH_N_LEN]; + char server[SERVER_N_LEN]; + char pad[12]; +} NvRam; + +static int +mp1000_proc_infos(unsigned char *nvram, char *buffer, int *len, + off_t *begin, off_t offset, int size) +{ + int checksum; + NvRam* nv = (NvRam*)nvram; + + spin_lock_irq(&rtc_lock); + checksum = __nvram_check_checksum(); + spin_unlock_irq(&rtc_lock); + + PRINT_PROC("Checksum status: %svalid\n", checksum ? "" : "not "); + + switch( nv->mode ) + { + case 0 : + PRINT_PROC( "\tMode 0, tftp prompt\n" ); + break; + case 1 : + PRINT_PROC( "\tMode 1, booting from disk\n" ); + break; + case 2 : + PRINT_PROC( "\tMode 2, Alternate boot from disk /boot/%s\n", nv->fname ); + break; + case 3 : + PRINT_PROC( "\tMode 3, Booting from net:\n" ); + PRINT_PROC( "\t\t%s:%s%s\n",nv->server, nv->path, nv->fname ); + break; + default: + PRINT_PROC( "\tInconsistant nvram?\n" ); + break; + } + + return 1; +} +#endif + +#endif /* MACH == MP1000 */ + MODULE_LICENSE("GPL"); EXPORT_SYMBOL(__nvram_read_byte); diff --git a/drivers/mmc/mmci.c b/drivers/mmc/mmci.c index 91c74843dc0..1e6bdba2675 100644 --- a/drivers/mmc/mmci.c +++ b/drivers/mmc/mmci.c @@ -24,6 +24,7 @@ #include <asm/io.h> #include <asm/irq.h> #include <asm/scatterlist.h> +#include <asm/sizes.h> #include <asm/hardware/amba.h> #include <asm/hardware/clock.h> #include <asm/mach/mmc.h> diff --git a/drivers/mtd/maps/sa1100-flash.c b/drivers/mtd/maps/sa1100-flash.c index 8dcaa357b4b..9133351ba48 100644 --- a/drivers/mtd/maps/sa1100-flash.c +++ b/drivers/mtd/maps/sa1100-flash.c @@ -21,6 +21,7 @@ #include <linux/mtd/partitions.h> #include <linux/mtd/concat.h> +#include <asm/hardware.h> #include <asm/io.h> #include <asm/sizes.h> #include <asm/mach/flash.h> diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 5148d47492a..fee8c5cf1f3 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -1338,7 +1338,7 @@ config FORCEDETH config CS89x0 tristate "CS89x0 support" - depends on (NET_PCI && (ISA || ARCH_IXDP2X01)) || ARCH_PNX0105 + depends on (NET_PCI && (ISA || ARCH_IXDP2X01)) || ARCH_PNX0105 || MACH_MP1000 ---help--- Support for CS89x0 chipset based Ethernet cards. If you have a network (Ethernet) card of this type, say Y and read the diff --git a/drivers/net/arm/am79c961a.c b/drivers/net/arm/am79c961a.c index c56d86d371a..3d50e953faa 100644 --- a/drivers/net/arm/am79c961a.c +++ b/drivers/net/arm/am79c961a.c @@ -29,6 +29,7 @@ #include <asm/system.h> #include <asm/irq.h> +#include <asm/hardware.h> #include <asm/io.h> #define TX_BUFFERS 15 diff --git a/drivers/net/cs89x0.c b/drivers/net/cs89x0.c index a6078ad9b65..bfdae10036e 100644 --- a/drivers/net/cs89x0.c +++ b/drivers/net/cs89x0.c @@ -182,6 +182,10 @@ static unsigned int cs8900_irq_map[] = {IRQ_IXDP2X01_CS8900, 0, 0, 0}; #define CIRRUS_DEFAULT_IRQ VH_INTC_INT_NUM_CASCADED_INTERRUPT_1 /* Event inputs bank 1 - ID 35/bit 3 */ static unsigned int netcard_portlist[] __initdata = {CIRRUS_DEFAULT_BASE, 0}; static unsigned int cs8900_irq_map[] = {CIRRUS_DEFAULT_IRQ, 0, 0, 0}; +#elif defined(CONFIG_MACH_MP1000) +#include <asm/arch/mp1000-seprom.h> +static unsigned int netcard_portlist[] __initdata = {MP1000_EIO_BASE+0x300, 0}; +static unsigned int cs8900_irq_map[] = {IRQ_EINT3,0,0,0}; #else static unsigned int netcard_portlist[] __initdata = { 0x300, 0x320, 0x340, 0x360, 0x200, 0x220, 0x240, 0x260, 0x280, 0x2a0, 0x2c0, 0x2e0, 0}; @@ -590,6 +594,10 @@ cs89x0_probe1(struct net_device *dev, int ioaddr, int modular) cnt -= j; } } else +#elif defined(CONFIG_MACH_MP1000) + if (1) { + memcpy(dev->dev_addr, get_eeprom_mac_address(), ETH_ALEN); + } else #endif if ((readreg(dev, PP_SelfST) & (EEPROM_OK | EEPROM_PRESENT)) == @@ -649,6 +657,10 @@ cs89x0_probe1(struct net_device *dev, int ioaddr, int modular) if (1) { printk(KERN_NOTICE "cs89x0: No EEPROM on HiCO.SH4\n"); } else +#elif defined(CONFIG_MACH_MP1000) + if (1) { + lp->force |= FORCE_RJ45; + } else #endif if ((readreg(dev, PP_SelfST) & EEPROM_PRESENT) == 0) printk(KERN_WARNING "cs89x0: No EEPROM, relying on command line....\n"); @@ -1231,7 +1243,7 @@ net_open(struct net_device *dev) else #endif { -#if !defined(CONFIG_ARCH_IXDP2X01) && !defined(CONFIG_ARCH_PNX0105) +#if !defined(CONFIG_ARCH_IXDP2X01) && !defined(CONFIG_ARCH_PNX0105) && !defined(CONFIG_MACH_MP1000) if (((1 << dev->irq) & lp->irq_map) == 0) { printk(KERN_ERR "%s: IRQ %d is not in our map of allowable IRQs, which is %x\n", dev->name, dev->irq, lp->irq_map); diff --git a/drivers/net/cs89x0.h b/drivers/net/cs89x0.h index decea264f12..f19d1ebe018 100644 --- a/drivers/net/cs89x0.h +++ b/drivers/net/cs89x0.h @@ -16,7 +16,7 @@ #include <linux/config.h> -#if defined(CONFIG_ARCH_IXDP2X01) || defined(CONFIG_ARCH_PNX0105) +#if defined(CONFIG_ARCH_IXDP2X01) || defined(CONFIG_ARCH_PNX0105) || defined (CONFIG_MACH_MP1000) /* IXDP2401/IXDP2801 uses dword-aligned register addressing */ #define CS89x0_PORT(reg) ((reg) * 2) #else diff --git a/drivers/net/irda/Kconfig b/drivers/net/irda/Kconfig index ca5914091d3..d54156f11e6 100644 --- a/drivers/net/irda/Kconfig +++ b/drivers/net/irda/Kconfig @@ -400,5 +400,15 @@ config VIA_FIR To compile it as a module, choose M here: the module will be called via-ircc. +config PXA_FICP + tristate "Intel PXA2xx Internal FICP" + depends on ARCH_PXA && IRDA + help + Say Y or M here if you want to build support for the PXA2xx + built-in IRDA interface which can support both SIR and FIR. + This driver relies on platform specific helper routines so + available capabilities may vary from one PXA2xx target to + another. + endmenu diff --git a/drivers/net/irda/Makefile b/drivers/net/irda/Makefile index 29a8bd812b2..e7a8b7f7f5d 100644 --- a/drivers/net/irda/Makefile +++ b/drivers/net/irda/Makefile @@ -18,6 +18,7 @@ obj-$(CONFIG_SMC_IRCC_FIR) += smsc-ircc2.o obj-$(CONFIG_ALI_FIR) += ali-ircc.o obj-$(CONFIG_VLSI_FIR) += vlsi_ir.o obj-$(CONFIG_VIA_FIR) += via-ircc.o +obj-$(CONFIG_PXA_FICP) += pxaficp_ir.o # Old dongle drivers for old SIR drivers obj-$(CONFIG_ESI_DONGLE_OLD) += esi.o obj-$(CONFIG_TEKRAM_DONGLE_OLD) += tekram.o diff --git a/drivers/net/irda/pxaficp_ir.c b/drivers/net/irda/pxaficp_ir.c new file mode 100644 index 00000000000..aef80f5e7c9 --- /dev/null +++ b/drivers/net/irda/pxaficp_ir.c @@ -0,0 +1,871 @@ +/* + * linux/drivers/net/irda/pxaficp_ir.c + * + * Based on sa1100_ir.c by Russell King + * + * Changes copyright (C) 2003-2005 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Infra-red driver (SIR/FIR) for the PXA2xx embedded microprocessor + * + */ +#include <linux/config.h> +#include <linux/module.h> +#include <linux/types.h> +#include <linux/init.h> +#include <linux/errno.h> +#include <linux/netdevice.h> +#include <linux/slab.h> +#include <linux/rtnetlink.h> +#include <linux/interrupt.h> +#include <linux/dma-mapping.h> +#include <linux/pm.h> + +#include <net/irda/irda.h> +#include <net/irda/irmod.h> +#include <net/irda/wrapper.h> +#include <net/irda/irda_device.h> + +#include <asm/irq.h> +#include <asm/dma.h> +#include <asm/delay.h> +#include <asm/hardware.h> +#include <asm/arch/irda.h> +#include <asm/arch/pxa-regs.h> + +#ifdef CONFIG_MACH_MAINSTONE +#include <asm/arch/mainstone.h> +#endif + +#define IrSR_RXPL_NEG_IS_ZERO (1<<4) +#define IrSR_RXPL_POS_IS_ZERO 0x0 +#define IrSR_TXPL_NEG_IS_ZERO (1<<3) +#define IrSR_TXPL_POS_IS_ZERO 0x0 +#define IrSR_XMODE_PULSE_1_6 (1<<2) +#define IrSR_XMODE_PULSE_3_16 0x0 +#define IrSR_RCVEIR_IR_MODE (1<<1) +#define IrSR_RCVEIR_UART_MODE 0x0 +#define IrSR_XMITIR_IR_MODE (1<<0) +#define IrSR_XMITIR_UART_MODE 0x0 + +#define IrSR_IR_RECEIVE_ON (\ + IrSR_RXPL_NEG_IS_ZERO | \ + IrSR_TXPL_POS_IS_ZERO | \ + IrSR_XMODE_PULSE_3_16 | \ + IrSR_RCVEIR_IR_MODE | \ + IrSR_XMITIR_UART_MODE) + +#define IrSR_IR_TRANSMIT_ON (\ + IrSR_RXPL_NEG_IS_ZERO | \ + IrSR_TXPL_POS_IS_ZERO | \ + IrSR_XMODE_PULSE_3_16 | \ + IrSR_RCVEIR_UART_MODE | \ + IrSR_XMITIR_IR_MODE) + +struct pxa_irda { + int speed; + int newspeed; + unsigned long last_oscr; + + unsigned char *dma_rx_buff; + unsigned char *dma_tx_buff; + dma_addr_t dma_rx_buff_phy; + dma_addr_t dma_tx_buff_phy; + unsigned int dma_tx_buff_len; + int txdma; + int rxdma; + + struct net_device_stats stats; + struct irlap_cb *irlap; + struct qos_info qos; + + iobuff_t tx_buff; + iobuff_t rx_buff; + + struct device *dev; + struct pxaficp_platform_data *pdata; +}; + + +#define IS_FIR(si) ((si)->speed >= 4000000) +#define IRDA_FRAME_SIZE_LIMIT 2047 + +inline static void pxa_irda_fir_dma_rx_start(struct pxa_irda *si) +{ + DCSR(si->rxdma) = DCSR_NODESC; + DSADR(si->rxdma) = __PREG(ICDR); + DTADR(si->rxdma) = si->dma_rx_buff_phy; + DCMD(si->rxdma) = DCMD_INCTRGADDR | DCMD_FLOWSRC | DCMD_WIDTH1 | DCMD_BURST32 | IRDA_FRAME_SIZE_LIMIT; + DCSR(si->rxdma) |= DCSR_RUN; +} + +inline static void pxa_irda_fir_dma_tx_start(struct pxa_irda *si) +{ + DCSR(si->txdma) = DCSR_NODESC; + DSADR(si->txdma) = si->dma_tx_buff_phy; + DTADR(si->txdma) = __PREG(ICDR); + DCMD(si->txdma) = DCMD_INCSRCADDR | DCMD_FLOWTRG | DCMD_ENDIRQEN | DCMD_WIDTH1 | DCMD_BURST32 | si->dma_tx_buff_len; + DCSR(si->txdma) |= DCSR_RUN; +} + +/* + * Set the IrDA communications speed. + */ +static int pxa_irda_set_speed(struct pxa_irda *si, int speed) +{ + unsigned long flags; + unsigned int divisor; + + switch (speed) { + case 9600: case 19200: case 38400: + case 57600: case 115200: + + /* refer to PXA250/210 Developer's Manual 10-7 */ + /* BaudRate = 14.7456 MHz / (16*Divisor) */ + divisor = 14745600 / (16 * speed); + + local_irq_save(flags); + + if (IS_FIR(si)) { + /* stop RX DMA */ + DCSR(si->rxdma) &= ~DCSR_RUN; + /* disable FICP */ + ICCR0 = 0; + pxa_set_cken(CKEN13_FICP, 0); + + /* set board transceiver to SIR mode */ + si->pdata->transceiver_mode(si->dev, IR_SIRMODE); + + /* configure GPIO46/47 */ + pxa_gpio_mode(GPIO46_STRXD_MD); + pxa_gpio_mode(GPIO47_STTXD_MD); + + /* enable the STUART clock */ + pxa_set_cken(CKEN5_STUART, 1); + } + + /* disable STUART first */ + STIER = 0; + + /* access DLL & DLH */ + STLCR |= LCR_DLAB; + STDLL = divisor & 0xff; + STDLH = divisor >> 8; + STLCR &= ~LCR_DLAB; + + si->speed = speed; + STISR = IrSR_IR_RECEIVE_ON | IrSR_XMODE_PULSE_1_6; + STIER = IER_UUE | IER_RLSE | IER_RAVIE | IER_RTIOE; + + local_irq_restore(flags); + break; + + case 4000000: + local_irq_save(flags); + + /* disable STUART */ + STIER = 0; + STISR = 0; + pxa_set_cken(CKEN5_STUART, 0); + + /* disable FICP first */ + ICCR0 = 0; + + /* set board transceiver to FIR mode */ + si->pdata->transceiver_mode(si->dev, IR_FIRMODE); + + /* configure GPIO46/47 */ + pxa_gpio_mode(GPIO46_ICPRXD_MD); + pxa_gpio_mode(GPIO47_ICPTXD_MD); + + /* enable the FICP clock */ + pxa_set_cken(CKEN13_FICP, 1); + + si->speed = speed; + pxa_irda_fir_dma_rx_start(si); + ICCR0 = ICCR0_ITR | ICCR0_RXE; + + local_irq_restore(flags); + break; + + default: + return -EINVAL; + } + + return 0; +} + +/* SIR interrupt service routine. */ +static irqreturn_t pxa_irda_sir_irq(int irq, void *dev_id, struct pt_regs *regs) +{ + struct net_device *dev = dev_id; + struct pxa_irda *si = netdev_priv(dev); + int iir, lsr, data; + + iir = STIIR; + + switch (iir & 0x0F) { + case 0x06: /* Receiver Line Status */ + lsr = STLSR; + while (lsr & LSR_FIFOE) { + data = STRBR; + if (lsr & (LSR_OE | LSR_PE | LSR_FE | LSR_BI)) { + printk(KERN_DEBUG "pxa_ir: sir receiving error\n"); + si->stats.rx_errors++; + if (lsr & LSR_FE) + si->stats.rx_frame_errors++; + if (lsr & LSR_OE) + si->stats.rx_fifo_errors++; + } else { + si->stats.rx_bytes++; + async_unwrap_char(dev, &si->stats, &si->rx_buff, data); + } + lsr = STLSR; + } + dev->last_rx = jiffies; + si->last_oscr = OSCR; + break; + + case 0x04: /* Received Data Available */ + /* forth through */ + + case 0x0C: /* Character Timeout Indication */ + do { + si->stats.rx_bytes++; + async_unwrap_char(dev, &si->stats, &si->rx_buff, STRBR); + } while (STLSR & LSR_DR); + dev->last_rx = jiffies; + si->last_oscr = OSCR; + break; + + case 0x02: /* Transmit FIFO Data Request */ + while ((si->tx_buff.len) && (STLSR & LSR_TDRQ)) { + STTHR = *si->tx_buff.data++; + si->tx_buff.len -= 1; + } + + if (si->tx_buff.len == 0) { + si->stats.tx_packets++; + si->stats.tx_bytes += si->tx_buff.data - + si->tx_buff.head; + + /* We need to ensure that the transmitter has finished. */ + while ((STLSR & LSR_TEMT) == 0) + cpu_relax(); + si->last_oscr = OSCR; + + /* + * Ok, we've finished transmitting. Now enable + * the receiver. Sometimes we get a receive IRQ + * immediately after a transmit... + */ + if (si->newspeed) { + pxa_irda_set_speed(si, si->newspeed); + si->newspeed = 0; + } else { + /* enable IR Receiver, disable IR Transmitter */ + STISR = IrSR_IR_RECEIVE_ON | IrSR_XMODE_PULSE_1_6; + /* enable STUART and receive interrupts */ + STIER = IER_UUE | IER_RLSE | IER_RAVIE | IER_RTIOE; + } + /* I'm hungry! */ + netif_wake_queue(dev); + } + break; + } + + return IRQ_HANDLED; +} + +/* FIR Receive DMA interrupt handler */ +static void pxa_irda_fir_dma_rx_irq(int channel, void *data, struct pt_regs *regs) +{ + int dcsr = DCSR(channel); + + DCSR(channel) = dcsr & ~DCSR_RUN; + + printk(KERN_DEBUG "pxa_ir: fir rx dma bus error %#x\n", dcsr); +} + +/* FIR Transmit DMA interrupt handler */ +static void pxa_irda_fir_dma_tx_irq(int channel, void *data, struct pt_regs *regs) +{ + struct net_device *dev = data; + struct pxa_irda *si = netdev_priv(dev); + int dcsr; + + dcsr = DCSR(channel); + DCSR(channel) = dcsr & ~DCSR_RUN; + + if (dcsr & DCSR_ENDINTR) { + si->stats.tx_packets++; + si->stats.tx_bytes += si->dma_tx_buff_len; + } else { + si->stats.tx_errors++; + } + + while (ICSR1 & ICSR1_TBY) + cpu_relax(); + si->last_oscr = OSCR; + + /* + * HACK: It looks like the TBY bit is dropped too soon. + * Without this delay things break. + */ + udelay(120); + + if (si->newspeed) { + pxa_irda_set_speed(si, si->newspeed); + si->newspeed = 0; + } else { + ICCR0 = 0; + pxa_irda_fir_dma_rx_start(si); + ICCR0 = ICCR0_ITR | ICCR0_RXE; + } + netif_wake_queue(dev); +} + +/* EIF(Error in FIFO/End in Frame) handler for FIR */ +static void pxa_irda_fir_irq_eif(struct pxa_irda *si, struct net_device *dev) +{ + unsigned int len, stat, data; + + /* Get the current data position. */ + len = DTADR(si->rxdma) - si->dma_rx_buff_phy; + + do { + /* Read Status, and then Data. */ + stat = ICSR1; + rmb(); + data = ICDR; + + if (stat & (ICSR1_CRE | ICSR1_ROR)) { + si->stats.rx_errors++; + if (stat & ICSR1_CRE) { + printk(KERN_DEBUG "pxa_ir: fir receive CRC error\n"); + si->stats.rx_crc_errors++; + } + if (stat & ICSR1_ROR) { + printk(KERN_DEBUG "pxa_ir: fir receive overrun\n"); + si->stats.rx_frame_errors++; + } + } else { + si->dma_rx_buff[len++] = data; + } + /* If we hit the end of frame, there's no point in continuing. */ + if (stat & ICSR1_EOF) + break; + } while (ICSR0 & ICSR0_EIF); + + if (stat & ICSR1_EOF) { + /* end of frame. */ + struct sk_buff *skb = alloc_skb(len+1,GFP_ATOMIC); + if (!skb) { + printk(KERN_ERR "pxa_ir: fir out of memory for receive skb\n"); + si->stats.rx_dropped++; + return; + } + + /* Align IP header to 20 bytes */ + skb_reserve(skb, 1); + memcpy(skb->data, si->dma_rx_buff, len); + skb_put(skb, len); + + /* Feed it to IrLAP */ + skb->dev = dev; + skb->mac.raw = skb->data; + skb->protocol = htons(ETH_P_IRDA); + netif_rx(skb); + + si->stats.rx_packets++; + si->stats.rx_bytes += len; + + dev->last_rx = jiffies; + } +} + +/* FIR interrupt handler */ +static irqreturn_t pxa_irda_fir_irq(int irq, void *dev_id, struct pt_regs *regs) +{ + struct net_device *dev = dev_id; + struct pxa_irda *si = netdev_priv(dev); + int icsr0; + + /* stop RX DMA */ + DCSR(si->rxdma) &= ~DCSR_RUN; + si->last_oscr = OSCR; + icsr0 = ICSR0; + + if (icsr0 & (ICSR0_FRE | ICSR0_RAB)) { + if (icsr0 & ICSR0_FRE) { + printk(KERN_DEBUG "pxa_ir: fir receive frame error\n"); + si->stats.rx_frame_errors++; + } else { + printk(KERN_DEBUG "pxa_ir: fir receive abort\n"); + si->stats.rx_errors++; + } + ICSR0 = icsr0 & (ICSR0_FRE | ICSR0_RAB); + } + + if (icsr0 & ICSR0_EIF) { + /* An error in FIFO occured, or there is a end of frame */ + pxa_irda_fir_irq_eif(si, dev); + } + + ICCR0 = 0; + pxa_irda_fir_dma_rx_start(si); + ICCR0 = ICCR0_ITR | ICCR0_RXE; + + return IRQ_HANDLED; +} + +/* hard_xmit interface of irda device */ +static int pxa_irda_hard_xmit(struct sk_buff *skb, struct net_device *dev) +{ + struct pxa_irda *si = netdev_priv(dev); + int speed = irda_get_next_speed(skb); + + /* + * Does this packet contain a request to change the interface + * speed? If so, remember it until we complete the transmission + * of this frame. + */ + if (speed != si->speed && speed != -1) + si->newspeed = speed; + + /* + * If this is an empty frame, we can bypass a lot. + */ + if (skb->len == 0) { + if (si->newspeed) { + si->newspeed = 0; + pxa_irda_set_speed(si, speed); + } + dev_kfree_skb(skb); + return 0; + } + + netif_stop_queue(dev); + + if (!IS_FIR(si)) { + si->tx_buff.data = si->tx_buff.head; + si->tx_buff.len = async_wrap_skb(skb, si->tx_buff.data, si->tx_buff.truesize); + + /* Disable STUART interrupts and switch to transmit mode. */ + STIER = 0; + STISR = IrSR_IR_TRANSMIT_ON | IrSR_XMODE_PULSE_1_6; + + /* enable STUART and transmit interrupts */ + STIER = IER_UUE | IER_TIE; + } else { + unsigned long mtt = irda_get_mtt(skb); + + si->dma_tx_buff_len = skb->len; + memcpy(si->dma_tx_buff, skb->data, skb->len); + + if (mtt) + while ((unsigned)(OSCR - si->last_oscr)/4 < mtt) + cpu_relax(); + + /* stop RX DMA, disable FICP */ + DCSR(si->rxdma) &= ~DCSR_RUN; + ICCR0 = 0; + + pxa_irda_fir_dma_tx_start(si); + ICCR0 = ICCR0_ITR | ICCR0_TXE; + } + + dev_kfree_skb(skb); + dev->trans_start = jiffies; + return 0; +} + +static int pxa_irda_ioctl(struct net_device *dev, struct ifreq *ifreq, int cmd) +{ + struct if_irda_req *rq = (struct if_irda_req *)ifreq; + struct pxa_irda *si = netdev_priv(dev); + int ret; + + switch (cmd) { + case SIOCSBANDWIDTH: + ret = -EPERM; + if (capable(CAP_NET_ADMIN)) { + /* + * We are unable to set the speed if the + * device is not running. + */ + if (netif_running(dev)) { + ret = pxa_irda_set_speed(si, + rq->ifr_baudrate); + } else { + printk(KERN_INFO "pxa_ir: SIOCSBANDWIDTH: !netif_running\n"); + ret = 0; + } + } + break; + + case SIOCSMEDIABUSY: + ret = -EPERM; + if (capable(CAP_NET_ADMIN)) { + irda_device_set_media_busy(dev, TRUE); + ret = 0; + } + break; + + case SIOCGRECEIVING: + ret = 0; + rq->ifr_receiving = IS_FIR(si) ? 0 + : si->rx_buff.state != OUTSIDE_FRAME; + break; + + default: + ret = -EOPNOTSUPP; + break; + } + + return ret; +} + +static struct net_device_stats *pxa_irda_stats(struct net_device *dev) +{ + struct pxa_irda *si = netdev_priv(dev); + return &si->stats; +} + +static void pxa_irda_startup(struct pxa_irda *si) +{ + /* Disable STUART interrupts */ + STIER = 0; + /* enable STUART interrupt to the processor */ + STMCR = MCR_OUT2; + /* configure SIR frame format: StartBit - Data 7 ... Data 0 - Stop Bit */ + STLCR = LCR_WLS0 | LCR_WLS1; + /* enable FIFO, we use FIFO to improve performance */ + STFCR = FCR_TRFIFOE | FCR_ITL_32; + + /* disable FICP */ + ICCR0 = 0; + /* configure FICP ICCR2 */ + ICCR2 = ICCR2_TXP | ICCR2_TRIG_32; + + /* configure DMAC */ + DRCMR17 = si->rxdma | DRCMR_MAPVLD; + DRCMR18 = si->txdma | DRCMR_MAPVLD; + + /* force SIR reinitialization */ + si->speed = 4000000; + pxa_irda_set_speed(si, 9600); + + printk(KERN_DEBUG "pxa_ir: irda startup\n"); +} + +static void pxa_irda_shutdown(struct pxa_irda *si) +{ + unsigned long flags; + + local_irq_save(flags); + + /* disable STUART and interrupt */ + STIER = 0; + /* disable STUART SIR mode */ + STISR = 0; + /* disable the STUART clock */ + pxa_set_cken(CKEN5_STUART, 0); + + /* disable DMA */ + DCSR(si->txdma) &= ~DCSR_RUN; + DCSR(si->rxdma) &= ~DCSR_RUN; + /* disable FICP */ + ICCR0 = 0; + /* disable the FICP clock */ + pxa_set_cken(CKEN13_FICP, 0); + + DRCMR17 = 0; + DRCMR18 = 0; + + local_irq_restore(flags); + + /* power off board transceiver */ + si->pdata->transceiver_mode(si->dev, IR_OFF); + + printk(KERN_DEBUG "pxa_ir: irda shutdown\n"); +} + +static int pxa_irda_start(struct net_device *dev) +{ + struct pxa_irda *si = netdev_priv(dev); + int err; + + si->speed = 9600; + + err = request_irq(IRQ_STUART, pxa_irda_sir_irq, 0, dev->name, dev); + if (err) + goto err_irq1; + + err = request_irq(IRQ_ICP, pxa_irda_fir_irq, 0, dev->name, dev); + if (err) + goto err_irq2; + + /* + * The interrupt must remain disabled for now. + */ + disable_irq(IRQ_STUART); + disable_irq(IRQ_ICP); + + err = -EBUSY; + si->rxdma = pxa_request_dma("FICP_RX",DMA_PRIO_LOW, pxa_irda_fir_dma_rx_irq, dev); + if (si->rxdma < 0) + goto err_rx_dma; + + si->txdma = pxa_request_dma("FICP_TX",DMA_PRIO_LOW, pxa_irda_fir_dma_tx_irq, dev); + if (si->txdma < 0) + goto err_tx_dma; + + err = -ENOMEM; + si->dma_rx_buff = dma_alloc_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, + &si->dma_rx_buff_phy, GFP_KERNEL ); + if (!si->dma_rx_buff) + goto err_dma_rx_buff; + + si->dma_tx_buff = dma_alloc_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, + &si->dma_tx_buff_phy, GFP_KERNEL ); + if (!si->dma_tx_buff) + goto err_dma_tx_buff; + + /* Setup the serial port for the initial speed. */ + pxa_irda_startup(si); + + /* + * Open a new IrLAP layer instance. + */ + si->irlap = irlap_open(dev, &si->qos, "pxa"); + err = -ENOMEM; + if (!si->irlap) + goto err_irlap; + + /* + * Now enable the interrupt and start the queue + */ + enable_irq(IRQ_STUART); + enable_irq(IRQ_ICP); + netif_start_queue(dev); + + printk(KERN_DEBUG "pxa_ir: irda driver opened\n"); + + return 0; + +err_irlap: + pxa_irda_shutdown(si); + dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_tx_buff, si->dma_tx_buff_phy); +err_dma_tx_buff: + dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_rx_buff, si->dma_rx_buff_phy); +err_dma_rx_buff: + pxa_free_dma(si->txdma); +err_tx_dma: + pxa_free_dma(si->rxdma); +err_rx_dma: + free_irq(IRQ_ICP, dev); +err_irq2: + free_irq(IRQ_STUART, dev); +err_irq1: + + return err; +} + +static int pxa_irda_stop(struct net_device *dev) +{ + struct pxa_irda *si = netdev_priv(dev); + + netif_stop_queue(dev); + + pxa_irda_shutdown(si); + + /* Stop IrLAP */ + if (si->irlap) { + irlap_close(si->irlap); + si->irlap = NULL; + } + + free_irq(IRQ_STUART, dev); + free_irq(IRQ_ICP, dev); + + pxa_free_dma(si->rxdma); + pxa_free_dma(si->txdma); + + if (si->dma_rx_buff) + dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_tx_buff, si->dma_tx_buff_phy); + if (si->dma_tx_buff) + dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_rx_buff, si->dma_rx_buff_phy); + + printk(KERN_DEBUG "pxa_ir: irda driver closed\n"); + return 0; +} + +static int pxa_irda_suspend(struct device *_dev, pm_message_t state, u32 level) +{ + struct net_device *dev = dev_get_drvdata(_dev); + struct pxa_irda *si; + + if (!dev || level != SUSPEND_DISABLE) + return 0; + + if (netif_running(dev)) { + si = netdev_priv(dev); + netif_device_detach(dev); + pxa_irda_shutdown(si); + } + + return 0; +} + +static int pxa_irda_resume(struct device *_dev, u32 level) +{ + struct net_device *dev = dev_get_drvdata(_dev); + struct pxa_irda *si; + + if (!dev || level != RESUME_ENABLE) + return 0; + + if (netif_running(dev)) { + si = netdev_priv(dev); + pxa_irda_startup(si); + netif_device_attach(dev); + netif_wake_queue(dev); + } + + return 0; +} + + +static int pxa_irda_init_iobuf(iobuff_t *io, int size) +{ + io->head = kmalloc(size, GFP_KERNEL | GFP_DMA); + if (io->head != NULL) { + io->truesize = size; + io->in_frame = FALSE; + io->state = OUTSIDE_FRAME; + io->data = io->head; + } + return io->head ? 0 : -ENOMEM; +} + +static int pxa_irda_probe(struct device *_dev) +{ + struct platform_device *pdev = to_platform_device(_dev); + struct net_device *dev; + struct pxa_irda *si; + unsigned int baudrate_mask; + int err; + + if (!pdev->dev.platform_data) + return -ENODEV; + + err = request_mem_region(__PREG(STUART), 0x24, "IrDA") ? 0 : -EBUSY; + if (err) + goto err_mem_1; + + err = request_mem_region(__PREG(FICP), 0x1c, "IrDA") ? 0 : -EBUSY; + if (err) + goto err_mem_2; + + dev = alloc_irdadev(sizeof(struct pxa_irda)); + if (!dev) + goto err_mem_3; + + si = netdev_priv(dev); + si->dev = &pdev->dev; + si->pdata = pdev->dev.platform_data; + + /* + * Initialise the SIR buffers + */ + err = pxa_irda_init_iobuf(&si->rx_buff, 14384); + if (err) + goto err_mem_4; + err = pxa_irda_init_iobuf(&si->tx_buff, 4000); + if (err) + goto err_mem_5; + + dev->hard_start_xmit = pxa_irda_hard_xmit; + dev->open = pxa_irda_start; + dev->stop = pxa_irda_stop; + dev->do_ioctl = pxa_irda_ioctl; + dev->get_stats = pxa_irda_stats; + + irda_init_max_qos_capabilies(&si->qos); + + baudrate_mask = 0; + if (si->pdata->transceiver_cap & IR_SIRMODE) + baudrate_mask |= IR_9600|IR_19200|IR_38400|IR_57600|IR_115200; + if (si->pdata->transceiver_cap & IR_FIRMODE) + baudrate_mask |= IR_4000000 << 8; + + si->qos.baud_rate.bits &= baudrate_mask; + si->qos.min_turn_time.bits = 7; /* 1ms or more */ + + irda_qos_bits_to_value(&si->qos); + + err = register_netdev(dev); + + if (err == 0) + dev_set_drvdata(&pdev->dev, dev); + + if (err) { + kfree(si->tx_buff.head); +err_mem_5: + kfree(si->rx_buff.head); +err_mem_4: + free_netdev(dev); +err_mem_3: + release_mem_region(__PREG(FICP), 0x1c); +err_mem_2: + release_mem_region(__PREG(STUART), 0x24); + } +err_mem_1: + return err; +} + +static int pxa_irda_remove(struct device *_dev) +{ + struct net_device *dev = dev_get_drvdata(_dev); + + if (dev) { + struct pxa_irda *si = netdev_priv(dev); + unregister_netdev(dev); + kfree(si->tx_buff.head); + kfree(si->rx_buff.head); + free_netdev(dev); + } + + release_mem_region(__PREG(STUART), 0x24); + release_mem_region(__PREG(FICP), 0x1c); + + return 0; +} + +static struct device_driver pxa_ir_driver = { + .name = "pxa2xx-ir", + .bus = &platform_bus_type, + .probe = pxa_irda_probe, + .remove = pxa_irda_remove, + .suspend = pxa_irda_suspend, + .resume = pxa_irda_resume, +}; + +static int __init pxa_irda_init(void) +{ + return driver_register(&pxa_ir_driver); +} + +static void __exit pxa_irda_exit(void) +{ + driver_unregister(&pxa_ir_driver); +} + +module_init(pxa_irda_init); +module_exit(pxa_irda_exit); + +MODULE_LICENSE("GPL"); diff --git a/drivers/pcmcia/sa1111_generic.c b/drivers/pcmcia/sa1111_generic.c index bb90a1448a5..81ded52c895 100644 --- a/drivers/pcmcia/sa1111_generic.c +++ b/drivers/pcmcia/sa1111_generic.c @@ -122,7 +122,7 @@ void sa1111_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt) static int pcmcia_probe(struct sa1111_dev *dev) { - char *base; + void __iomem *base; if (!request_mem_region(dev->res.start, 512, SA1111_DRIVER_NAME(dev))) diff --git a/drivers/serial/amba-pl010.c b/drivers/serial/amba-pl010.c index 679e678c7e6..ddd0307fece 100644 --- a/drivers/serial/amba-pl010.c +++ b/drivers/serial/amba-pl010.c @@ -50,6 +50,7 @@ #include <asm/io.h> #include <asm/irq.h> +#include <asm/hardware.h> #include <asm/hardware/amba.h> #include <asm/hardware/amba_serial.h> diff --git a/drivers/serial/amba-pl011.c b/drivers/serial/amba-pl011.c index 1ff629c7475..938d185841c 100644 --- a/drivers/serial/amba-pl011.c +++ b/drivers/serial/amba-pl011.c @@ -50,6 +50,7 @@ #include <asm/io.h> #include <asm/irq.h> +#include <asm/sizes.h> #include <asm/hardware/amba.h> #include <asm/hardware/clock.h> #include <asm/hardware/amba_serial.h> diff --git a/drivers/serial/clps711x.c b/drivers/serial/clps711x.c index 87ef368384f..6a67e8f585b 100644 --- a/drivers/serial/clps711x.c +++ b/drivers/serial/clps711x.c @@ -408,7 +408,11 @@ static struct uart_port clps711x_ports[UART_NR] = { { .iobase = SYSCON1, .irq = IRQ_UTXINT1, /* IRQ_URXINT1, IRQ_UMSINT */ +#ifdef CONFIG_MP1000_90MHZ + .uartclk = 4515840, +#else .uartclk = 3686400, +#endif .fifosize = 16, .ops = &clps711x_pops, .line = 0, @@ -417,7 +421,11 @@ static struct uart_port clps711x_ports[UART_NR] = { { .iobase = SYSCON2, .irq = IRQ_UTXINT2, /* IRQ_URXINT2 */ +#ifdef CONFIG_MP1000_90MHZ + .uartclk = 4515840, +#else .uartclk = 3686400, +#endif .fifosize = 16, .ops = &clps711x_pops, .line = 1, @@ -551,6 +559,7 @@ console_initcall(clps711xuart_console_init); static struct uart_driver clps711x_reg = { .driver_name = "ttyCL", .dev_name = "ttyCL", + .devfs_name = "ttyCL", .major = SERIAL_CLPS711X_MAJOR, .minor = SERIAL_CLPS711X_MINOR, .nr = UART_NR, diff --git a/drivers/serial/pxa.c b/drivers/serial/pxa.c index 90c2a86c421..005f027e081 100644 --- a/drivers/serial/pxa.c +++ b/drivers/serial/pxa.c @@ -358,6 +358,9 @@ static int serial_pxa_startup(struct uart_port *port) unsigned long flags; int retval; + if (port->line == 3) /* HWUART */ + up->mcr |= UART_MCR_AFE; + else up->mcr = 0; /* @@ -481,8 +484,10 @@ serial_pxa_set_termios(struct uart_port *port, struct termios *termios, if ((up->port.uartclk / quot) < (2400 * 16)) fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1; - else + else if ((up->port.uartclk / quot) < (230400 * 16)) fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8; + else + fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32; /* * Ok, we're now changing the port state. Do it with @@ -772,6 +777,20 @@ static struct uart_pxa_port serial_pxa_ports[] = { .ops = &serial_pxa_pops, .line = 2, }, + }, { /* HWUART */ + .name = "HWUART", + .cken = CKEN4_HWUART, + .port = { + .type = PORT_PXA, + .iotype = UPIO_MEM, + .membase = (void *)&HWUART, + .mapbase = __PREG(HWUART), + .irq = IRQ_HWUART, + .uartclk = 921600 * 16, + .fifosize = 64, + .ops = &serial_pxa_pops, + .line = 3, + }, } }; diff --git a/drivers/usb/gadget/pxa2xx_udc.c b/drivers/usb/gadget/pxa2xx_udc.c index 6e545393cff..3d4d89c371e 100644 --- a/drivers/usb/gadget/pxa2xx_udc.c +++ b/drivers/usb/gadget/pxa2xx_udc.c @@ -422,7 +422,7 @@ static inline void ep0_idle (struct pxa2xx_udc *dev) } static int -write_packet(volatile unsigned long *uddr, struct pxa2xx_request *req, unsigned max) +write_packet(volatile u32 *uddr, struct pxa2xx_request *req, unsigned max) { u8 *buf; unsigned length, count; diff --git a/drivers/usb/gadget/pxa2xx_udc.h b/drivers/usb/gadget/pxa2xx_udc.h index a58f3e6e71f..19a883f7d1b 100644 --- a/drivers/usb/gadget/pxa2xx_udc.h +++ b/drivers/usb/gadget/pxa2xx_udc.h @@ -69,11 +69,11 @@ struct pxa2xx_ep { * UDDR = UDC Endpoint Data Register (the fifo) * DRCM = DMA Request Channel Map */ - volatile unsigned long *reg_udccs; - volatile unsigned long *reg_ubcr; - volatile unsigned long *reg_uddr; + volatile u32 *reg_udccs; + volatile u32 *reg_ubcr; + volatile u32 *reg_uddr; #ifdef USE_DMA - volatile unsigned long *reg_drcmr; + volatile u32 *reg_drcmr; #define drcmr(n) .reg_drcmr = & DRCMR ## n , #else #define drcmr(n) diff --git a/drivers/video/amba-clcd.c b/drivers/video/amba-clcd.c index 321dbe91dc1..cde6fd8eb39 100644 --- a/drivers/video/amba-clcd.c +++ b/drivers/video/amba-clcd.c @@ -22,6 +22,7 @@ #include <linux/ioport.h> #include <linux/list.h> +#include <asm/sizes.h> #include <asm/hardware/amba.h> #include <asm/hardware/clock.h> diff --git a/include/asm-arm/arch-aaec2000/aaec2000.h b/include/asm-arm/arch-aaec2000/aaec2000.h index 0e9b7e18af0..002227924b9 100644 --- a/include/asm-arm/arch-aaec2000/aaec2000.h +++ b/include/asm-arm/arch-aaec2000/aaec2000.h @@ -17,6 +17,16 @@ #error You must include hardware.h not this file #endif /* __ASM_ARCH_HARDWARE_H */ +/* Chip selects */ +#define AAEC_CS0 0x00000000 +#define AAEC_CS1 0x10000000 +#define AAEC_CS2 0x20000000 +#define AAEC_CS3 0x30000000 + +/* Flash */ +#define AAEC_FLASH_BASE AAEC_CS0 +#define AAEC_FLASH_SIZE SZ_64M + /* Interrupt controller */ #define IRQ_BASE __REG(0x80000500) #define IRQ_INTSR __REG(0x80000500) /* Int Status Register */ @@ -148,4 +158,50 @@ #define POWER_STFCLR __REG(0x8000041c) /* NbFlg, RSTFlg, PFFlg, CLDFlg Clear */ #define POWER_CLKSET __REG(0x80000420) /* Clock Speed Control */ +/* GPIO Registers */ +#define AAEC_GPIO_PHYS 0x80000e00 + +#define AAEC_GPIO_PADR __REG(AAEC_GPIO_PHYS + 0x00) +#define AAEC_GPIO_PBDR __REG(AAEC_GPIO_PHYS + 0x04) +#define AAEC_GPIO_PCDR __REG(AAEC_GPIO_PHYS + 0x08) +#define AAEC_GPIO_PDDR __REG(AAEC_GPIO_PHYS + 0x0c) +#define AAEC_GPIO_PADDR __REG(AAEC_GPIO_PHYS + 0x10) +#define AAEC_GPIO_PBDDR __REG(AAEC_GPIO_PHYS + 0x14) +#define AAEC_GPIO_PCDDR __REG(AAEC_GPIO_PHYS + 0x18) +#define AAEC_GPIO_PDDDR __REG(AAEC_GPIO_PHYS + 0x1c) +#define AAEC_GPIO_PEDR __REG(AAEC_GPIO_PHYS + 0x20) +#define AAEC_GPIO_PEDDR __REG(AAEC_GPIO_PHYS + 0x24) +#define AAEC_GPIO_KSCAN __REG(AAEC_GPIO_PHYS + 0x28) +#define AAEC_GPIO_PINMUX __REG(AAEC_GPIO_PHYS + 0x2c) +#define AAEC_GPIO_PFDR __REG(AAEC_GPIO_PHYS + 0x30) +#define AAEC_GPIO_PFDDR __REG(AAEC_GPIO_PHYS + 0x34) +#define AAEC_GPIO_PGDR __REG(AAEC_GPIO_PHYS + 0x38) +#define AAEC_GPIO_PGDDR __REG(AAEC_GPIO_PHYS + 0x3c) +#define AAEC_GPIO_PHDR __REG(AAEC_GPIO_PHYS + 0x40) +#define AAEC_GPIO_PHDDR __REG(AAEC_GPIO_PHYS + 0x44) +#define AAEC_GPIO_RAZ __REG(AAEC_GPIO_PHYS + 0x48) +#define AAEC_GPIO_INTTYPE1 __REG(AAEC_GPIO_PHYS + 0x4c) +#define AAEC_GPIO_INTTYPE2 __REG(AAEC_GPIO_PHYS + 0x50) +#define AAEC_GPIO_FEOI __REG(AAEC_GPIO_PHYS + 0x54) +#define AAEC_GPIO_INTEN __REG(AAEC_GPIO_PHYS + 0x58) +#define AAEC_GPIO_INTSTATUS __REG(AAEC_GPIO_PHYS + 0x5c) +#define AAEC_GPIO_RAWINTSTATUS __REG(AAEC_GPIO_PHYS + 0x60) +#define AAEC_GPIO_DB __REG(AAEC_GPIO_PHYS + 0x64) +#define AAEC_GPIO_PAPINDR __REG(AAEC_GPIO_PHYS + 0x68) +#define AAEC_GPIO_PBPINDR __REG(AAEC_GPIO_PHYS + 0x6c) +#define AAEC_GPIO_PCPINDR __REG(AAEC_GPIO_PHYS + 0x70) +#define AAEC_GPIO_PDPINDR __REG(AAEC_GPIO_PHYS + 0x74) +#define AAEC_GPIO_PEPINDR __REG(AAEC_GPIO_PHYS + 0x78) +#define AAEC_GPIO_PFPINDR __REG(AAEC_GPIO_PHYS + 0x7c) +#define AAEC_GPIO_PGPINDR __REG(AAEC_GPIO_PHYS + 0x80) +#define AAEC_GPIO_PHPINDR __REG(AAEC_GPIO_PHYS + 0x84) + +#define AAEC_GPIO_PINMUX_PE0CON (1 << 0) +#define AAEC_GPIO_PINMUX_PD0CON (1 << 1) +#define AAEC_GPIO_PINMUX_CODECON (1 << 2) +#define AAEC_GPIO_PINMUX_UART3CON (1 << 3) + +/* LCD Controller */ +#define AAEC_CLCD_PHYS 0x80003000 + #endif /* __ARM_ARCH_AAEC2000_H */ diff --git a/include/asm-arm/arch-aaec2000/aaed2000.h b/include/asm-arm/arch-aaec2000/aaed2000.h new file mode 100644 index 00000000000..bc76d2badb9 --- /dev/null +++ b/include/asm-arm/arch-aaec2000/aaed2000.h @@ -0,0 +1,40 @@ +/* + * linux/include/asm-arm/arch-aaec2000/aaed2000.h + * + * AAED-2000 specific bits definition + * + * Copyright (c) 2005 Nicolas Bellido Y Ortega + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_AAED2000_H +#define __ASM_ARCH_AAED2000_H + +/* External GPIOs. */ + +#define EXT_GPIO_PBASE AAEC_CS3 +#define EXT_GPIO_VBASE 0xf8100000 +#define EXT_GPIO_LENGTH 0x00001000 + +#define __ext_gpio_p2v(x) ((x) - EXT_GPIO_PBASE + EXT_GPIO_VBASE) +#define __ext_gpio_v2p(x) ((x) + EXT_GPIO_PBASE - EXT_GPIO_VBASE) + +#define __EXT_GPIO_REG(x) (*((volatile u32 *)__ext_gpio_p2v(x))) +#define __EXT_GPIO_PREG(x) (__ext_gpio_v2p((u32)&(x))) + +#define AAED_EXT_GPIO __EXT_GPIO_REG(EXT_GPIO_PBASE) + +#define AAED_EGPIO_KBD_SCAN 0x00003fff /* Keyboard scan data */ +#define AAED_EGPIO_PWR_INT 0x00008fff /* Smart battery charger interrupt */ +#define AAED_EGPIO_SWITCHED 0x000f0000 /* DIP Switches */ +#define AAED_EGPIO_USB_VBUS 0x00400000 /* USB Vbus sense */ +#define AAED_EGPIO_LCD_PWR_EN 0x02000000 /* LCD and backlight PWR enable */ +#define AAED_EGPIO_nLED0 0x20000000 /* LED 0 */ +#define AAED_EGPIO_nLED1 0x20000000 /* LED 1 */ +#define AAED_EGPIO_nLED2 0x20000000 /* LED 2 */ + + +#endif /* __ARM_ARCH_AAED2000_H */ diff --git a/include/asm-arm/arch-aaec2000/hardware.h b/include/asm-arm/arch-aaec2000/hardware.h index 4c37219e030..153506fd06e 100644 --- a/include/asm-arm/arch-aaec2000/hardware.h +++ b/include/asm-arm/arch-aaec2000/hardware.h @@ -11,7 +11,8 @@ #ifndef __ASM_ARCH_HARDWARE_H #define __ASM_ARCH_HARDWARE_H -#include <linux/config.h> +#include <asm/sizes.h> +#include <asm/arch/aaec2000.h> /* The kernel is loaded at physical address 0xf8000000. * We map the IO space a bit after diff --git a/include/asm-arm/arch-aaec2000/io.h b/include/asm-arm/arch-aaec2000/io.h index c58a8d10425..8d67907fd4f 100644 --- a/include/asm-arm/arch-aaec2000/io.h +++ b/include/asm-arm/arch-aaec2000/io.h @@ -6,6 +6,8 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include <asm/hardware.h> + #define IO_SPACE_LIMIT 0xffffffff /* diff --git a/include/asm-arm/arch-cl7500/io.h b/include/asm-arm/arch-cl7500/io.h index f0113bc7563..89a33287f4f 100644 --- a/include/asm-arm/arch-cl7500/io.h +++ b/include/asm-arm/arch-cl7500/io.h @@ -10,6 +10,8 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include <asm/hardware.h> + #define IO_SPACE_LIMIT 0xffffffff /* diff --git a/include/asm-arm/arch-clps711x/hardware.h b/include/asm-arm/arch-clps711x/hardware.h index 1386871e1a5..f864c367c93 100644 --- a/include/asm-arm/arch-clps711x/hardware.h +++ b/include/asm-arm/arch-clps711x/hardware.h @@ -235,4 +235,121 @@ #define CEIVA_PB0_BLK_BTN (1<<0) #endif // #if defined (CONFIG_ARCH_CEIVA) +#if defined (CONFIG_MACH_MP1000) +/* NOR FLASH */ +#define MP1000_NIO_BASE 0xf9000000 /* virtual */ +#define MP1000_NIO_START CS0_PHYS_BASE /* physical */ +#define MP1000_NIO_SIZE 0x00400000 + +/* DSP Interface */ +#define MP1000_DSP_BASE 0xfa000000 /* virtual */ +#define MP1000_DSP_START CS1_PHYS_BASE /* physical */ +#define MP1000_DSP_SIZE 0x00100000 + +/* LCD, DAA/DSP, RTC, DAA RW Reg all in CS2 */ +#define MP1000_LIO_BASE 0xfb000000 /* virtual */ +#define MP1000_LIO_START CS2_PHYS_BASE /* physical */ +#define MP1000_LIO_SIZE 0x00100000 + +/* NAND FLASH */ +#define MP1000_FIO_BASE 0xfc000000 /* virtual */ +#define MP1000_FIO_START CS3_PHYS_BASE /* physical */ +#define MP1000_FIO_SIZE 0x00800000 + +/* Ethernet */ +#define MP1000_EIO_BASE 0xfd000000 /* virtual */ +#define MP1000_EIO_START CS4_PHYS_BASE /* physical */ +#define MP1000_EIO_SIZE 0x00100000 + +#define MP1000_LCD_OFFSET 0x00000000 /* LCD offset in CS2 */ +#define MP1000_DDD_OFFSET 0x00001000 /* DAA/DAI/DSP sft reset offst*/ +#define MP1000_RTC_OFFSET 0x00002000 /* RTC offset in CS2 */ +#define MP1000_DAA_OFFSET 0x00003000 /* DAA RW reg offset in CS2 */ + +/* IDE */ +#define MP1000_IDE_BASE 0xfe000000 /* virtual */ +#define MP1000_IDE_START CS5_PHYS_BASE /* physical */ +#define MP1000_IDE_SIZE 0x00100000 /* actually it's only 0x1000 */ + +#define IRQ_HARDDISK IRQ_EINT2 + +/* + * IDE registers definition + */ + +#define IDE_CONTROL_BASE (MP1000_IDE_BASE + 0x1000) +#define IDE_BASE_OFF (MP1000_IDE_BASE) + +#define IDE_WRITE_DEVICE_DATA (IDE_BASE_OFF + 0x0) +#define IDE_FEATURES_REGISTER (IDE_BASE_OFF + 0x2) +#define IDE_SECTOR_COUNT_REGISTER (IDE_BASE_OFF + 0x4) +#define IDE_SECTOR_NUMBER_REGISTER (IDE_BASE_OFF + 0x6) +#define IDE_CYLINDER_LOW_REGISTER (IDE_BASE_OFF + 0x8) +#define IDE_CYLINDER_HIGH_REGISTER (IDE_BASE_OFF + 0xa) +#define IDE_DEVICE_HEAD_REGISTER (IDE_BASE_OFF + 0xc) +#define IDE_COMMAND_DATA_REGISTER (IDE_BASE_OFF + 0xe) +#define IDE_DEVICE_CONTROL_REGISTER (IDE_CONTROL_BASE + 0xc) + +#define IDE_IRQ IRQ_EINT2 + + +#define RTC_PORT(x) (MP1000_LIO_BASE+0x2000 + (x*2)) +#define RTC_ALWAYS_BCD 0 + +/* +// Definitions of the bit fields in the HwPortA register for the +// MP1000 board. +*/ +#define HwPortAKeyboardRow1 0x00000001 +#define HwPortAKeyboardRow2 0x00000002 +#define HwPortAKeyboardRow3 0x00000004 +#define HwPortAKeyboardRow4 0x00000008 +#define HwPortAKeyboardRow5 0x00000010 +#define HwPortAKeyboardRow6 0x00000020 +#define HwPortALCDEnable 0x00000040 +#define HwPortAOffhook 0x00000080 + +/* +// Definitions of the bit fields in the HwPortB register for the +// MP1000 board. +*/ +#define HwPortBL3Mode 0x00000001 +#define HwPortBL3Clk 0x00000002 +#define HwPortBSClk 0x00000001 +#define HwPortBSData 0x00000002 +#define HwPortBL3Data 0x00000004 +#define HwPortBMute 0x00000008 +#define HwPortBQD0 0x00000010 +#define HwPortBQD1 0x00000020 +#define HwPortBQD2 0x00000040 +#define HwPortBQD3 0x00000080 + +/* +// Definitions of the bit fields in the HwPortD register for the +// MP1000 board. +*/ +#define HwPortDLED1 0x00000001 +#define HwPortDLED2 0x00000002 +#define HwPortDLED3 0x00000004 +#define HwPortDLED4 0x00000008 +#define HwPortDLED5 0x00000010 +#define HwPortDEECS 0x00000020 +#define HwPortBRTS 0x00000040 +#define HwPortBRI 0x00000080 + + +/* +// Definitions of the bit fields in the HwPortE register for the +// MP1000 board. +*/ + +#define HwPortECLE 0x00000001 +#define HwPortESepromDOut 0x00000001 +#define HwPortEALE 0x00000002 +#define HwPortESepromDIn 0x00000002 +#define HwPortENANDCS 0x00000004 +#define HwPortESepromCLK 0x00000004 + +#endif // #if defined (CONFIG_MACH_MP1000) + #endif diff --git a/include/asm-arm/arch-clps711x/io.h b/include/asm-arm/arch-clps711x/io.h index 14d7e8da545..62613b0e2d9 100644 --- a/include/asm-arm/arch-clps711x/io.h +++ b/include/asm-arm/arch-clps711x/io.h @@ -20,6 +20,8 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include <asm/hardware.h> + #define IO_SPACE_LIMIT 0xffffffff #define __io(a) ((void __iomem *)(a)) diff --git a/include/asm-arm/arch-clps711x/mp1000-seprom.h b/include/asm-arm/arch-clps711x/mp1000-seprom.h new file mode 100644 index 00000000000..3e5566cf966 --- /dev/null +++ b/include/asm-arm/arch-clps711x/mp1000-seprom.h @@ -0,0 +1,77 @@ +#ifndef MP1000_SEPROM_H +#define MP1000_SEPROM_H + +/* + * mp1000-seprom.h + * + * + * This file contains the Serial EEPROM definitions for the MP1000 board + * + * Copyright (C) 2005 Comdial Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#define COMMAND_ERASE (0x1C0) +#define COMMAND_ERASE_ALL (0x120) +#define COMMAND_WRITE_DISABLE (0x100) +#define COMMAND_WRITE_ENABLE (0x130) +#define COMMAND_READ (0x180) +#define COMMAND_WRITE (0x140) +#define COMMAND_WRITE_ALL (0x110) + +// +// Serial EEPROM data format +// + +#define PACKED __attribute__ ((packed)) + +typedef struct _EEPROM { + union { + unsigned char eprom_byte_data[128]; + unsigned short eprom_short_data[64]; + struct { + unsigned char version PACKED; // EEPROM Version "1" for now + unsigned char box_id PACKED; // Box ID (Standalone, SOHO, embedded, etc) + unsigned char major_hw_version PACKED; // Major Hardware version (Hex) + unsigned char minor_hw_version PACKED; // Minor Hardware Version (Hex) + unsigned char mfg_id[3] PACKED; // Manufacturer ID (3 character Alphabetic) + unsigned char mfg_serial_number[10] PACKED; // Manufacturer Serial number + unsigned char mfg_date[3] PACKED; // Date of Mfg (Formatted YY:MM:DD) + unsigned char country PACKED; // Country of deployment + unsigned char mac_Address[6] PACKED; // MAC Address + unsigned char oem_string[20] PACKED; // OEM ID string + unsigned short feature_bits1 PACKED; // Feature Bits 1 + unsigned short feature_bits2 PACKED; // Feature Bits 2 + unsigned char filler[75] PACKED; // Unused/Undefined “0” initialized + unsigned short checksum PACKED; // byte accumulated short checksum + } eprom_struct; + } variant; +} eeprom_struct; + +/* These settings must be mutually exclusive */ +#define FEATURE_BITS1_DRAMSIZE_16MEG 0x0001 /* 0 signifies 4 MEG system */ +#define FEATURE_BITS1_DRAMSIZE_8MEG 0x0002 /* 1 in bit 1 = 8MEG system */ +#define FEATURE_BITS1_DRAMSIZE_64MEG 0x0004 /* 1 in bit 2 = 64MEG system */ + +#define FEATURE_BITS1_CPUIS90MEG 0x0010 + +extern void seprom_init(void); +extern eeprom_struct* get_seprom_ptr(void); +extern unsigned char* get_eeprom_mac_address(void); + +#endif /* MP1000_SEPROM_H */ + diff --git a/include/asm-arm/arch-ebsa285/io.h b/include/asm-arm/arch-ebsa285/io.h index 70576b17f92..776f9d37705 100644 --- a/include/asm-arm/arch-ebsa285/io.h +++ b/include/asm-arm/arch-ebsa285/io.h @@ -14,6 +14,8 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include <asm/hardware.h> + #define IO_SPACE_LIMIT 0xffff /* diff --git a/include/asm-arm/arch-epxa10db/io.h b/include/asm-arm/arch-epxa10db/io.h index 1f0afa25762..9fe100c9d6b 100644 --- a/include/asm-arm/arch-epxa10db/io.h +++ b/include/asm-arm/arch-epxa10db/io.h @@ -20,6 +20,8 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include <asm/hardware.h> + #define IO_SPACE_LIMIT 0xffff diff --git a/include/asm-arm/arch-h720x/io.h b/include/asm-arm/arch-h720x/io.h index 68814828c9a..d3ccfd8172b 100644 --- a/include/asm-arm/arch-h720x/io.h +++ b/include/asm-arm/arch-h720x/io.h @@ -14,7 +14,7 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H -#include <asm/arch/hardware.h> +#include <asm/hardware.h> #define IO_SPACE_LIMIT 0xffffffff diff --git a/include/asm-arm/arch-imx/io.h b/include/asm-arm/arch-imx/io.h index 28a4cca6a4c..b191cdd0557 100644 --- a/include/asm-arm/arch-imx/io.h +++ b/include/asm-arm/arch-imx/io.h @@ -20,6 +20,8 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include <asm/hardware.h> + #define IO_SPACE_LIMIT 0xffffffff #define __io(a) ((void __iomem *)(a)) diff --git a/include/asm-arm/arch-integrator/hardware.h b/include/asm-arm/arch-integrator/hardware.h index be2716eeaa0..6f0947bc500 100644 --- a/include/asm-arm/arch-integrator/hardware.h +++ b/include/asm-arm/arch-integrator/hardware.h @@ -33,15 +33,6 @@ #define IO_SIZE 0x0B000000 // How much? #define IO_START INTEGRATOR_HDR_BASE // PA of IO -/* - * Similar to above, but for PCI addresses (memory, IO, Config and the - * V3 chip itself). WARNING: this has to mirror definitions in platform.h - */ -#define PCI_MEMORY_VADDR 0xe8000000 -#define PCI_CONFIG_VADDR 0xec000000 -#define PCI_V3_VADDR 0xed000000 -#define PCI_IO_VADDR 0xee000000 - #define PCIO_BASE PCI_IO_VADDR #define PCIMEM_BASE PCI_MEMORY_VADDR diff --git a/include/asm-arm/arch-integrator/io.h b/include/asm-arm/arch-integrator/io.h index fbea8be67d2..31f2deab51b 100644 --- a/include/asm-arm/arch-integrator/io.h +++ b/include/asm-arm/arch-integrator/io.h @@ -22,6 +22,14 @@ #define IO_SPACE_LIMIT 0xffff +/* + * WARNING: this has to mirror definitions in platform.h + */ +#define PCI_MEMORY_VADDR 0xe8000000 +#define PCI_CONFIG_VADDR 0xec000000 +#define PCI_V3_VADDR 0xed000000 +#define PCI_IO_VADDR 0xee000000 + #define __io(a) ((void __iomem *)(PCI_IO_VADDR + (a))) #define __mem_pci(a) (a) #define __mem_isa(a) ((a) + PCI_MEMORY_VADDR) diff --git a/include/asm-arm/arch-iop3xx/io.h b/include/asm-arm/arch-iop3xx/io.h index 2761dfd8694..f39046a6ab1 100644 --- a/include/asm-arm/arch-iop3xx/io.h +++ b/include/asm-arm/arch-iop3xx/io.h @@ -11,6 +11,8 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include <asm/hardware.h> + #define IO_SPACE_LIMIT 0xffffffff #define __io(p) ((void __iomem *)(p)) diff --git a/include/asm-arm/arch-ixp2000/io.h b/include/asm-arm/arch-ixp2000/io.h index 3241cd6f077..7fbcdf9931e 100644 --- a/include/asm-arm/arch-ixp2000/io.h +++ b/include/asm-arm/arch-ixp2000/io.h @@ -15,6 +15,8 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include <asm/hardware.h> + #define IO_SPACE_LIMIT 0xffffffff #define __mem_pci(a) (a) diff --git a/include/asm-arm/arch-ixp2000/ixp2000-regs.h b/include/asm-arm/arch-ixp2000/ixp2000-regs.h index 32aece06986..def089d693d 100644 --- a/include/asm-arm/arch-ixp2000/ixp2000-regs.h +++ b/include/asm-arm/arch-ixp2000/ixp2000-regs.h @@ -392,4 +392,47 @@ #define WDT_RESET_ENABLE 0x01000000 +/* + * MSF registers. The IXP2400 and IXP2800 have somewhat different MSF + * units, but the registers that differ between the two don't overlap, + * so we can have one register list for both. + */ +#define IXP2000_MSF_REG(x) ((volatile unsigned long*)(IXP2000_MSF_VIRT_BASE + (x))) +#define IXP2000_MSF_RX_CONTROL IXP2000_MSF_REG(0x0000) +#define IXP2000_MSF_TX_CONTROL IXP2000_MSF_REG(0x0004) +#define IXP2000_MSF_INTERRUPT_STATUS IXP2000_MSF_REG(0x0008) +#define IXP2000_MSF_INTERRUPT_ENABLE IXP2000_MSF_REG(0x000c) +#define IXP2000_MSF_CSIX_TYPE_MAP IXP2000_MSF_REG(0x0010) +#define IXP2000_MSF_FC_EGRESS_STATUS IXP2000_MSF_REG(0x0014) +#define IXP2000_MSF_FC_INGRESS_STATUS IXP2000_MSF_REG(0x0018) +#define IXP2000_MSF_HWM_CONTROL IXP2000_MSF_REG(0x0024) +#define IXP2000_MSF_FC_STATUS_OVERRIDE IXP2000_MSF_REG(0x0028) +#define IXP2000_MSF_CLOCK_CONTROL IXP2000_MSF_REG(0x002c) +#define IXP2000_MSF_RX_PORT_MAP IXP2000_MSF_REG(0x0040) +#define IXP2000_MSF_RBUF_ELEMENT_DONE IXP2000_MSF_REG(0x0044) +#define IXP2000_MSF_RX_MPHY_POLL_LIMIT IXP2000_MSF_REG(0x0048) +#define IXP2000_MSF_RX_CALENDAR_LENGTH IXP2000_MSF_REG(0x0048) +#define IXP2000_MSF_RX_THREAD_FREELIST_TIMEOUT_0 IXP2000_MSF_REG(0x0050) +#define IXP2000_MSF_RX_THREAD_FREELIST_TIMEOUT_1 IXP2000_MSF_REG(0x0054) +#define IXP2000_MSF_RX_THREAD_FREELIST_TIMEOUT_2 IXP2000_MSF_REG(0x0058) +#define IXP2000_MSF_TX_SEQUENCE_0 IXP2000_MSF_REG(0x0060) +#define IXP2000_MSF_TX_SEQUENCE_1 IXP2000_MSF_REG(0x0064) +#define IXP2000_MSF_TX_SEQUENCE_2 IXP2000_MSF_REG(0x0068) +#define IXP2000_MSF_TX_MPHY_POLL_LIMIT IXP2000_MSF_REG(0x0070) +#define IXP2000_MSF_TX_CALENDAR_LENGTH IXP2000_MSF_REG(0x0070) +#define IXP2000_MSF_RX_UP_CONTROL_0 IXP2000_MSF_REG(0x0080) +#define IXP2000_MSF_RX_UP_CONTROL_1 IXP2000_MSF_REG(0x0084) +#define IXP2000_MSF_RX_UP_CONTROL_2 IXP2000_MSF_REG(0x0088) +#define IXP2000_MSF_RX_UP_CONTROL_3 IXP2000_MSF_REG(0x008c) +#define IXP2000_MSF_TX_UP_CONTROL_0 IXP2000_MSF_REG(0x0090) +#define IXP2000_MSF_TX_UP_CONTROL_1 IXP2000_MSF_REG(0x0094) +#define IXP2000_MSF_TX_UP_CONTROL_2 IXP2000_MSF_REG(0x0098) +#define IXP2000_MSF_TX_UP_CONTROL_3 IXP2000_MSF_REG(0x009c) +#define IXP2000_MSF_TRAIN_DATA IXP2000_MSF_REG(0x00a0) +#define IXP2000_MSF_TRAIN_CALENDAR IXP2000_MSF_REG(0x00a4) +#define IXP2000_MSF_TRAIN_FLOW_CONTROL IXP2000_MSF_REG(0x00a8) +#define IXP2000_MSF_TX_CALENDAR_0 IXP2000_MSF_REG(0x1000) +#define IXP2000_MSF_RX_PORT_CALENDAR_STATUS IXP2000_MSF_REG(0x1400) + + #endif /* _IXP2000_H_ */ diff --git a/include/asm-arm/arch-l7200/io.h b/include/asm-arm/arch-l7200/io.h index fc012a39e2c..cab8ad0adf0 100644 --- a/include/asm-arm/arch-l7200/io.h +++ b/include/asm-arm/arch-l7200/io.h @@ -10,7 +10,7 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H -#include <asm/arch/hardware.h> +#include <asm/hardware.h> #define IO_SPACE_LIMIT 0xffffffff diff --git a/include/asm-arm/arch-lh7a40x/io.h b/include/asm-arm/arch-lh7a40x/io.h index c13bdd9add9..bbcd4335f44 100644 --- a/include/asm-arm/arch-lh7a40x/io.h +++ b/include/asm-arm/arch-lh7a40x/io.h @@ -11,6 +11,8 @@ #ifndef __ASM_ARCH_IO_H #define __ASM_ARCH_IO_H +#include <asm/hardware.h> + #define IO_SPACE_LIMIT 0xffffffff /* No ISA or PCI bus on this machine. */ diff --git a/include/asm-arm/arch-omap/io.h b/include/asm-arm/arch-omap/io.h index 11fbf629bf7..3d5bcd54508 100644 --- a/include/asm-arm/arch-omap/io.h +++ b/include/asm-arm/arch-omap/io.h @@ -34,6 +34,8 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include <asm/hardware.h> + #define IO_SPACE_LIMIT 0xffffffff /* diff --git a/include/asm-arm/arch-pxa/hardware.h b/include/asm-arm/arch-pxa/hardware.h index cf35721cfa4..3e70bd95472 100644 --- a/include/asm-arm/arch-pxa/hardware.h +++ b/include/asm-arm/arch-pxa/hardware.h @@ -44,12 +44,12 @@ #ifndef __ASSEMBLY__ -# define __REG(x) (*((volatile unsigned long *)io_p2v(x))) +# define __REG(x) (*((volatile u32 *)io_p2v(x))) /* With indexed regs we don't want to feed the index through io_p2v() especially if it is a variable, otherwise horrible code will result. */ # define __REG2(x,y) \ - (*(volatile unsigned long *)((unsigned long)&__REG(x) + (y))) + (*(volatile u32 *)((u32)&__REG(x) + (y))) # define __PREG(x) (io_v2p((u32)&(x))) diff --git a/include/asm-arm/arch-pxa/io.h b/include/asm-arm/arch-pxa/io.h index c3bdbe44e21..eb2dd58d397 100644 --- a/include/asm-arm/arch-pxa/io.h +++ b/include/asm-arm/arch-pxa/io.h @@ -6,6 +6,8 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include <asm/hardware.h> + #define IO_SPACE_LIMIT 0xffffffff /* diff --git a/include/asm-arm/arch-pxa/irda.h b/include/asm-arm/arch-pxa/irda.h new file mode 100644 index 00000000000..748406f384c --- /dev/null +++ b/include/asm-arm/arch-pxa/irda.h @@ -0,0 +1,17 @@ +#ifndef ASMARM_ARCH_IRDA_H +#define ASMARM_ARCH_IRDA_H + +/* board specific transceiver capabilities */ + +#define IR_OFF 1 +#define IR_SIRMODE 2 +#define IR_FIRMODE 4 + +struct pxaficp_platform_data { + int transceiver_cap; + void (*transceiver_mode)(struct device *dev, int mode); +}; + +extern void pxa_set_ficp_info(struct pxaficp_platform_data *info); + +#endif diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index 3af7165ab0d..a75a2470f4f 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -326,6 +326,25 @@ #define STDLL __REG(0x40700000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */ #define STDLH __REG(0x40700004) /* Divisor Latch High Register (DLAB = 1) (read/write) */ +/* Hardware UART (HWUART) */ +#define HWUART HWRBR +#define HWRBR __REG(0x41600000) /* Receive Buffer Register (read only) */ +#define HWTHR __REG(0x41600000) /* Transmit Holding Register (write only) */ +#define HWIER __REG(0x41600004) /* Interrupt Enable Register (read/write) */ +#define HWIIR __REG(0x41600008) /* Interrupt ID Register (read only) */ +#define HWFCR __REG(0x41600008) /* FIFO Control Register (write only) */ +#define HWLCR __REG(0x4160000C) /* Line Control Register (read/write) */ +#define HWMCR __REG(0x41600010) /* Modem Control Register (read/write) */ +#define HWLSR __REG(0x41600014) /* Line Status Register (read only) */ +#define HWMSR __REG(0x41600018) /* Modem Status Register (read only) */ +#define HWSPR __REG(0x4160001C) /* Scratch Pad Register (read/write) */ +#define HWISR __REG(0x41600020) /* Infrared Selection Register (read/write) */ +#define HWFOR __REG(0x41600024) /* Receive FIFO Occupancy Register (read only) */ +#define HWABR __REG(0x41600028) /* Auto-Baud Control Register (read/write) */ +#define HWACR __REG(0x4160002C) /* Auto-Baud Count Register (read only) */ +#define HWDLL __REG(0x41600000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */ +#define HWDLH __REG(0x41600004) /* Divisor Latch High Register (DLAB = 1) (read/write) */ + #define IER_DMAE (1 << 7) /* DMA Requests Enable */ #define IER_UUE (1 << 6) /* UART Unit Enable */ #define IER_NRZE (1 << 5) /* NRZ coding Enable */ @@ -1013,14 +1032,12 @@ #define ICCR0_LBM (1 << 1) /* Loopback mode */ #define ICCR0_ITR (1 << 0) /* IrDA transmission */ -#ifdef CONFIG_PXA27x #define ICCR2_RXP (1 << 3) /* Receive Pin Polarity select */ #define ICCR2_TXP (1 << 2) /* Transmit Pin Polarity select */ #define ICCR2_TRIG (3 << 0) /* Receive FIFO Trigger threshold */ #define ICCR2_TRIG_8 (0 << 0) /* >= 8 bytes */ #define ICCR2_TRIG_16 (1 << 0) /* >= 16 bytes */ #define ICCR2_TRIG_32 (2 << 0) /* >= 32 bytes */ -#endif #ifdef CONFIG_PXA27x #define ICSR0_EOC (1 << 6) /* DMA End of Descriptor Chain */ @@ -1250,9 +1267,13 @@ #define GPIO40_FFDTR 40 /* FFUART data terminal Ready */ #define GPIO41_FFRTS 41 /* FFUART request to send */ #define GPIO42_BTRXD 42 /* BTUART receive data */ +#define GPIO42_HWRXD 42 /* HWUART receive data */ #define GPIO43_BTTXD 43 /* BTUART transmit data */ +#define GPIO43_HWTXD 43 /* HWUART transmit data */ #define GPIO44_BTCTS 44 /* BTUART clear to send */ +#define GPIO44_HWCTS 44 /* HWUART clear to send */ #define GPIO45_BTRTS 45 /* BTUART request to send */ +#define GPIO45_HWRTS 45 /* HWUART request to send */ #define GPIO45_AC97_SYSCLK 45 /* AC97 System Clock */ #define GPIO46_ICPRXD 46 /* ICP receive data */ #define GPIO46_STRXD 46 /* STD_UART receive data */ @@ -1378,17 +1399,26 @@ #define GPIO40_FFDTR_MD (40 | GPIO_ALT_FN_2_OUT) #define GPIO41_FFRTS_MD (41 | GPIO_ALT_FN_2_OUT) #define GPIO42_BTRXD_MD (42 | GPIO_ALT_FN_1_IN) +#define GPIO42_HWRXD_MD (42 | GPIO_ALT_FN_3_IN) #define GPIO43_BTTXD_MD (43 | GPIO_ALT_FN_2_OUT) +#define GPIO43_HWTXD_MD (43 | GPIO_ALT_FN_3_OUT) #define GPIO44_BTCTS_MD (44 | GPIO_ALT_FN_1_IN) +#define GPIO44_HWCTS_MD (44 | GPIO_ALT_FN_3_IN) #define GPIO45_BTRTS_MD (45 | GPIO_ALT_FN_2_OUT) +#define GPIO45_HWRTS_MD (45 | GPIO_ALT_FN_3_OUT) #define GPIO45_SYSCLK_AC97_MD (45 | GPIO_ALT_FN_1_OUT) #define GPIO46_ICPRXD_MD (46 | GPIO_ALT_FN_1_IN) #define GPIO46_STRXD_MD (46 | GPIO_ALT_FN_2_IN) #define GPIO47_ICPTXD_MD (47 | GPIO_ALT_FN_2_OUT) #define GPIO47_STTXD_MD (47 | GPIO_ALT_FN_1_OUT) #define GPIO48_nPOE_MD (48 | GPIO_ALT_FN_2_OUT) +#define GPIO48_HWTXD_MD (48 | GPIO_ALT_FN_1_OUT) +#define GPIO48_nPOE_MD (48 | GPIO_ALT_FN_2_OUT) +#define GPIO49_HWRXD_MD (49 | GPIO_ALT_FN_1_IN) #define GPIO49_nPWE_MD (49 | GPIO_ALT_FN_2_OUT) #define GPIO50_nPIOR_MD (50 | GPIO_ALT_FN_2_OUT) +#define GPIO50_HWCTS_MD (50 | GPIO_ALT_FN_1_IN) +#define GPIO51_HWRTS_MD (51 | GPIO_ALT_FN_1_OUT) #define GPIO51_nPIOW_MD (51 | GPIO_ALT_FN_2_OUT) #define GPIO52_nPCE_1_MD (52 | GPIO_ALT_FN_2_OUT) #define GPIO53_nPCE_2_MD (53 | GPIO_ALT_FN_2_OUT) @@ -1763,6 +1793,7 @@ #define CKEN7_BTUART (1 << 7) /* BTUART Unit Clock Enable */ #define CKEN6_FFUART (1 << 6) /* FFUART Unit Clock Enable */ #define CKEN5_STUART (1 << 5) /* STUART Unit Clock Enable */ +#define CKEN4_HWUART (1 << 4) /* HWUART Unit Clock Enable */ #define CKEN4_SSP3 (1 << 4) /* SSP3 Unit Clock Enable */ #define CKEN3_SSP (1 << 3) /* SSP Unit Clock Enable */ #define CKEN3_SSP2 (1 << 3) /* SSP2 Unit Clock Enable */ @@ -2282,4 +2313,11 @@ #endif +/* PWRMODE register M field values */ + +#define PWRMODE_IDLE 0x1 +#define PWRMODE_STANDBY 0x2 +#define PWRMODE_SLEEP 0x3 +#define PWRMODE_DEEPSLEEP 0x7 + #endif diff --git a/include/asm-arm/arch-pxa/uncompress.h b/include/asm-arm/arch-pxa/uncompress.h index 4428d3eb743..fe38090444e 100644 --- a/include/asm-arm/arch-pxa/uncompress.h +++ b/include/asm-arm/arch-pxa/uncompress.h @@ -12,6 +12,7 @@ #define FFUART ((volatile unsigned long *)0x40100000) #define BTUART ((volatile unsigned long *)0x40200000) #define STUART ((volatile unsigned long *)0x40700000) +#define HWUART ((volatile unsigned long *)0x41600000) #define UART FFUART diff --git a/include/asm-arm/arch-rpc/io.h b/include/asm-arm/arch-rpc/io.h index 24453c405a8..b4da08d7a33 100644 --- a/include/asm-arm/arch-rpc/io.h +++ b/include/asm-arm/arch-rpc/io.h @@ -13,6 +13,8 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include <asm/hardware.h> + #define IO_SPACE_LIMIT 0xffffffff /* diff --git a/include/asm-arm/arch-s3c2410/fb.h b/include/asm-arm/arch-s3c2410/fb.h index ac57bc887d8..4790491ba9d 100644 --- a/include/asm-arm/arch-s3c2410/fb.h +++ b/include/asm-arm/arch-s3c2410/fb.h @@ -13,6 +13,7 @@ * 07-Sep-2004 RTP Created file * 03-Nov-2004 BJD Updated and minor cleanups * 03-Aug-2005 RTP Renamed to fb.h + * 26-Oct-2005 BJD Changed name of platdata init */ #ifndef __ASM_ARM_FB_H @@ -64,6 +65,6 @@ struct s3c2410fb_mach_info { unsigned long lpcsel; }; -void __init set_s3c2410fb_info(struct s3c2410fb_mach_info *hard_s3c2410fb_info); +extern void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *); #endif /* __ASM_ARM_FB_H */ diff --git a/include/asm-arm/arch-s3c2410/io.h b/include/asm-arm/arch-s3c2410/io.h index 4bf272ed9ad..16fbc8afffd 100644 --- a/include/asm-arm/arch-s3c2410/io.h +++ b/include/asm-arm/arch-s3c2410/io.h @@ -15,6 +15,8 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include <asm/hardware.h> + #define IO_SPACE_LIMIT 0xffffffff /* diff --git a/include/asm-arm/arch-s3c2410/regs-gpio.h b/include/asm-arm/arch-s3c2410/regs-gpio.h index 2053cbacffc..cb33d57c146 100644 --- a/include/asm-arm/arch-s3c2410/regs-gpio.h +++ b/include/asm-arm/arch-s3c2410/regs-gpio.h @@ -20,6 +20,7 @@ * 18-11-2004 BJD Added S3C2440 AC97 controls * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA * 28-Mar-2005 LCVR Fixed definition of GPB10 + * 26-Oct-2005 BJD Added generic configuration types */ @@ -43,6 +44,11 @@ /* general configuration options */ #define S3C2410_GPIO_LEAVE (0xFFFFFFFF) +#define S3C2410_GPIO_INPUT (0xFFFFFFF0) +#define S3C2410_GPIO_OUTPUT (0xFFFFFFF1) +#define S3C2410_GPIO_IRQ (0xFFFFFFF2) /* not available for all */ +#define S3C2410_GPIO_SFN2 (0xFFFFFFF2) /* not available on A */ +#define S3C2410_GPIO_SFN3 (0xFFFFFFF3) /* not available on A */ /* configure GPIO ports A..G */ diff --git a/include/asm-arm/arch-sa1100/hardware.h b/include/asm-arm/arch-sa1100/hardware.h index 19c3b1e186b..28711aaa496 100644 --- a/include/asm-arm/arch-sa1100/hardware.h +++ b/include/asm-arm/arch-sa1100/hardware.h @@ -22,13 +22,6 @@ /* - * We requires absolute addresses i.e. (PCMCIA_IO_0_BASE + 0x3f8) for - * in*()/out*() macros to be usable for all cases. - */ -#define PCIO_BASE 0 - - -/* * SA1100 internal I/O mappings * * We have the following mapping: diff --git a/include/asm-arm/arch-sa1100/io.h b/include/asm-arm/arch-sa1100/io.h index 7d969ffbd3b..9d4fe6cf205 100644 --- a/include/asm-arm/arch-sa1100/io.h +++ b/include/asm-arm/arch-sa1100/io.h @@ -10,13 +10,19 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include <asm/hardware.h> + #define IO_SPACE_LIMIT 0xffffffff /* * We don't actually have real ISA nor PCI buses, but there is so many * drivers out there that might just work if we fake them... */ -#define __io(a) ((void __iomem *)(PCIO_BASE + (a))) +static inline void __iomem *__io(unsigned long addr) +{ + return (void __iomem *)addr; +} +#define __io(a) __io(a) #define __mem_pci(a) (a) #define __mem_isa(a) (a) diff --git a/include/asm-arm/arch-sa1100/system.h b/include/asm-arm/arch-sa1100/system.h index 6f52118ba1a..0f0612f79b2 100644 --- a/include/asm-arm/arch-sa1100/system.h +++ b/include/asm-arm/arch-sa1100/system.h @@ -4,6 +4,7 @@ * Copyright (c) 1999 Nicolas Pitre <nico@cam.org> */ #include <linux/config.h> +#include <asm/hardware.h> static inline void arch_idle(void) { diff --git a/include/asm-arm/arch-shark/io.h b/include/asm-arm/arch-shark/io.h index 5e6ed0038b2..87ffa27f296 100644 --- a/include/asm-arm/arch-shark/io.h +++ b/include/asm-arm/arch-shark/io.h @@ -11,6 +11,8 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include <asm/hardware.h> + #define IO_SPACE_LIMIT 0xffffffff /* diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h index 5c4ae8f5dbb..2e6799632f1 100644 --- a/include/asm-arm/io.h +++ b/include/asm-arm/io.h @@ -26,7 +26,6 @@ #include <linux/types.h> #include <asm/byteorder.h> #include <asm/memory.h> -#include <asm/arch/hardware.h> /* * ISA I/O bus memory addresses are 1:1 with the physical address. diff --git a/include/asm-arm/mach/arch.h b/include/asm-arm/mach/arch.h index 4fa95084a8c..7273c6fd95b 100644 --- a/include/asm-arm/mach/arch.h +++ b/include/asm-arm/mach/arch.h @@ -48,10 +48,10 @@ struct machine_desc { * Set of macros to define architecture features. This is built into * a table by the linker. */ -#define MACHINE_START(_type,_name) \ -const struct machine_desc __mach_desc_##_type \ +#define MACHINE_START(_type,_name) \ +static const struct machine_desc __mach_desc_##_type \ __attribute__((__section__(".arch.info.init"))) = { \ - .nr = MACH_TYPE_##_type, \ + .nr = MACH_TYPE_##_type, \ .name = _name, #define MACHINE_END \ diff --git a/include/asm-arm/mach/map.h b/include/asm-arm/mach/map.h index 9ac47cf8d2e..0619522bd92 100644 --- a/include/asm-arm/mach/map.h +++ b/include/asm-arm/mach/map.h @@ -11,7 +11,7 @@ */ struct map_desc { unsigned long virtual; - unsigned long physical; + unsigned long pfn; unsigned long length; unsigned int type; }; @@ -27,6 +27,9 @@ struct meminfo; #define MT_ROM 6 #define MT_IXP2000_DEVICE 7 +#define __phys_to_pfn(paddr) (paddr >> PAGE_SHIFT) +#define __pfn_to_phys(pfn) (pfn << PAGE_SHIFT) + extern void create_memmap_holes(struct meminfo *); extern void memtable_init(struct meminfo *); extern void iotable_init(struct map_desc *, int); diff --git a/sound/arm/aaci.c b/sound/arm/aaci.c index b2d5db20ec8..559ead6367d 100644 --- a/sound/arm/aaci.c +++ b/sound/arm/aaci.c @@ -20,6 +20,7 @@ #include <asm/io.h> #include <asm/irq.h> +#include <asm/sizes.h> #include <asm/hardware/amba.h> #include <sound/driver.h> |