diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-05-09 08:07:58 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-05-09 08:07:58 -0700 |
| commit | a9545ee3c8153e133556aaaa8110337ca3f864dc (patch) | |
| tree | 0a172f74b37b239d850b8b363683e191511bc87a | |
| parent | c20b4b69f774896623a8ad87d974982bc89af7ed (diff) | |
| parent | 9731e287e08b804592191d8bffaad023154af2aa (diff) | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (37 commits)
SH: catch negative denormal_subf1() retval in denormal_add()
sh: Fix DMAC base address for SH7709S
sh: update smc91x platform data for se7206.
sh: Stub in cpu_to_node() and friends for NUMA build.
sh: intc register modify fix
sh: no high level trigger on some sh3 cpus
sh: clean up sh7710 and sh7720 intc tables
sh: add interrupt ack code to sh3
sh: unify external irq pin code for sh3
sh-sci: avoid writing to nonexistent registers
sh-sci: sh7722 lacks scsptr registers
sh-sci: improve sh7722 support
sh: reset hardware from early printk
sh: drain and wait for early printk
sh: use sci_out() for early printk
sh: add memory resources to /proc/iomem
sh: add kernel bss resource
sh: fix sh7705 interrupt vector typo
sh: update smc91x platform data for se7722
sh: update smc91x platform data for MigoR
...
63 files changed, 498 insertions, 1793 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 6a679c3e15e..8a68160079a 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -448,14 +448,6 @@ config SH_DREAMCAST Select Dreamcast if configuring for a SEGA Dreamcast. More information at <http://www.linux-sh.org> -config SH_MPC1211 - bool "Interface MPC1211" - depends on CPU_SUBTYPE_SH7751 && BROKEN - help - CTP/PCI-SH02 is a CPU module computer that is produced - by Interface Corporation. - More information at <http://www.interface.co.jp> - config SH_SH03 bool "Interface CTP/PCI-SH03" depends on CPU_SUBTYPE_SH7751 @@ -657,8 +649,7 @@ source "arch/sh/drivers/Kconfig" endmenu config ISA_DMA_API - def_bool y - depends on SH_MPC1211 + bool menu "Kernel features" @@ -666,7 +657,7 @@ source kernel/Kconfig.hz config KEXEC bool "kexec system call (EXPERIMENTAL)" - depends on EXPERIMENTAL + depends on SUPERH32 && EXPERIMENTAL help kexec is a system call that implements the ability to shutdown your current kernel, and to start another kernel. It is like a reboot @@ -683,7 +674,7 @@ config KEXEC config CRASH_DUMP bool "kernel crash dumps (EXPERIMENTAL)" - depends on EXPERIMENTAL + depends on SUPERH32 && EXPERIMENTAL help Generate crash dump after being started by kexec. This should be normally only set in special crash dump kernels @@ -763,7 +754,7 @@ menu "Boot options" config ZERO_PAGE_OFFSET hex "Zero page offset" - default "0x00004000" if SH_MPC1211 || SH_SH03 + default "0x00004000" if SH_SH03 default "0x00010000" if PAGE_SIZE_64KB default "0x00002000" if PAGE_SIZE_8KB default "0x00001000" diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug index d9d28f9dd0d..0d2ef1e9a6f 100644 --- a/arch/sh/Kconfig.debug +++ b/arch/sh/Kconfig.debug @@ -7,6 +7,7 @@ source "lib/Kconfig.debug" config SH_STANDARD_BIOS bool "Use LinuxSH standard BIOS" + depends on SUPERH32 help Say Y here if your target has the gdb-sh-stub package from www.m17n.org (or any conforming standard LinuxSH BIOS) diff --git a/arch/sh/Makefile b/arch/sh/Makefile index bb06f83e623..8050b03d51f 100644 --- a/arch/sh/Makefile +++ b/arch/sh/Makefile @@ -110,7 +110,6 @@ machdir-$(CONFIG_SH_7343_SOLUTION_ENGINE) += se/7343 machdir-$(CONFIG_SH_7721_SOLUTION_ENGINE) += se/7721 machdir-$(CONFIG_SH_HP6XX) += hp6xx machdir-$(CONFIG_SH_DREAMCAST) += dreamcast -machdir-$(CONFIG_SH_MPC1211) += mpc1211 machdir-$(CONFIG_SH_SH03) += sh03 machdir-$(CONFIG_SH_SECUREEDGE5410) += snapgear machdir-$(CONFIG_SH_RTS7751R2D) += renesas/rts7751r2d diff --git a/arch/sh/boards/mpc1211/Makefile b/arch/sh/boards/mpc1211/Makefile deleted file mode 100644 index 8cd31b5d200..00000000000 --- a/arch/sh/boards/mpc1211/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# -# Makefile for the Interface (CTP/PCI/MPC-SH02) specific parts of the kernel -# - -obj-y := setup.o rtc.o - -obj-$(CONFIG_PCI) += pci.o - diff --git a/arch/sh/boards/mpc1211/pci.c b/arch/sh/boards/mpc1211/pci.c deleted file mode 100644 index 23849f70f13..00000000000 --- a/arch/sh/boards/mpc1211/pci.c +++ /dev/null @@ -1,295 +0,0 @@ -/* - * Low-Level PCI Support for the MPC-1211(CTP/PCI/MPC-SH02) - * - * (c) 2002-2003 Saito.K & Jeanne - * - * Dustin McIntire (dustin@sensoria.com) - * Derived from arch/i386/kernel/pci-*.c which bore the message: - * (c) 1999--2000 Martin Mares <mj@ucw.cz> - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - */ -#include <linux/types.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/delay.h> -#include <linux/pci.h> -#include <linux/sched.h> -#include <linux/ioport.h> -#include <linux/errno.h> -#include <linux/irq.h> -#include <linux/interrupt.h> - -#include <asm/machvec.h> -#include <asm/io.h> -#include <asm/mpc1211/pci.h> - -static struct resource mpcpci_io_resource = { - "MPCPCI IO", - 0x00000000, - 0xffffffff, - IORESOURCE_IO -}; - -static struct resource mpcpci_mem_resource = { - "MPCPCI mem", - 0x00000000, - 0xffffffff, - IORESOURCE_MEM -}; - -static struct pci_ops pci_direct_conf1; -struct pci_channel board_pci_channels[] = { - {&pci_direct_conf1, &mpcpci_io_resource, &mpcpci_mem_resource, 0, 256}, - {NULL, NULL, NULL, 0, 0}, -}; - -/* - * Direct access to PCI hardware... - */ - - -#define CONFIG_CMD(bus, devfn, where) (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3)) - -/* - * Functions for accessing PCI configuration space with type 1 accesses - */ -static int pci_conf1_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value) -{ - u32 word; - unsigned long flags; - - /* - * PCIPDR may only be accessed as 32 bit words, - * so we must do byte alignment by hand - */ - local_irq_save(flags); - writel(CONFIG_CMD(bus,devfn,where), PCIPAR); - word = readl(PCIPDR); - local_irq_restore(flags); - - switch (size) { - case 1: - switch (where & 0x3) { - case 3: - *value = (u8)(word >> 24); - break; - case 2: - *value = (u8)(word >> 16); - break; - case 1: - *value = (u8)(word >> 8); - break; - default: - *value = (u8)word; - break; - } - break; - case 2: - switch (where & 0x3) { - case 3: - *value = (u16)(word >> 24); - local_irq_save(flags); - writel(CONFIG_CMD(bus,devfn,(where+1)), PCIPAR); - word = readl(PCIPDR); - local_irq_restore(flags); - *value |= ((word & 0xff) << 8); - break; - case 2: - *value = (u16)(word >> 16); - break; - case 1: - *value = (u16)(word >> 8); - break; - default: - *value = (u16)word; - break; - } - break; - case 4: - *value = word; - break; - } - PCIDBG(4,"pci_conf1_read@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),*value); - return PCIBIOS_SUCCESSFUL; -} - -/* - * Since MPC-1211 only does 32bit access we'll have to do a read,mask,write operation. - * We'll allow an odd byte offset, though it should be illegal. - */ -static int pci_conf1_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value) -{ - u32 word,mask = 0; - unsigned long flags; - u32 shift = (where & 3) * 8; - - if(size == 1) { - mask = ((1 << 8) - 1) << shift; // create the byte mask - } else if(size == 2){ - if(shift == 24) - return PCIBIOS_BAD_REGISTER_NUMBER; - mask = ((1 << 16) - 1) << shift; // create the word mask - } - local_irq_save(flags); - writel(CONFIG_CMD(bus,devfn,where), PCIPAR); - if(size == 4){ - writel(value, PCIPDR); - local_irq_restore(flags); - PCIDBG(4,"pci_conf1_write@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),value); - return PCIBIOS_SUCCESSFUL; - } - word = readl(PCIPDR); - word &= ~mask; - word |= ((value << shift) & mask); - writel(word, PCIPDR); - local_irq_restore(flags); - PCIDBG(4,"pci_conf1_write@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),word); - return PCIBIOS_SUCCESSFUL; -} - -#undef CONFIG_CMD - -static struct pci_ops pci_direct_conf1 = { - .read = pci_conf1_read, - .write = pci_conf1_write, -}; - -static void __devinit quirk_ali_ide_ports(struct pci_dev *dev) -{ - dev->resource[0].start = 0x1f0; - dev->resource[0].end = 0x1f7; - dev->resource[0].flags = IORESOURCE_IO; - dev->resource[1].start = 0x3f6; - dev->resource[1].end = 0x3f6; - dev->resource[1].flags = IORESOURCE_IO; - dev->resource[2].start = 0x170; - dev->resource[2].end = 0x177; - dev->resource[2].flags = IORESOURCE_IO; - dev->resource[3].start = 0x376; - dev->resource[3].end = 0x376; - dev->resource[3].flags = IORESOURCE_IO; - dev->resource[4].start = 0xf000; - dev->resource[4].end = 0xf00f; - dev->resource[4].flags = IORESOURCE_IO; -} -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M5229, quirk_ali_ide_ports); - -char * __devinit pcibios_setup(char *str) -{ - return str; -} - -/* - * Called after each bus is probed, but before its children - * are examined. - */ - -void __devinit pcibios_fixup_bus(struct pci_bus *b) -{ - pci_read_bridge_bases(b); -} - -/* - * IRQ functions - */ -static inline u8 bridge_swizzle(u8 pin, u8 slot) -{ - return (((pin-1) + slot) % 4) + 1; -} - -static inline u8 bridge_swizzle_pci_1(u8 pin, u8 slot) -{ - return (((pin-1) - slot) & 3) + 1; -} - -static u8 __init mpc1211_swizzle(struct pci_dev *dev, u8 *pinp) -{ - unsigned long flags; - u8 pin = *pinp; - u32 word; - - for ( ; dev->bus->self; dev = dev->bus->self) { - if (!pin) - continue; - - if (dev->bus->number == 1) { - local_irq_save(flags); - writel(0x80000000 | 0x2c, PCIPAR); - word = readl(PCIPDR); - local_irq_restore(flags); - word >>= 16; - - if (word == 0x0001) - pin = bridge_swizzle_pci_1(pin, PCI_SLOT(dev->devfn)); - else - pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn)); - } else - pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn)); - } - - *pinp = pin; - - return PCI_SLOT(dev->devfn); -} - -static int __init map_mpc1211_irq(struct pci_dev *dev, u8 slot, u8 pin) -{ - int irq = -1; - - /* now lookup the actual IRQ on a platform specific basis (pci-'platform'.c) */ - if (dev->bus->number == 0) { - switch (slot) { - case 13: irq = 9; break; /* USB */ - case 22: irq = 10; break; /* LAN */ - default: irq = 0; break; - } - } else { - switch (pin) { - case 0: irq = 0; break; - case 1: irq = 7; break; - case 2: irq = 9; break; - case 3: irq = 10; break; - case 4: irq = 11; break; - } - } - - if( irq < 0 ) { - PCIDBG(3, "PCI: Error mapping IRQ on device %s\n", pci_name(dev)); - return irq; - } - - PCIDBG(2, "Setting IRQ for slot %s to %d\n", pci_name(dev), irq); - - return irq; -} - -void __init pcibios_fixup_irqs(void) -{ - pci_fixup_irqs(mpc1211_swizzle, map_mpc1211_irq); -} - -void pcibios_align_resource(void *data, struct resource *res, - resource_size_t size, resource_size_t align) -{ - resource_size_t start = res->start; - - if (res->flags & IORESOURCE_IO) { - if (start >= 0x10000UL) { - if ((start & 0xffffUL) < 0x4000UL) { - start = (start & 0xffff0000UL) + 0x4000UL; - } else if ((start & 0xffffUL) >= 0xf000UL) { - start = (start & 0xffff0000UL) + 0x10000UL; - } - res->start = start; - } else { - if (start & 0x300) { - start = (start + 0x3ff) & ~0x3ff; - res->start = start; - } - } - } -} - diff --git a/arch/sh/boards/mpc1211/rtc.c b/arch/sh/boards/mpc1211/rtc.c deleted file mode 100644 index 03b123a4bba..00000000000 --- a/arch/sh/boards/mpc1211/rtc.c +++ /dev/null @@ -1,136 +0,0 @@ -/* - * linux/arch/sh/kernel/rtc-mpc1211.c -- MPC-1211 on-chip RTC support - * - * Copyright (C) 2002 Saito.K & Jeanne - * - */ - -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/sched.h> -#include <linux/time.h> -#include <linux/bcd.h> -#include <linux/mc146818rtc.h> - -unsigned long get_cmos_time(void) -{ - unsigned int year, mon, day, hour, min, sec; - - spin_lock(&rtc_lock); - - do { - sec = CMOS_READ(RTC_SECONDS); - min = CMOS_READ(RTC_MINUTES); - hour = CMOS_READ(RTC_HOURS); - day = CMOS_READ(RTC_DAY_OF_MONTH); - mon = CMOS_READ(RTC_MONTH); - year = CMOS_READ(RTC_YEAR); - } while (sec != CMOS_READ(RTC_SECONDS)); - - if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { - BCD_TO_BIN(sec); - BCD_TO_BIN(min); - BCD_TO_BIN(hour); - BCD_TO_BIN(day); - BCD_TO_BIN(mon); - BCD_TO_BIN(year); - } - - spin_unlock(&rtc_lock); - - year += 1900; - if (year < 1970) - year += 100; - - return mktime(year, mon, day, hour, min, sec); -} - -void mpc1211_rtc_gettimeofday(struct timeval *tv) -{ - - tv->tv_sec = get_cmos_time(); - tv->tv_usec = 0; -} - -/* arc/i386/kernel/time.c */ -/* - * In order to set the CMOS clock precisely, set_rtc_mmss has to be - * called 500 ms after the second nowtime has started, because when - * nowtime is written into the registers of the CMOS clock, it will - * jump to the next second precisely 500 ms later. Check the Motorola - * MC146818A or Dallas DS12887 data sheet for details. - * - * BUG: This routine does not handle hour overflow properly; it just - * sets the minutes. Usually you'll only notice that after reboot! - */ -static int set_rtc_mmss(unsigned long nowtime) -{ - int retval = 0; - int real_seconds, real_minutes, cmos_minutes; - unsigned char save_control, save_freq_select; - - /* gets recalled with irq locally disabled */ - spin_lock(&rtc_lock); - save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */ - CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL); - - save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */ - CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT); - - cmos_minutes = CMOS_READ(RTC_MINUTES); - if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) - BCD_TO_BIN(cmos_minutes); - - /* - * since we're only adjusting minutes and seconds, - * don't interfere with hour overflow. This avoids - * messing with unknown time zones but requires your - * RTC not to be off by more than 15 minutes - */ - real_seconds = nowtime % 60; - real_minutes = nowtime / 60; - if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1) - real_minutes += 30; /* correct for half hour time zone */ - real_minutes %= 60; - - if (abs(real_minutes - cmos_minutes) < 30) { - if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { - BIN_TO_BCD(real_seconds); - BIN_TO_BCD(real_minutes); - } - CMOS_WRITE(real_seconds,RTC_SECONDS); - CMOS_WRITE(real_minutes,RTC_MINUTES); - } else { - printk(KERN_WARNING - "set_rtc_mmss: can't update from %d to %d\n", - cmos_minutes, real_minutes); - retval = -1; - } - - /* The following flags have to be released exactly in this order, - * otherwise the DS12887 (popular MC146818A clone with integrated - * battery and quartz) will not reset the oscillator and will not - * update precisely 500 ms later. You won't find this mentioned in - * the Dallas Semiconductor data sheets, but who believes data - * sheets anyway ... -- Markus Kuhn - */ - CMOS_WRITE(save_control, RTC_CONTROL); - CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); - spin_unlock(&rtc_lock); - - return retval; -} - -int mpc1211_rtc_settimeofday(const struct timeval *tv) -{ - unsigned long nowtime = tv->tv_sec; - - return set_rtc_mmss(nowtime); -} - -void mpc1211_time_init(void) -{ - rtc_sh_get_time = mpc1211_rtc_gettimeofday; - rtc_sh_set_time = mpc1211_rtc_settimeofday; -} - diff --git a/arch/sh/boards/mpc1211/setup.c b/arch/sh/boards/mpc1211/setup.c deleted file mode 100644 index fede36361dc..00000000000 --- a/arch/sh/boards/mpc1211/setup.c +++ /dev/null @@ -1,347 +0,0 @@ -/* - * linux/arch/sh/boards/mpc1211/setup.c - * - * Copyright (C) 2002 Saito.K & Jeanne, Fujii.Y - * - */ - -#include <linux/init.h> -#include <linux/irq.h> -#include <linux/hdreg.h> -#include <linux/ide.h> -#include <linux/interrupt.h> -#include <linux/platform_device.h> -#include <asm/io.h> -#include <asm/machvec.h> -#include <asm/mpc1211/mpc1211.h> -#include <asm/mpc1211/pci.h> -#include <asm/mpc1211/m1543c.h> - -/* ALI15X3 SMBus address offsets */ -#define SMBHSTSTS (0 + 0x3100) -#define SMBHSTCNT (1 + 0x3100) -#define SMBHSTSTART (2 + 0x3100) -#define SMBHSTCMD (7 + 0x3100) -#define SMBHSTADD (3 + 0x3100) -#define SMBHSTDAT0 (4 + 0x3100) -#define SMBHSTDAT1 (5 + 0x3100) -#define SMBBLKDAT (6 + 0x3100) - -/* Other settings */ -#define MAX_TIMEOUT 500 /* times 1/100 sec */ - -/* ALI15X3 command constants */ -#define ALI15X3_ABORT 0x04 -#define ALI15X3_T_OUT 0x08 -#define ALI15X3_QUICK 0x00 -#define ALI15X3_BYTE 0x10 -#define ALI15X3_BYTE_DATA 0x20 -#define ALI15X3_WORD_DATA 0x30 -#define ALI15X3_BLOCK_DATA 0x40 -#define ALI15X3_BLOCK_CLR 0x80 - -/* ALI15X3 status register bits */ -#define ALI15X3_STS_IDLE 0x04 -#define ALI15X3_STS_BUSY 0x08 -#define ALI15X3_STS_DONE 0x10 -#define ALI15X3_STS_DEV 0x20 /* device error */ -#define ALI15X3_STS_COLL 0x40 /* collision or no response */ -#define ALI15X3_STS_TERM 0x80 /* terminated by abort */ -#define ALI15X3_STS_ERR 0xE0 /* all the bad error bits */ - -static void __init pci_write_config(unsigned long busNo, - unsigned long devNo, - unsigned long fncNo, - unsigned long cnfAdd, - unsigned long cnfData) -{ - ctrl_outl((0x80000000 - + ((busNo & 0xff) << 16) - + ((devNo & 0x1f) << 11) - + ((fncNo & 0x07) << 8) - + (cnfAdd & 0xfc)), PCIPAR); - - ctrl_outl(cnfData, PCIPDR); -} - -/* - Initialize IRQ setting -*/ - -static unsigned char m_irq_mask = 0xfb; -static unsigned char s_irq_mask = 0xff; - -static void disable_mpc1211_irq(unsigned int irq) -{ - if( irq < 8) { - m_irq_mask |= (1 << irq); - outb(m_irq_mask,I8259_M_MR); - } else { - s_irq_mask |= (1 << (irq - 8)); - outb(s_irq_mask,I8259_S_MR); - } - -} - -static void enable_mpc1211_irq(unsigned int irq) -{ - if( irq < 8) { - m_irq_mask &= ~(1 << irq); - outb(m_irq_mask,I8259_M_MR); - } else { - s_irq_mask &= ~(1 << (irq - 8)); - outb(s_irq_mask,I8259_S_MR); - } -} - -static inline int mpc1211_irq_real(unsigned int irq) -{ - int value; - int irqmask; - - if ( irq < 8) { - irqmask = 1<<irq; - outb(0x0b,I8259_M_CR); /* ISR register */ - value = inb(I8259_M_CR) & irqmask; - outb(0x0a,I8259_M_CR); /* back ro the IPR reg */ - return value; - } - irqmask = 1<<(irq - 8); - outb(0x0b,I8259_S_CR); /* ISR register */ - value = inb(I8259_S_CR) & irqmask; - outb(0x0a,I8259_S_CR); /* back ro the IPR reg */ - return value; -} - -static void mask_and_ack_mpc1211(unsigned int irq) -{ - if(irq < 8) { - if(m_irq_mask & (1<<irq)){ - if(!mpc1211_irq_real(irq)){ - atomic_inc(&irq_err_count) - printk("spurious 8259A interrupt: IRQ %x\n",irq); - } - } else { - m_irq_mask |= (1<<irq); - } - inb(I8259_M_MR); /* DUMMY */ - outb(m_irq_mask,I8259_M_MR); /* disable */ - outb(0x60+irq,I8259_M_CR); /* EOI */ - - } else { - if(s_irq_mask & (1<<(irq - 8))){ - if(!mpc1211_irq_real(irq)){ - atomic_inc(&irq_err_count); - printk("spurious 8259A interrupt: IRQ %x\n",irq); - } - } else { - s_irq_mask |= (1<<(irq - 8)); - } - inb(I8259_S_MR); /* DUMMY */ - outb(s_irq_mask,I8259_S_MR); /* disable */ - outb(0x60+(irq-8),I8259_S_CR); /* EOI */ - outb(0x60+2,I8259_M_CR); - } -} - -static void end_mpc1211_irq(unsigned int irq) -{ - enable_mpc1211_irq(irq); -} - -static unsigned int startup_mpc1211_irq(unsigned int irq) -{ - enable_mpc1211_irq(irq); - return 0; -} - -static void shutdown_mpc1211_irq(unsigned int irq) -{ - disable_mpc1211_irq(irq); -} - -static struct hw_interrupt_type mpc1211_irq_type = { - .typename = "MPC1211-IRQ", - .startup = startup_mpc1211_irq, - .shutdown = shutdown_mpc1211_irq, - .enable = enable_mpc1211_irq, - .disable = disable_mpc1211_irq, - .ack = mask_and_ack_mpc1211, - .end = end_mpc1211_irq -}; - -static void make_mpc1211_irq(unsigned int irq) -{ - irq_desc[irq].chip = &mpc1211_irq_type; - irq_desc[irq].status = IRQ_DISABLED; - irq_desc[irq].action = 0; - irq_desc[irq].depth = 1; - disable_mpc1211_irq(irq); -} - -int mpc1211_irq_demux(int irq) -{ - unsigned int poll; - - if( irq == 2 ) { - outb(0x0c,I8259_M_CR); - poll = inb(I8259_M_CR); - if(poll & 0x80) { - irq = (poll & 0x07); - } - if( irq == 2) { - outb(0x0c,I8259_S_CR); - poll = inb(I8259_S_CR); - irq = (poll & 0x07) + 8; - } - } - return irq; -} - -static void __init init_mpc1211_IRQ(void) -{ - int i; - /* - * Super I/O (Just mimic PC): - * 1: keyboard - * 3: serial 1 - * 4: serial 0 - * 5: printer - * 6: floppy - * 8: rtc - * 10: lan - * 12: mouse - * 14: ide0 - * 15: ide1 - */ - - pci_write_config(0,0,0,0x54, 0xb0b0002d); - outb(0x11, I8259_M_CR); /* mater icw1 edge trigger */ - outb(0x11, I8259_S_CR); /* slave icw1 edge trigger */ - outb(0x20, I8259_M_MR); /* m icw2 base vec 0x08 */ - outb(0x28, I8259_S_MR); /* s icw2 base vec 0x70 */ - outb(0x04, I8259_M_MR); /* m icw3 slave irq2 */ - outb(0x02, I8259_S_MR); /* s icw3 slave id */ - outb(0x01, I8259_M_MR); /* m icw4 non buf normal eoi*/ - outb(0x01, I8259_S_MR); /* s icw4 non buf normal eo1*/ - outb(0xfb, I8259_M_MR); /* disable irq0--irq7 */ - outb(0xff, I8259_S_MR); /* disable irq8--irq15 */ - - for ( i=0; i < 16; i++) { - if(i != 2) { - make_mpc1211_irq(i); - } - } -} - -static void delay1000(void) -{ - int i; - - for (i=0; i<1000; i++) - ctrl_delay(); -} - -static int put_smb_blk(unsigned char *p, int address, int command, int no) -{ - int temp; - int timeout; - int i; - - outb(0xff, SMBHSTSTS); - temp = inb(SMBHSTSTS); - for (timeout = 0; (timeout < MAX_TIMEOUT) && !(temp & ALI15X3_STS_IDLE); timeout++) { - delay1000(); - temp = inb(SMBHSTSTS); - } - if (timeout >= MAX_TIMEOUT){ - return -1; - } - - outb(((address & 0x7f) << 1), SMBHSTADD); - outb(0xc0, SMBHSTCNT); - outb(command & 0xff, SMBHSTCMD); - outb(no & 0x1f, SMBHSTDAT0); - - for(i = 1; i <= no; i++) { - outb(*p++, SMBBLKDAT); - } - outb(0xff, SMBHSTSTART); - - temp = inb(SMBHSTSTS); - for (timeout = 0; (timeout < MAX_TIMEOUT) && !(temp & (ALI15X3_STS_ERR | ALI15X3_STS_DONE)); timeout++) { - delay1000(); - temp = inb(SMBHSTSTS); - } - if (timeout >= MAX_TIMEOUT) { - return -2; - } - if ( temp & ALI15X3_STS_ERR ){ - return -3; - } - return 0; -} - -static struct resource heartbeat_resources[] = { - [0] = { - .start = 0xa2000000, - .end = 0xa2000000, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device heartbeat_device = { - .name = "heartbeat", - .id = -1, - .num_resources = ARRAY_SIZE(heartbeat_resources), - .resource = heartbeat_resources, -}; - -static struct platform_device *mpc1211_devices[] __initdata = { - &heartbeat_device, -}; - -static int __init mpc1211_devices_setup(void) -{ - return platform_add_devices(mpc1211_devices, - ARRAY_SIZE(mpc1211_devices)); -} -__initcall(mpc1211_devices_setup); - -/* arch/sh/boards/mpc1211/rtc.c */ -void mpc1211_time_init(void); - -static void __init mpc1211_setup(char **cmdline_p) -{ - unsigned char spd_buf[128]; - - __set_io_port_base(PA_PCI_IO); - - pci_write_config(0,0,0,0x54, 0xb0b00000); - - do { - outb(ALI15X3_ABORT, SMBHSTCNT); - spd_buf[0] = 0x0c; - spd_buf[1] = 0x43; - spd_buf[2] = 0x7f; - spd_buf[3] = 0x03; - spd_buf[4] = 0x00; - spd_buf[5] = 0x03; - spd_buf[6] = 0x00; - } while (put_smb_blk(spd_buf, 0x69, 0, 7) < 0); - - board_time_init = mpc1211_time_init; - - return 0; -} - -/* - * The Machine Vector - */ -static struct sh_machine_vector mv_mpc1211 __initmv = { - .mv_name = "Interface MPC-1211(CTP/PCI/MPC-SH02)", - .mv_setup = mpc1211_setup, - .mv_nr_irqs = 48, - .mv_irq_demux = mpc1211_irq_demux, - .mv_init_irq = init_mpc1211_IRQ, -}; diff --git a/arch/sh/boards/renesas/migor/setup.c b/arch/sh/boards/renesas/migor/setup.c index e7c150d4970..01af44245b5 100644 --- a/arch/sh/boards/renesas/migor/setup.c +++ b/arch/sh/boards/renesas/migor/setup.c @@ -14,6 +14,7 @@ #include <linux/mtd/physmap.h> #include <linux/mtd/nand.h> #include <linux/i2c.h> +#include <linux/smc91x.h> #include <asm/machvec.h> #include <asm/io.h> #include <asm/sh_keysc.h> @@ -27,6 +28,11 @@ * 0x18000000 8GB 8 NAND Flash (K9K8G08U0A) */ +static struct smc91x_platdata smc91x_info = { + .flags = SMC91X_USE_16BIT, + .irq_flags = IRQF_TRIGGER_HIGH, +}; + static struct resource smc91x_eth_resources[] = { [0] = { .name = "SMC91C111" , @@ -36,7 +42,7 @@ static struct resource smc91x_eth_resources[] = { }, [1] = { .start = 32, /* IRQ0 */ - .flags = IORESOURCE_IRQ | IRQF_TRIGGER_HIGH, + .flags = IORESOURCE_IRQ, }, }; @@ -44,6 +50,9 @@ static struct platform_device smc91x_eth_device = { .name = "smc91x", .num_resources = ARRAY_SIZE(smc91x_eth_resources), .resource = smc91x_eth_resources, + .dev = { + .platform_data = &smc91x_info, + }, }; static struct sh_keysc_info sh_keysc_info = { diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c b/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c index 68f0ad1b637..ae1cfcb2970 100644 --- a/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c +++ b/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c @@ -62,7 +62,7 @@ static unsigned char irl2irq[HL_NR_IRL] __initdata = { static DECLARE_INTC_DESC(intc_desc, "r7780mp", vectors, NULL, mask_registers, NULL, NULL); -unsigned char * __init highlander_init_irq_r7780mp(void) +unsigned char * __init highlander_plat_irq_setup(void) { if ((ctrl_inw(0xa4000700) & 0xf000) == 0x2000) { printk(KERN_INFO "Using r7780mp interrupt controller.\n"); diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c b/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c index bd34048ed0e..9d3921fe27c 100644 --- a/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c +++ b/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c @@ -55,7 +55,7 @@ static unsigned char irl2irq[HL_NR_IRL] __initdata = { static DECLARE_INTC_DESC(intc_desc, "r7780rp", vectors, NULL, mask_registers, NULL, NULL); -unsigned char * __init highlander_init_irq_r7780rp(void) +unsigned char * __init highlander_plat_irq_setup(void) { if (ctrl_inw(0xa5000600)) { printk(KERN_INFO "Using r7780rp interrupt controller.\n"); diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c b/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c index bf7ec107fbc..896c045aa39 100644 --- a/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c +++ b/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c @@ -64,7 +64,7 @@ static unsigned char irl2irq[HL_NR_IRL] __initdata = { static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors, NULL, mask_registers, NULL, NULL); -unsigned char * __init highlander_init_irq_r7785rp(void) +unsigned char * __init highlander_plat_irq_setup(void) { if ((ctrl_inw(0xa4000158) & 0xf000) != 0x1000) return NULL; diff --git a/arch/sh/boards/renesas/r7780rp/setup.c b/arch/sh/boards/renesas/r7780rp/setup.c index ac0a96522e4..bc79afb6fc4 100644 --- a/arch/sh/boards/renesas/r7780rp/setup.c +++ b/arch/sh/boards/renesas/r7780rp/setup.c @@ -316,7 +316,7 @@ static void __init highlander_setup(char **cmdline_p) static unsigned char irl2irq[HL_NR_IRL]; -int highlander_irq_demux(int irq) +static int highlander_irq_demux(int irq) { if (irq >= HL_NR_IRL || !irl2irq[irq]) return irq; @@ -324,27 +324,9 @@ int highlander_irq_demux(int irq) return irl2irq[irq]; } -void __init highlander_init_irq(void) +static void __init highlander_init_irq(void) { - unsigned char *ucp = NULL; - - do { -#ifdef CONFIG_SH_R7780MP - ucp = highlander_init_irq_r7780mp(); - if (ucp) - break; -#endif -#ifdef CONFIG_SH_R7785RP - ucp = highlander_init_irq_r7785rp(); - if (ucp) - break; -#endif -#ifdef CONFIG_SH_R7780RP - ucp = highlander_init_irq_r7780rp(); - if (ucp) - break; -#endif - } while (0); + unsigned char *ucp = highlander_plat_irq_setup(); if (ucp) { plat_irq_setup_pins(IRQ_MODE_IRL3210); diff --git a/arch/sh/boards/renesas/rts7751r2d/setup.c b/arch/sh/boards/renesas/rts7751r2d/setup.c index f21ee49ef3a..452d0d6459a 100644 --- a/arch/sh/boards/renesas/rts7751r2d/setup.c +++ b/arch/sh/boards/renesas/rts7751r2d/setup.c @@ -109,7 +109,6 @@ static struct platform_device heartbeat_device = { .resource = heartbeat_resources, }; -#ifdef CONFIG_MFD_SM501 static struct plat_serial8250_port uart_platform_data[] = { { .membase = (void __iomem *)0xb3e30000, @@ -208,13 +207,9 @@ static struct platform_device sm501_device = { .resource = sm501_resources, }; -#endif /* CONFIG_MFD_SM501 */ - static struct platform_device *rts7751r2d_devices[] __initdata = { -#ifdef CONFIG_MFD_SM501 &uart_device, &sm501_device, -#endif &heartbeat_device, &spi_sh_sci_device, }; @@ -234,7 +229,9 @@ static int __init rts7751r2d_devices_setup(void) { if (register_trapped_io(&cf_trapped_io) == 0) platform_device_register(&cf_ide_device); + spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus)); + return platform_add_devices(rts7751r2d_devices, ARRAY_SIZE(rts7751r2d_devices)); } diff --git a/arch/sh/boards/se/7206/setup.c b/arch/sh/boards/se/7206/setup.c index 5b3ee089d91..4fe84cc0840 100644 --- a/arch/sh/boards/se/7206/setup.c +++ b/arch/sh/boards/se/7206/setup.c @@ -3,12 +3,13 @@ * linux/arch/sh/boards/se/7206/setup.c * * Copyright (C) 2006 Yoshinori Sato - * Copyright (C) 2007 Paul Mundt + * Copyright (C) 2007 - 2008 Paul Mundt * * Hitachi 7206 SolutionEngine Support. */ #include <linux/init.h> #include <linux/platform_device.h> +#include <linux/smc91x.h> #include <asm/se7206.h> #include <asm/io.h> #include <asm/machvec.h> @@ -16,8 +17,9 @@ static struct resource smc91x_resources[] = { [0] = { - .start = 0x300, - .end = 0x300 + 0x020 - 1, + .name = "smc91x-regs", + .start = PA_SMSC + 0x300, + .end = PA_SMSC + 0x300 + 0x020 - 1, .flags = IORESOURCE_MEM, }, [1] = { @@ -27,9 +29,18 @@ static struct resource smc91x_resources[] = { }, }; +static struct smc91x_platdata smc91x_info = { + .flags = SMC91X_USE_16BIT, +}; + static struct platform_device smc91x_device = { .name = "smc91x", .id = -1, + .dev = { + .dma_mask = NULL, + .coherent_dma_mask = 0xffffffff, + .platform_data = &smc91x_info, + }, .num_resources = ARRAY_SIZE(smc91x_resources), .resource = smc91x_resources, }; diff --git a/arch/sh/boards/se/7722/setup.c b/arch/sh/boards/se/7722/setup.c index 33f6ee71f84..ede3957fc14 100644 --- a/arch/sh/boards/se/7722/setup.c +++ b/arch/sh/boards/se/7722/setup.c @@ -14,6 +14,7 @@ #include <linux/platform_device.h> #include <linux/ata_platform.h> #include <linux/input.h> +#include <linux/smc91x.h> #include <asm/machvec.h> #include <asm/se7722.h> #include <asm/io.h> @@ -44,6 +45,10 @@ static struct platform_device heartbeat_device = { }; /* SMC91x */ +static struct smc91x_platdata smc91x_info = { + .flags = SMC91X_USE_16BIT, +}; + static struct resource smc91x_eth_resources[] = { [0] = { .name = "smc91x-regs" , @@ -64,6 +69,7 @@ static struct platform_device smc91x_eth_device = { .dev = { .dma_mask = NULL, /* don't use dma */ .coherent_dma_mask = 0xffffffff, + .platform_data = &smc91x_info, }, .num_resources = ARRAY_SIZE(smc91x_eth_resources), .resource = smc91x_eth_resources, diff --git a/arch/sh/boot/compressed/Makefile_32 b/arch/sh/boot/compressed/Makefile_32 index 6ac8d4a4ed1..c0d25fb1aa6 100644 --- a/arch/sh/boot/compressed/Makefile_32 +++ b/arch/sh/boot/compressed/Makefile_32 @@ -6,7 +6,6 @@ targets := vmlinux vmlinux.bin vmlinux.bin.gz \ head_32.o misc_32.o piggy.o -EXTRA_AFLAGS := -traditional OBJECTS = $(obj)/head_32.o $(obj)/misc_32.o diff --git a/arch/sh/boot/compressed/Makefile_64 b/arch/sh/boot/compressed/Makefile_64 index 4334f2b86d8..912f3e205a0 100644 --- a/arch/sh/boot/compressed/Makefile_64 +++ b/arch/sh/boot/compressed/Makefile_64 @@ -13,7 +13,6 @@ targets := vmlinux vmlinux.bin vmlinux.bin.gz \ head_64.o misc_64.o cache.o piggy.o -EXTRA_AFLAGS := -traditional OBJECTS := $(obj)/vmlinux_64.lds $(obj)/head_64.o $(obj)/misc_64.o \ $(obj)/cache.o diff --git a/arch/sh/kernel/cpu/irq/intc-sh5.c b/arch/sh/kernel/cpu/irq/intc-sh5.c index d6e0e2bdaad..de45c6a3e33 100644 --- a/arch/sh/kernel/cpu/irq/intc-sh5.c +++ b/arch/sh/kernel/cpu/irq/intc-sh5.c @@ -184,9 +184,8 @@ int intc_irq_describe(char* p, int irq) void __init plat_irq_setup(void) { - unsigned long long __dummy0, __dummy1=~0x00000000100000f0; + unsigned long long __dummy0, __dummy1=~0x00000000100000f0; unsigned long reg; - unsigned long data; int i; intc_virt = onchip_remap(INTC_BASE, 1024, "INTC"); @@ -196,11 +195,8 @@ void __init plat_irq_setup(void) /* Set default: per-line enable/disable, priority driven ack/eoi */ - for (i = 0; i < NR_INTC_IRQS; i++) { - if (platform_int_priority[i] != NO_PRIORITY) { - irq_desc[i].chip = &intc_irq_type; - } - } + for (i = 0; i < NR_INTC_IRQS; i++) + irq_desc[i].chip = &intc_irq_type; /* Disable all interrupts and set all priorities to 0 to avoid trouble */ @@ -211,35 +207,42 @@ void __init plat_irq_setup(void) ctrl_outl( NO_PRIORITY, reg); - /* Set IRLM */ - /* If all the priorities are set to 'no priority', then - * assume we are using encoded mode. - */ - irlm = platform_int_priority[IRQ_IRL0] + platform_int_priority[IRQ_IRL1] + \ - platform_int_priority[IRQ_IRL2] + platform_int_priority[IRQ_IRL3]; - - if (irlm == NO_PRIORITY) { - /* IRLM = 0 */ - reg = INTC_ICR_CLEAR; - i = IRQ_INTA; - printk("Trying to use encoded IRL0-3. IRLs unsupported.\n"); - } else { - /* IRLM = 1 */ - reg = INTC_ICR_SET; - i = IRQ_IRL0; - } - ctrl_outl(INTC_ICR_IRLM, reg); - - /* Set interrupt priorities according to platform description */ - for (data = 0, reg = INTC_INTPRI_0; i < NR_INTC_IRQS; i++) { - data |= platform_int_priority[i] << ((i % INTC_INTPRI_PPREG) * 4); - if ((i % INTC_INTPRI_PPREG) == (INTC_INTPRI_PPREG - 1)) { - /* Upon the 7th, set Priority Register */ - ctrl_outl(data, reg); - data = 0; - reg += 8; +#ifdef CONFIG_SH_CAYMAN + { + unsigned long data; + + /* Set IRLM */ + /* If all the priorities are set to 'no priority', then + * assume we are using encoded mode. + */ + irlm = platform_int_priority[IRQ_IRL0] + + platform_int_priority[IRQ_IRL1] + + platform_int_priority[IRQ_IRL2] + + platform_int_priority[IRQ_IRL3]; + if (irlm == NO_PRIORITY) { + /* IRLM = 0 */ + reg = INTC_ICR_CLEAR; + i = IRQ_INTA; + printk("Trying to use encoded IRL0-3. IRLs unsupported.\n"); + } else { + /* IRLM = 1 */ + reg = INTC_ICR_SET; + i = IRQ_IRL0; } - } + ctrl_outl(INTC_ICR_IRLM, reg); + + /* Set interrupt priorities according to platform description */ + for (data = 0, reg = INTC_INTPRI_0; i < NR_INTC_IRQS; i++) { + data |= platform_int_priority[i] << + ((i % INTC_INTPRI_PPREG) * 4); + if ((i % INTC_INTPRI_PPREG) == (INTC_INTPRI_PPREG - 1)) { + /* Upon the 7th, set Priority Register */ + ctrl_outl(data, reg); + data = 0; + reg += 8; + } + } +#endif /* * And now let interrupts come in. diff --git a/arch/sh/kernel/cpu/irq/intc.c b/arch/sh/kernel/cpu/irq/intc.c index 84806b2027f..da5dae78788 100644 --- a/arch/sh/kernel/cpu/irq/intc.c +++ b/arch/sh/kernel/cpu/irq/intc.c @@ -1,7 +1,7 @@ /* * Shared interrupt handling code for IPR and INTC2 types of IRQs. * - * Copyright (C) 2007 Magnus Damm + * Copyright (C) 2007, 2008 Magnus Damm * * Based on intc2.c and ipr.c * @@ -62,6 +62,9 @@ struct intc_desc_int { #endif static unsigned int intc_prio_level[NR_IRQS]; /* for now */ +#ifdef CONFIG_CPU_SH3 +static unsigned long ack_handle[NR_IRQS]; +#endif static inline struct intc_desc_int *get_intc_desc(unsigned int irq) { @@ -98,17 +101,26 @@ static void write_32(unsigned long addr, unsigned long h, unsigned long data) static void modify_8(unsigned long addr, unsigned long h, unsigned long data) { + unsigned long flags; + local_irq_save(flags); ctrl_outb(set_field(ctrl_inb(addr), data, h), addr); + local_irq_restore(flags); } static void modify_16(unsigned long addr, unsigned long h, unsigned long data) { + unsigned long flags; + local_irq_save(flags); ctrl_outw(set_field(ctrl_inw(addr), data, h), addr); + local_irq_restore(flags); } static void modify_32(unsigned long addr, unsigned long h, unsigned long data) { + unsigned long flags; + local_irq_save(flags); ctrl_outl(set_field(ctrl_inl(addr), data, h), addr); + local_irq_restore(flags); } enum { REG_FN_ERR = 0, REG_FN_WRITE_BASE = 1, REG_FN_MODIFY_BASE = 5 }; @@ -219,6 +231,25 @@ static void intc_disable(unsigned int irq) } } +#ifdef CONFIG_CPU_SH3 +static void intc_mask_ack(unsigned int irq) +{ + struct intc_desc_int *d = get_intc_desc(irq); + unsigned long handle = ack_handle[irq]; + unsigned long addr; + + intc_disable(irq); + + /* read register and write zero only to the assocaited bit */ + + if (handle) { + addr = INTC_REG(d, _INTC_ADDR_D(handle), 0); + ctrl_inb(addr); + ctrl_outb(0x3f ^ set_field(0, 1, handle), addr); + } +} +#endif + static struct intc_handle_int *intc_find_irq(struct intc_handle_int *hp, unsigned int nr_hp, unsigned int irq) @@ -280,7 +311,12 @@ static unsigned char intc_irq_sense_table[IRQ_TYPE_SENSE_MASK + 1] = { [IRQ_TYPE_EDGE_FALLING] = VALID(0), [IRQ_TYPE_EDGE_RISING] = VALID(1), [IRQ_TYPE_LEVEL_LOW] = VALID(2), + /* SH7706, SH7707 and SH7709 do not support high level triggered */ +#if !defined(CONFIG_CPU_SUBTYPE_SH7706) && \ + !defined(CONFIG_CPU_SUBTYPE_SH7707) && \ + !defined(CONFIG_CPU_SUBTYPE_SH7709) [IRQ_TYPE_LEVEL_HIGH] = VALID(3), +#endif }; static int intc_set_sense(unsigned int irq, unsigned int type) @@ -430,6 +466,40 @@ static unsigned int __init intc_prio_data(struct intc_desc *desc, return 0; } +#ifdef CONFIG_CPU_SH3 +static unsigned int __init intc_ack_data(struct intc_desc *desc, + struct intc_desc_int *d, + intc_enum enum_id) +{ + struct intc_mask_reg *mr = desc->ack_regs; + unsigned int i, j, fn, mode; + unsigned long reg_e, reg_d; + + for (i = 0; mr && enum_id && i < desc->nr_ack_regs; i++) { + mr = desc->ack_regs + i; + + for (j = 0; j < ARRAY_SIZE(mr->enum_ids); j++) { + if (mr->enum_ids[j] != enum_id) + continue; + + fn = REG_FN_MODIFY_BASE; + mode = MODE_ENABLE_REG; + reg_e = mr->set_reg; + reg_d = mr->set_reg; + + fn += (mr->reg_width >> 3) - 1; + return _INTC_MK(fn, mode, + intc_get_reg(d, reg_e), + intc_get_reg(d, reg_d), + 1, + (mr->reg_width - 1) - j); + } + } + + return 0; +} +#endif + static unsigned int __init intc_sense_data(struct intc_desc *desc, struct intc_desc_int *d, intc_enum enum_id) @@ -530,6 +600,11 @@ static void __init intc_register_irq(struct intc_desc *desc, /* irq should be disabled by default */ d->chip.mask(irq); + +#ifdef CONFIG_CPU_SH3 + if (desc->ack_regs) + ack_handle[irq] = intc_ack_data(desc, d, enum_id); +#endif } static unsigned int __init save_reg(struct intc_desc_int *d, @@ -560,6 +635,9 @@ void __init register_intc_controller(struct intc_desc *desc) d->nr_reg += desc->prio_regs ? desc->nr_prio_regs * 2 : 0; d->nr_reg += desc->sense_regs ? desc->nr_sense_regs : 0; +#ifdef CONFIG_CPU_SH3 + d->nr_reg += desc->ack_regs ? desc->nr_ack_regs : 0; +#endif d->reg = alloc_bootmem(d->nr_reg * sizeof(*d->reg)); #ifdef CONFIG_SMP d->smp = alloc_bootmem(d->nr_reg * sizeof(*d->smp)); @@ -592,14 +670,23 @@ void __init register_intc_controller(struct intc_desc *desc) } } - BUG_ON(k > 256); /* _INTC_ADDR_E() and _INTC_ADDR_D() are 8 bits */ - d->chip.name = desc->name; d->chip.mask = intc_disable; d->chip.unmask = intc_enable; d->chip.mask_ack = intc_disable; d->chip.set_type = intc_set_sense; +#ifdef CONFIG_CPU_SH3 + if (desc->ack_regs) { + for (i = 0; i < desc->nr_ack_regs; i++) + k += save_reg(d, k, desc->ack_regs[i].set_reg, 0); + + d->chip.mask_ack = intc_mask_ack; + } +#endif + + BUG_ON(k > 256); /* _INTC_ADDR_E() and _INTC_ADDR_D() are 8 bits */ + for (i = 0; i < desc->nr_vectors; i++) { struct intc_vect *vect = desc->vectors + i; diff --git a/arch/sh/kernel/cpu/sh2a/fpu.c b/arch/sh/kernel/cpu/sh2a/fpu.c index 5627c0b3ffa..6df2fb98eb3 100644 --- a/arch/sh/kernel/cpu/sh2a/fpu.c +++ b/arch/sh/kernel/cpu/sh2a/fpu.c @@ -300,7 +300,7 @@ static int denormal_addf(int hx, int hy) iy = hy & 0x7fffffff; if (iy < 0x00800000) { ix = denormal_subf1(ix, iy); - if (ix < 0) { + if ((int) ix < 0) { ix = -ix; sign ^= 0x80000000; } @@ -385,7 +385,7 @@ static long long denormal_addd(long long hx, long long hy) iy = hy & 0x7fffffffffffffffLL; if (iy < 0x0010000000000000LL) { ix = denormal_subd1(ix, iy); - if (ix < 0) { + if ((int) ix < 0) { ix = -ix; sign ^= 0x8000000000000000LL; } diff --git a/arch/sh/kernel/cpu/sh3/Makefile b/arch/sh/kernel/cpu/sh3/Makefile index 3ae4d9111f1..511de55af83 100644 --- a/arch/sh/kernel/cpu/sh3/Makefile +++ b/arch/sh/kernel/cpu/sh3/Makefile @@ -2,7 +2,7 @@ # Makefile for the Linux/SuperH SH-3 backends. # -obj-y := ex.o probe.o entry.o +obj-y := ex.o probe.o entry.o setup-sh3.o # CPU subtype setup obj-$(CONFIG_CPU_SUBTYPE_SH7705) += setup-sh7705.o diff --git a/arch/sh/kernel/cpu/sh3/setup-sh3.c b/arch/sh/kernel/cpu/sh3/setup-sh3.c new file mode 100644 index 00000000000..c9884685785 --- /dev/null +++ b/arch/sh/kernel/cpu/sh3/setup-sh3.c @@ -0,0 +1,71 @@ +/* + * Shared SH3 Setup code + * + * Copyright (C) 2008 Magnus Damm + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#include <linux/init.h> +#include <linux/irq.h> +#include <linux/io.h> + +/* All SH3 devices are equipped with IRQ0->5 (except sh7708) */ + +enum { + UNUSED = 0, + + /* interrupt sources */ + IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, +}; + +static struct intc_vect vectors_irq0123[] __initdata = { + INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620), + INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660), +}; + +static struct intc_vect vectors_irq45[] __initdata = { + INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), +}; + +static struct intc_prio_reg prio_registers[] __initdata = { + { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } }, + { 0xa4000018, 0, 16, 4, /* IPRD */ { 0, 0, IRQ5, IRQ4 } }, +}; + +static struct intc_mask_reg ack_registers[] __initdata = { + { 0xa4000004, 0, 8, /* IRR0 */ + { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } }, +}; + +static struct intc_sense_reg sense_registers[] __initdata = { + { 0xa4000010, 16, 2, { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } }, +}; + +static DECLARE_INTC_DESC_ACK(intc_desc_irq0123, "sh3-irq0123", + vectors_irq0123, NULL, NULL, + prio_registers, sense_registers, ack_registers); + +static DECLARE_INTC_DESC_ACK(intc_desc_irq45, "sh3-irq45", + vectors_irq45, NULL, NULL, + prio_registers, sense_registers, ack_registers); + +#define INTC_ICR1 0xa4000010UL +#define INTC_ICR1_IRQLVL (1<<14) + +void __init plat_irq_setup_pins(int mode) +{ + if (mode == IRQ_MODE_IRQ) { + ctrl_outw(ctrl_inw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1); + register_intc_controller(&intc_desc_irq0123); + return; + } + BUG(); +} + +void __init plat_irq_setup_sh3(void) +{ + register_intc_controller(&intc_desc_irq45); +} diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c index f581534cb73..6468ae86b94 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c @@ -37,7 +37,7 @@ enum { }; static struct intc_vect vectors[] __initdata = { - INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), + /* IRQ0->5 are handled in setup-sh3.c */ INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720), INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820), INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860), @@ -48,7 +48,7 @@ static struct intc_vect vectors[] __initdata = { INTC_VECT(ADC_ADI, 0x980), INTC_VECT(USB_USI0, 0xa20), INTC_VECT(USB_USI1, 0xa40), INTC_VECT(TPU0, 0xc00), INTC_VECT(TPU1, 0xc20), - INTC_VECT(TPU3, 0xc80), INTC_VECT(TPU1, 0xca0), + INTC_VECT(TPU2, 0xc80), INTC_VECT(TPU3, 0xca0), INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460), INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0), @@ -81,14 +81,6 @@ static struct intc_prio_reg prio_registers[] __initdata = { static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, groups, NULL, prio_registers, NULL); -static struct intc_vect vectors_irq[] __initdata = { - INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620), - INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660), -}; - -static DECLARE_INTC_DESC(intc_desc_irq, "sh7705-irq", vectors_irq, NULL, - NULL, prio_registers, NULL); - static struct plat_sci_port sci_platform_data[] = { { .mapbase = 0xa4410000, @@ -159,16 +151,8 @@ static int __init sh7705_devices_setup(void) } __initcall(sh7705_devices_setup); -void __init plat_irq_setup_pins(int mode) -{ - if (mode == IRQ_MODE_IRQ) { - register_intc_controller(&intc_desc_irq); - return; - } - BUG(); -} - void __init plat_irq_setup(void) { register_intc_controller(&intc_desc); + plat_irq_setup_sh3(); } diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c index d3733b13ea5..93c55e2ed95 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c @@ -52,7 +52,7 @@ static struct intc_vect vectors[] __initdata = { #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \ defined(CONFIG_CPU_SUBTYPE_SH7707) || \ defined(CONFIG_CPU_SUBTYPE_SH7709) - INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), + /* IRQ0->5 are handled in setup-sh3.c */ INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820), INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860), INTC_VECT(ADC_ADI, 0x980), @@ -104,18 +104,6 @@ static struct intc_prio_reg prio_registers[] __initdata = { static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, groups, NULL, prio_registers, NULL); -#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \ - defined(CONFIG_CPU_SUBTYPE_SH7707) || \ - defined(CONFIG_CPU_SUBTYPE_SH7709) -static struct intc_vect vectors_irq[] __initdata = { - INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620), - INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660), -}; - -static DECLARE_INTC_DESC(intc_desc_irq, "sh770x-irq", vectors_irq, NULL, - NULL, prio_registers, NULL); -#endif - static struct resource rtc_resources[] = { [0] = { .start = 0xfffffec0, @@ -194,24 +182,12 @@ static int __init sh770x_devices_setup(void) } __initcall(sh770x_devices_setup); -#define INTC_ICR1 0xa4000010UL -#define INTC_ICR1_IRQLVL (1<<14) - -void __init plat_irq_setup_pins(int mode) +void __init plat_irq_setup(void) { - if (mode == IRQ_MODE_IRQ) { + register_intc_controller(&intc_desc); #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \ defined(CONFIG_CPU_SUBTYPE_SH7707) || \ defined(CONFIG_CPU_SUBTYPE_SH7709) - ctrl_outw(ctrl_inw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1); - register_intc_controller(&intc_desc_irq); - return; + plat_irq_setup_sh3(); #endif - } - BUG(); -} - -void __init plat_irq_setup(void) -{ - register_intc_controller(&intc_desc); } diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c index 7406c9ad925..77eee481de4 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c @@ -38,7 +38,7 @@ enum { }; static struct intc_vect vectors[] __initdata = { - INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), + /* IRQ0->5 are handled in setup-sh3.c */ INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820), INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860), INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0), @@ -79,10 +79,7 @@ static struct intc_prio_reg prio_registers[] __initdata = { { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } }, { 0xa4000018, 0, 16, 4, /* IPRD */ { 0, 0, IRQ5, IRQ4 } }, { 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC1, SCIF0, SCIF1 } }, - { 0xa4080000, 0, 16, 4, /* IPRF */ { 0, DMAC2 } }, -#ifdef CONFIG_CPU_SUBTYPE_SH7710 - { 0xa4080000, 0, 16, 4, /* IPRF */ { IPSEC } }, -#endif + { 0xa4080000, 0, 16, 4, /* IPRF */ { IPSEC, DMAC2 } }, { 0xa4080002, 0, 16, 4, /* IPRG */ { EDMAC0, EDMAC1, EDMAC2 } }, { 0xa4080004, 0, 16, 4, /* IPRH */ { 0, 0, 0, SIOF0 } }, { 0xa4080006, 0, 16, 4, /* IPRI */ { 0, 0, SIOF1 } }, @@ -91,14 +88,6 @@ static struct intc_prio_reg prio_registers[] __initdata = { static DECLARE_INTC_DESC(intc_desc, "sh7710", vectors, groups, NULL, prio_registers, NULL); -static struct intc_vect vectors_irq[] __initdata = { - INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620), - INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660), -}; - -static DECLARE_INTC_DESC(intc_desc_irq, "sh7710-irq", vectors_irq, NULL, - NULL, prio_registers, NULL); - static struct resource rtc_resources[] = { [0] = { .start = 0xa413fec0, @@ -170,16 +159,8 @@ static int __init sh7710_devices_setup(void) } __initcall(sh7710_devices_setup); -void __init plat_irq_setup_pins(int mode) -{ - if (mode == IRQ_MODE_IRQ) { - register_intc_controller(&intc_desc_irq); - return; - } - BUG(); -} - void __init plat_irq_setup(void) { register_intc_controller(&intc_desc); + plat_irq_setup_sh3(); } diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c index 8028082527c..f807a21b066 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c @@ -19,10 +19,6 @@ #include <linux/serial_sci.h> #include <asm/rtc.h> -#define INTC_ICR1 0xA4140010UL -#define INTC_ICR_IRLM 0x4000 -#define INTC_ICR_IRQ (~INTC_ICR_IRLM) - static struct resource rtc_resources[] = { [0] = { .start = 0xa413fec0, @@ -170,6 +166,7 @@ enum { }; static struct intc_vect vectors[] __initdata = { + /* IRQ0->5 are handled in setup-sh3.c */ INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), INTC_VECT(TMU2, 0x440), INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0), INTC_VECT(RTC_CUI, 0x4c0), @@ -214,11 +211,7 @@ static struct intc_prio_reg prio_registers[] __initdata = { { 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } }, { 0xA4140016UL, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } }, { 0xA4140018UL, 0, 16, 4, /* IPRD */ { USBF_SPD, TMU_SUNI, IRQ5, IRQ4 } }, -#if defined(CONFIG_CPU_SUBTYPE_SH7720) { 0xA414001AUL, 0, 16, 4, /* IPRE */ { DMAC1, 0, LCDC, SSL } }, -#else - { 0xA414001AUL, 0, 16, 4, /* IPRE */ { DMAC1, 0, LCDC, 0 } }, -#endif { 0xA4080000UL, 0, 16, 4, /* IPRF */ { ADC, DMAC2, USBFI, CMT } }, { 0xA4080002UL, 0, 16, 4, /* IPRG */ { SCIF0, SCIF1, 0, 0 } }, { 0xA4080004UL, 0, 16, 4, /* IPRH */ { PINT07, PINT815, TPU, IIC } }, @@ -229,32 +222,8 @@ static struct intc_prio_reg prio_registers[] __initdata = { static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, groups, NULL, prio_registers, NULL); -static struct intc_sense_reg sense_registers[] __initdata = { - { INTC_ICR1, 16, 2, { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } }, -}; - -static struct intc_vect vectors_irq[] __initdata = { - INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620), - INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660), - INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), -}; - -static DECLARE_INTC_DESC(intc_irq_desc, "sh7720-irq", vectors_irq, - NULL, NULL, prio_registers, sense_registers); - -void __init plat_irq_setup_pins(int mode) -{ - switch (mode) { - case IRQ_MODE_IRQ: - ctrl_outw(ctrl_inw(INTC_ICR1) & INTC_ICR_IRQ, INTC_ICR1); - register_intc_controller(&intc_irq_desc); - break; - default: - BUG(); - } -} - void __init plat_irq_setup(void) { register_intc_controller(&intc_desc); + plat_irq_setup_sh3(); } diff --git a/arch/sh/kernel/cpu/sh5/entry.S b/arch/sh/kernel/cpu/sh5/entry.S index ba8750176d9..05372ed6c56 100644 --- a/arch/sh/kernel/cpu/sh5/entry.S +++ b/arch/sh/kernel/cpu/sh5/entry.S @@ -143,12 +143,22 @@ resvec_save_area: trap_jtable: .long do_exception_error /* 0x000 */ .long do_exception_error /* 0x020 */ +#ifdef CONFIG_MMU .long tlb_miss_load /* 0x040 */ .long tlb_miss_store /* 0x060 */ +#else + .long do_exception_error + .long do_exception_error +#endif ! ARTIFICIAL pseudo-EXPEVT setting .long do_debug_interrupt /* 0x080 */ +#ifdef CONFIG_MMU .long tlb_miss_load /* 0x0A0 */ .long tlb_miss_store /* 0x0C0 */ +#else + .long do_exception_error + .long do_exception_error +#endif .long do_address_error_load /* 0x0E0 */ .long do_address_error_store /* 0x100 */ #ifdef CONFIG_SH_FPU @@ -185,10 +195,18 @@ trap_jtable: .endr .long do_IRQ /* 0xA00 */ .long do_IRQ /* 0xA20 */ +#ifdef CONFIG_MMU .long itlb_miss_or_IRQ /* 0xA40 */ +#else + .long do_IRQ +#endif .long do_IRQ /* 0xA60 */ .long do_IRQ /* 0xA80 */ +#ifdef CONFIG_MMU .long itlb_miss_or_IRQ /* 0xAA0 */ +#else + .long do_IRQ +#endif .long do_exception_error /* 0xAC0 */ .long do_address_error_exec /* 0xAE0 */ .rept 8 @@ -274,6 +292,7 @@ not_a_tlb_miss: * Instead of '.space 1024-TEXT_SIZE' place the RESVEC * block making sure the final alignment is correct. */ +#ifdef CONFIG_MMU tlb_miss: synco /* TAKum03020 (but probably a good idea anyway.) */ putcon SP, KCR1 @@ -377,6 +396,9 @@ fixup_to_invoke_general_handler: getcon KCR1, SP pta handle_exception, tr0 blink tr0, ZERO +#else /* CONFIG_MMU */ + .balign 256 +#endif /* NB TAKE GREAT CARE HERE TO ENSURE THAT THE INTERRUPT CODE DOES END UP AT VBR+0x600 */ @@ -1103,6 +1125,7 @@ restore_all: * fpu_error_or_IRQ? is a helper to deflect to the right cause. * */ +#ifdef CONFIG_MMU tlb_miss_load: or SP, ZERO, r2 or ZERO, ZERO, r3 /* Read */ @@ -1132,6 +1155,7 @@ call_do_page_fault: movi do_page_fault, r6 ptabs r6, tr0 blink tr0, ZERO +#endif /* CONFIG_MMU */ fpu_error_or_IRQA: pta its_IRQ, tr0 @@ -1481,6 +1505,7 @@ poke_real_address_q: ptabs LINK, tr0 blink tr0, r63 +#ifdef CONFIG_MMU /* * --- User Access Handling Section */ @@ -1604,6 +1629,7 @@ ___clear_user_exit: ptabs LINK, tr0 blink tr0, ZERO +#endif /* CONFIG_MMU */ /* * int __strncpy_from_user(unsigned long __dest, unsigned long __src, @@ -2014,9 +2040,11 @@ sa_default_restorer: .global asm_uaccess_start /* Just a marker */ asm_uaccess_start: +#ifdef CONFIG_MMU .long ___copy_user1, ___copy_user_exit .long ___copy_user2, ___copy_user_exit .long ___clear_user1, ___clear_user_exit +#endif .long ___strncpy_from_user1, ___strncpy_from_user_exit .long ___strnlen_user1, ___strnlen_user_exit .long ___get_user_asm_b1, ___get_user_asm_b_exit diff --git a/arch/sh/kernel/cpu/sh5/probe.c b/arch/sh/kernel/cpu/sh5/probe.c index 31f8cb0f637..92ad844b5c1 100644 --- a/arch/sh/kernel/cpu/sh5/probe.c +++ b/arch/sh/kernel/cpu/sh5/probe.c @@ -15,6 +15,7 @@ #include <linux/string.h> #include <asm/processor.h> #include <asm/cache.h> +#include <asm/tlb.h> int __init detect_cpu_and_cache_system(void) { @@ -67,5 +68,8 @@ int __init detect_cpu_and_cache_system(void) set_bit(SH_CACHE_MODE_WB, &(boot_cpu_data.dcache.flags)); #endif + /* Setup some I/D TLB defaults */ + sh64_tlb_init(); + return 0; } diff --git a/arch/sh/kernel/early_printk.c b/arch/sh/kernel/early_printk.c index 957f2561154..6b7d166694e 100644 --- a/arch/sh/kernel/early_printk.c +++ b/arch/sh/kernel/early_printk.c @@ -141,7 +141,9 @@ static void scif_sercon_init(char *s) */ static void scif_sercon_init(char *s) { + struct uart_port *port = &scif_port; unsigned baud = DEFAULT_BAUD; + unsigned int status; char *e; if (*s == ',') @@ -160,19 +162,25 @@ static void scif_sercon_init(char *s) baud = DEFAULT_BAUD; } - ctrl_outw(0, scif_port.mapbase + 8); - ctrl_outw(0, scif_port.mapbase); + do { + status = sci_in(port, SCxSR); + } while (!(status & SCxSR_TEND(port))); + + sci_out(port, SCSCR, 0); /* TE=0, RE=0 */ + sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST); + sci_out(port, SCSMR, 0); /* Set baud rate */ - ctrl_outb((CONFIG_SH_PCLK_FREQ + 16 * baud) / - (32 * baud) - 1, scif_port.mapbase + 4); - - ctrl_outw(12, scif_port.mapbase + 24); - ctrl_outw(8, scif_port.mapbase + 24); - ctrl_outw(0, scif_port.mapbase + 32); - ctrl_outw(0x60, scif_port.mapbase + 16); - ctrl_outw(0, scif_port.mapbase + 36); - ctrl_outw(0x30, scif_port.mapbase + 8); + sci_out(port, SCBRR, (CONFIG_SH_PCLK_FREQ + 16 * baud) / + (32 * baud) - 1); + udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */ + + sci_out(port, SCSPTR, 0); + sci_out(port, SCxSR, 0x60); + sci_out(port, SCLSR, 0); + + sci_out(port, SCFCR, 0); + sci_out(port, SCSCR, 0x30); /* TE=1, RE=1 */ } #endif /* defined(CONFIG_CPU_SUBTYPE_SH7720) */ #endif /* !defined(CONFIG_SH_STANDARD_BIOS) */ diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c index 284f66f1ebb..516bde9c50f 100644 --- a/arch/sh/kernel/setup.c +++ b/arch/sh/kernel/setup.c @@ -53,6 +53,7 @@ EXPORT_SYMBOL(cpu_data); * sh_mv= on the command line, prior to .machvec.init teardown. */ struct sh_machine_vector sh_mv = { .mv_name = "generic", }; +EXPORT_SYMBOL(sh_mv); #ifdef CONFIG_VT struct screen_info screen_info; @@ -76,11 +77,18 @@ static struct resource data_resource = { .flags = IORESOURCE_BUSY | IORESOURCE_MEM, }; +static struct resource bss_resource = { + .name = "Kernel bss", + .flags = IORESOURCE_BUSY | IORESOURCE_MEM, +}; + unsigned long memory_start; EXPORT_SYMBOL(memory_start); unsigned long memory_end = 0; EXPORT_SYMBOL(memory_end); +static struct resource mem_resources[MAX_NUMNODES]; + int l1i_cache_shape, l1d_cache_shape, l2_cache_shape; static int __init early_parse_mem(char *p) @@ -169,6 +177,40 @@ static inline void __init reserve_crashkernel(void) {} #endif +void __init __add_active_range(unsigned int nid, unsigned long start_pfn, + unsigned long end_pfn) +{ + struct resource *res = &mem_resources[nid]; + + WARN_ON(res->name); /* max one active range per node for now */ + + res->name = "System RAM"; + res->start = start_pfn << PAGE_SHIFT; + res->end = (end_pfn << PAGE_SHIFT) - 1; + res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; + if (request_resource(&iomem_resource, res)) { + pr_err("unable to request memory_resource 0x%lx 0x%lx\n", + start_pfn, end_pfn); + return; + } + + /* + * We don't know which RAM region contains kernel data, + * so we try it repeatedly and let the resource manager + * test it. + */ + request_resource(res, &code_resource); + request_resource(res, &data_resource); + request_resource(res, &bss_resource); + +#ifdef CONFIG_KEXEC + if (crashk_res.start != crashk_res.end) + request_resource(res, &crashk_res); +#endif + + add_active_range(nid, start_pfn, end_pfn); +} + void __init setup_bootmem_allocator(unsigned long free_pfn) { unsigned long bootmap_size; @@ -181,7 +223,7 @@ void __init setup_bootmem_allocator(unsigned long free_pfn) bootmap_size = init_bootmem_node(NODE_DATA(0), free_pfn, min_low_pfn, max_low_pfn); - add_active_range(0, min_low_pfn, max_low_pfn); + __add_active_range(0, min_low_pfn, max_low_pfn); register_bootmem_low_pages(); node_set_online(0); @@ -267,6 +309,8 @@ void __init setup_arch(char **cmdline_p) code_resource.end = virt_to_phys(_etext)-1; data_resource.start = virt_to_phys(_etext); data_resource.end = virt_to_phys(_edata)-1; + bss_resource.start = virt_to_phys(__bss_start); + bss_resource.end = virt_to_phys(_ebss)-1; memory_start = (unsigned long)__va(__MEMORY_START); if (!memory_end) diff --git a/arch/sh/kernel/sh_ksyms_32.c b/arch/sh/kernel/sh_ksyms_32.c index 6d405462cee..8f916536719 100644 --- a/arch/sh/kernel/sh_ksyms_32.c +++ b/arch/sh/kernel/sh_ksyms_32.c @@ -20,8 +20,6 @@ extern int dump_fpu(struct pt_regs *, elf_fpregset_t *); extern struct hw_interrupt_type no_irq_type; -EXPORT_SYMBOL(sh_mv); - /* platform dependent support */ EXPORT_SYMBOL(dump_fpu); EXPORT_SYMBOL(kernel_thread); diff --git a/arch/sh/kernel/sh_ksyms_64.c b/arch/sh/kernel/sh_ksyms_64.c index a310c9707f0..9324d32adac 100644 --- a/arch/sh/kernel/sh_ksyms_64.c +++ b/arch/sh/kernel/sh_ksyms_64.c @@ -16,6 +16,7 @@ #include <linux/in6.h> #include <linux/interrupt.h> #include <linux/screen_info.h> +#include <asm/cacheflush.h> #include <asm/processor.h> #include <asm/uaccess.h> #include <asm/checksum.h> @@ -29,25 +30,50 @@ extern int dump_fpu(struct pt_regs *, elf_fpregset_t *); EXPORT_SYMBOL(dump_fpu); EXPORT_SYMBOL(kernel_thread); +#if !defined(CONFIG_CACHE_OFF) && defined(CONFIG_MMU) +EXPORT_SYMBOL(clear_user_page); +#endif + +#ifndef CONFIG_CACHE_OFF +EXPORT_SYMBOL(flush_dcache_page); +#endif + /* Networking helper routines. */ +EXPORT_SYMBOL(csum_partial); EXPORT_SYMBOL(csum_partial_copy_nocheck); +#ifdef CONFIG_IPV6 +EXPORT_SYMBOL(csum_ipv6_magic); +#endif #ifdef CONFIG_VT EXPORT_SYMBOL(screen_info); #endif +EXPORT_SYMBOL(__put_user_asm_b); +EXPORT_SYMBOL(__put_user_asm_w); EXPORT_SYMBOL(__put_user_asm_l); +EXPORT_SYMBOL(__put_user_asm_q); +EXPORT_SYMBOL(__get_user_asm_b); +EXPORT_SYMBOL(__get_user_asm_w); EXPORT_SYMBOL(__get_user_asm_l); +EXPORT_SYMBOL(__get_user_asm_q); +EXPORT_SYMBOL(__strnlen_user); +EXPORT_SYMBOL(__strncpy_from_user); +EXPORT_SYMBOL(clear_page); +EXPORT_SYMBOL(__clear_user); EXPORT_SYMBOL(copy_page); EXPORT_SYMBOL(__copy_user); EXPORT_SYMBOL(empty_zero_page); EXPORT_SYMBOL(memcpy); EXPORT_SYMBOL(__udelay); EXPORT_SYMBOL(__ndelay); +EXPORT_SYMBOL(__const_udelay); /* Ugh. These come in from libgcc.a at link time. */ #define DECLARE_EXPORT(name) extern void name(void);EXPORT_SYMBOL(name) DECLARE_EXPORT(__sdivsi3); +DECLARE_EXPORT(__sdivsi3_2); DECLARE_EXPORT(__muldi3); DECLARE_EXPORT(__udivsi3); +DECLARE_EXPORT(__div_table); diff --git a/arch/sh/kernel/time_64.c b/arch/sh/kernel/time_64.c index 898977ee203..022a55f1c1d 100644 --- a/arch/sh/kernel/time_64.c +++ b/arch/sh/kernel/time_64.c @@ -172,6 +172,7 @@ void do_gettimeofday(struct timeval *tv) tv->tv_sec = sec; tv->tv_usec = usec; } +EXPORT_SYMBOL(do_gettimeofday); int do_settimeofday(struct timespec *tv) { @@ -240,7 +241,7 @@ static inline void do_timer_interrupt(void) * the irq version of write_lock because as just said we have irq * locally disabled. -arca */ - write_lock(&xtime_lock); + write_seqlock(&xtime_lock); asm ("getcon cr62, %0" : "=r" (current_ctc)); ctc_last_interrupt = (unsigned long) current_ctc; @@ -266,7 +267,7 @@ static inline void do_timer_interrupt(void) /* do it again in 60 s */ last_rtc_update = xtime.tv_sec - 600; } - write_unlock(&xtime_lock); + write_sequnlock(&xtime_lock); #ifndef CONFIG_SMP update_process_times(user_mode(get_irq_regs())); diff --git a/arch/sh/lib64/dbg.c b/arch/sh/lib64/dbg.c index 75825ef6e08..2fb8eaf6de6 100644 --- a/arch/sh/lib64/dbg.c +++ b/arch/sh/lib64/dbg.c @@ -186,8 +186,8 @@ void evt_debug(int evt, int ret_addr, int event, int tra, struct pt_regs *regs) rr->pc = regs->pc; if (sp < stack_bottom + 3092) { - printk("evt_debug : stack underflow report\n"); int i, j; + printk("evt_debug : stack underflow report\n"); for (j=0, i = event_ptr; j<16; j++) { rr = event_ring + i; printk("evt=%08x event=%08x tra=%08x pid=%5d sp=%08lx pc=%08lx\n", diff --git a/arch/sh/mm/Makefile_64 b/arch/sh/mm/Makefile_64 index cbd6aa33c5a..0d92a8a3ac9 100644 --- a/arch/sh/mm/Makefile_64 +++ b/arch/sh/mm/Makefile_64 @@ -2,10 +2,11 @@ # Makefile for the Linux SuperH-specific parts of the memory manager. # -obj-y := init.o extable_64.o consistent.o +obj-y := init.o consistent.o -mmu-y := tlb-nommu.o pg-nommu.o -mmu-$(CONFIG_MMU) := fault_64.o ioremap_64.o tlbflush_64.o tlb-sh5.o +mmu-y := tlb-nommu.o pg-nommu.o extable_32.o +mmu-$(CONFIG_MMU) := fault_64.o ioremap_64.o tlbflush_64.o tlb-sh5.o \ + extable_64.o ifndef CONFIG_CACHE_OFF obj-y += cache-sh5.o diff --git a/arch/sh/mm/cache-sh5.c b/arch/sh/mm/cache-sh5.c index 3877321fced..9e277ec7d53 100644 --- a/arch/sh/mm/cache-sh5.c +++ b/arch/sh/mm/cache-sh5.c @@ -714,6 +714,7 @@ void flush_cache_sigtramp(unsigned long vaddr) sh64_icache_inv_current_user_range(vaddr, end); } +#ifdef CONFIG_MMU /* * These *MUST* lie in an area of virtual address space that's otherwise * unused. @@ -830,3 +831,4 @@ void clear_user_page(void *to, unsigned long address, struct page *page) else sh64_clear_user_page_coloured(to, address); } +#endif diff --git a/arch/sh/mm/ioremap_64.c b/arch/sh/mm/ioremap_64.c index cea224c3e49..6e0be24d26e 100644 --- a/arch/sh/mm/ioremap_64.c +++ b/arch/sh/mm/ioremap_64.c @@ -343,6 +343,7 @@ unsigned long onchip_remap(unsigned long phys, unsigned long size, const char *n return shmedia_alloc_io(phys, size, name); } +EXPORT_SYMBOL(onchip_remap); void onchip_unmap(unsigned long vaddr) { @@ -370,6 +371,7 @@ void onchip_unmap(unsigned long vaddr) kfree(res); } } +EXPORT_SYMBOL(onchip_unmap); #ifdef CONFIG_PROC_FS static int diff --git a/arch/sh/mm/numa.c b/arch/sh/mm/numa.c index 2de7302724f..1663199ce88 100644 --- a/arch/sh/mm/numa.c +++ b/arch/sh/mm/numa.c @@ -59,7 +59,7 @@ void __init setup_bootmem_node(int nid, unsigned long start, unsigned long end) free_pfn = start_pfn = start >> PAGE_SHIFT; end_pfn = end >> PAGE_SHIFT; - add_active_range(nid, start_pfn, end_pfn); + __add_active_range(nid, start_pfn, end_pfn); /* Node-local pgdat */ NODE_DATA(nid) = pfn_to_kaddr(free_pfn); diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types index 987c6682bf9..1bba7d36be9 100644 --- a/arch/sh/tools/mach-types +++ b/arch/sh/tools/mach-types @@ -28,7 +28,6 @@ HD64465 HD64465 7751SYSTEMH SH_7751_SYSTEMH HP6XX SH_HP6XX DREAMCAST SH_DREAMCAST -MPC1211 SH_MPC1211 SNAPGEAR SH_SECUREEDGE5410 EDOSK7705 SH_EDOSK7705 SH4202_MICRODEV SH_SH4202_MICRODEV diff --git a/drivers/input/serio/i8042-io.h b/drivers/input/serio/i8042-io.h index 3b4e13b9ce1..f451c7351a9 100644 --- a/drivers/input/serio/i8042-io.h +++ b/drivers/input/serio/i8042-io.h @@ -25,7 +25,7 @@ #elif defined(__arm__) /* defined in include/asm-arm/arch-xxx/irqs.h */ #include <asm/irq.h> -#elif defined(CONFIG_SUPERH64) +#elif defined(CONFIG_SH_CAYMAN) #include <asm/irq.h> #else # define I8042_KBD_IRQ 1 diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig index 1bd69aa9e22..17bc87a43ff 100644 --- a/drivers/mtd/maps/Kconfig +++ b/drivers/mtd/maps/Kconfig @@ -374,7 +374,7 @@ config MTD_REDWOOD config MTD_SOLUTIONENGINE tristate "CFI Flash device mapped on Hitachi SolutionEngine" - depends on SUPERH && MTD_CFI && MTD_REDBOOT_PARTS + depends on SUPERH && SOLUTION_ENGINE && MTD_CFI && MTD_REDBOOT_PARTS help This enables access to the flash chips on the Hitachi SolutionEngine and similar boards. Say 'Y' if you are building a kernel for such a board. @@ -480,13 +480,6 @@ config MTD_H720X This enables access to the flash chips on the Hynix evaluation boards. If you have such a board, say 'Y'. -config MTD_MPC1211 - tristate "CFI Flash device mapped on Interface MPC-1211" - depends on SH_MPC1211 && MTD_CFI - help - This enables access to the flash chips on the Interface MPC-1211(CTP/PCI/MPC-SH02). - If you have such a board, say 'Y'. - config MTD_OMAP_NOR tristate "TI OMAP board mappings" depends on MTD_CFI && ARCH_OMAP diff --git a/drivers/mtd/maps/Makefile b/drivers/mtd/maps/Makefile index a9cbe80f99a..957fb5f70f5 100644 --- a/drivers/mtd/maps/Makefile +++ b/drivers/mtd/maps/Makefile @@ -58,7 +58,6 @@ obj-$(CONFIG_MTD_WALNUT) += walnut.o obj-$(CONFIG_MTD_H720X) += h720x-flash.o obj-$(CONFIG_MTD_SBC8240) += sbc8240.o obj-$(CONFIG_MTD_NOR_TOTO) += omap-toto-flash.o -obj-$(CONFIG_MTD_MPC1211) += mpc1211.o obj-$(CONFIG_MTD_IXP4XX) += ixp4xx.o obj-$(CONFIG_MTD_IXP2000) += ixp2000.o obj-$(CONFIG_MTD_WRSBC8260) += wr_sbc82xx_flash.o diff --git a/drivers/mtd/maps/mpc1211.c b/drivers/mtd/maps/mpc1211.c deleted file mode 100644 index 45a00fac88a..00000000000 --- a/drivers/mtd/maps/mpc1211.c +++ /dev/null @@ -1,80 +0,0 @@ -/* - * Flash on MPC-1211 - * - * $Id: mpc1211.c,v 1.4 2004/09/16 23:27:13 gleixner Exp $ - * - * (C) 2002 Interface, Saito.K & Jeanne - * - * GPL'd - */ - -#include <linux/module.h> -#include <linux/types.h> -#include <linux/kernel.h> -#include <asm/io.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/map.h> -#include <linux/mtd/partitions.h> - -static struct mtd_info *flash_mtd; -static struct mtd_partition *parsed_parts; - -struct map_info mpc1211_flash_map = { - .name = "MPC-1211 FLASH", - .size = 0x80000, - .bankwidth = 1, -}; - -static struct mtd_partition mpc1211_partitions[] = { - { - .name = "IPL & ETH-BOOT", - .offset = 0x00000000, - .size = 0x10000, - }, - { - .name = "Flash FS", - .offset = 0x00010000, - .size = MTDPART_SIZ_FULL, - } -}; - -static int __init init_mpc1211_maps(void) -{ - int nr_parts; - - mpc1211_flash_map.phys = 0; - mpc1211_flash_map.virt = (void __iomem *)P2SEGADDR(0); - - simple_map_init(&mpc1211_flash_map); - - printk(KERN_NOTICE "Probing for flash chips at 0x00000000:\n"); - flash_mtd = do_map_probe("jedec_probe", &mpc1211_flash_map); - if (!flash_mtd) { - printk(KERN_NOTICE "Flash chips not detected at either possible location.\n"); - return -ENXIO; - } - printk(KERN_NOTICE "MPC-1211: Flash at 0x%08lx\n", mpc1211_flash_map.virt & 0x1fffffff); - flash_mtd->module = THIS_MODULE; - - parsed_parts = mpc1211_partitions; - nr_parts = ARRAY_SIZE(mpc1211_partitions); - - add_mtd_partitions(flash_mtd, parsed_parts, nr_parts); - return 0; -} - -static void __exit cleanup_mpc1211_maps(void) -{ - if (parsed_parts) - del_mtd_partitions(flash_mtd); - else - del_mtd_device(flash_mtd); - map_destroy(flash_mtd); -} - -module_init(init_mpc1211_maps); -module_exit(cleanup_mpc1211_maps); - -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Saito.K & Jeanne <ksaito@interface.co.jp>"); -MODULE_DESCRIPTION("MTD map driver for MPC-1211 boards. Interface"); diff --git a/drivers/rtc/rtc-sh.c b/drivers/rtc/rtc-sh.c index 110699bb478..1f88e9e914e 100644 --- a/drivers/rtc/rtc-sh.c +++ b/drivers/rtc/rtc-sh.c @@ -616,7 +616,7 @@ static int __devinit sh_rtc_probe(struct platform_device *pdev) goto err_badres; } - rtc->regbase = (void __iomem *)rtc->res->start; + rtc->regbase = ioremap_nocache(rtc->res->start, rtc->regsize); if (unlikely(!rtc->regbase)) { ret = -EINVAL; goto err_badmap; @@ -626,7 +626,7 @@ static int __devinit sh_rtc_probe(struct platform_device *pdev) &sh_rtc_ops, THIS_MODULE); if (IS_ERR(rtc->rtc_dev)) { ret = PTR_ERR(rtc->rtc_dev); - goto err_badmap; + goto err_unmap; } rtc->capabilities = RTC_DEF_CAPABILITIES; @@ -653,7 +653,7 @@ static int __devinit sh_rtc_probe(struct platform_device *pdev) dev_err(&pdev->dev, "request period IRQ failed with %d, IRQ %d\n", ret, rtc->periodic_irq); - goto err_badmap; + goto err_unmap; } ret = request_irq(rtc->carry_irq, sh_rtc_interrupt, IRQF_DISABLED, @@ -663,7 +663,7 @@ static int __devinit sh_rtc_probe(struct platform_device *pdev) "request carry IRQ failed with %d, IRQ %d\n", ret, rtc->carry_irq); free_irq(rtc->periodic_irq, rtc); - goto err_badmap; + goto err_unmap; } ret = request_irq(rtc->alarm_irq, sh_rtc_alarm, IRQF_DISABLED, @@ -674,7 +674,7 @@ static int __devinit sh_rtc_probe(struct platform_device *pdev) rtc->alarm_irq); free_irq(rtc->carry_irq, rtc); free_irq(rtc->periodic_irq, rtc); - goto err_badmap; + goto err_unmap; } tmp = readb(rtc->regbase + RCR1); @@ -684,6 +684,8 @@ static int __devinit sh_rtc_probe(struct platform_device *pdev) return 0; +err_unmap: + iounmap(rtc->regbase); err_badmap: release_resource(rtc->res); err_badres: @@ -708,6 +710,8 @@ static int __devexit sh_rtc_remove(struct platform_device *pdev) release_resource(rtc->res); + iounmap(rtc->regbase); + platform_set_drvdata(pdev, NULL); kfree(rtc); diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c index 96910618771..8fdafc27fce 100644 --- a/drivers/serial/sh-sci.c +++ b/drivers/serial/sh-sci.c @@ -42,14 +42,12 @@ #include <linux/console.h> #include <linux/platform_device.h> #include <linux/serial_sci.h> - -#ifdef CONFIG_CPU_FREQ #include <linux/notifier.h> #include <linux/cpufreq.h> -#endif - -#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) +#include <linux/clk.h> #include <linux/ctype.h> + +#ifdef CONFIG_SUPERH #include <asm/clock.h> #include <asm/sh_bios.h> #include <asm/kgdb.h> @@ -80,7 +78,7 @@ struct sci_port { struct timer_list break_timer; int break_flag; -#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) +#ifdef CONFIG_SUPERH /* Port clock */ struct clk *clk; #endif @@ -365,21 +363,19 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) { unsigned int fcr_val = 0; + unsigned short data; - if (cflag & CRTSCTS) { - fcr_val |= SCFCR_MCE; - - ctrl_outw(0x0000, PORT_PSCR); - } else { - unsigned short data; - - data = ctrl_inw(PORT_PSCR); - data &= 0x033f; - data |= 0x0400; - ctrl_outw(data, PORT_PSCR); + if (port->mapbase == 0xffe00000) { + data = ctrl_inw(PSCR); + data &= ~0x03cf; + if (cflag & CRTSCTS) + fcr_val |= SCFCR_MCE; + else + data |= 0x0340; - ctrl_outw(ctrl_inw(SCSPTR0) & 0x17, SCSPTR0); + ctrl_outw(data, PSCR); } + /* SCIF1 and SCIF2 should be setup by board code */ sci_out(port, SCFCR, fcr_val); } diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h index fa8700a968f..eb84833233f 100644 --- a/drivers/serial/sh-sci.h +++ b/drivers/serial/sh-sci.h @@ -76,12 +76,13 @@ # define SCSCR_INIT(port) 0x32 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0,CKE=1 */ # define SCIF_ONLY #elif defined(CONFIG_CPU_SUBTYPE_SH7722) -# define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */ -# define SCSPTR0 SCPDR0 +# define PADR 0xA4050120 +# define PSDR 0xA405013e +# define PWDR 0xA4050166 +# define PSCR 0xA405011E # define SCIF_ORER 0x0001 /* overrun error bit */ # define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ # define SCIF_ONLY -# define PORT_PSCR 0xA405011E #elif defined(CONFIG_CPU_SUBTYPE_SH7366) # define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */ # define SCSPTR0 SCPDR0 @@ -320,7 +321,7 @@ unsigned int addr = port->mapbase + (offset); \ if ((size) == 8) { \ ctrl_outb(value, addr); \ - } else { \ + } else if ((size) == 16) { \ ctrl_outw(value, addr); \ } @@ -451,7 +452,11 @@ SCIF_FNS(SCSPTR, 0, 0, 0x24, 16) SCIF_FNS(SCLSR, 0, 0, 0x28, 16) #else SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16) +#if defined(CONFIG_CPU_SUBTYPE_SH7722) +SCIF_FNS(SCSPTR, 0, 0, 0, 0) +#else SCIF_FNS(SCSPTR, 0, 0, 0x20, 16) +#endif SCIF_FNS(SCLSR, 0, 0, 0x24, 16) #endif #endif @@ -593,13 +598,25 @@ static inline int sci_rxd_in(struct uart_port *port) return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ return 1; } -#elif defined(CONFIG_CPU_SUBTYPE_SH7722) || defined(CONFIG_CPU_SUBTYPE_SH7366) +#elif defined(CONFIG_CPU_SUBTYPE_SH7366) static inline int sci_rxd_in(struct uart_port *port) { if (port->mapbase == 0xffe00000) return ctrl_inb(SCPDR0) & 0x0001 ? 1 : 0; /* SCIF0 */ return 1; } +#elif defined(CONFIG_CPU_SUBTYPE_SH7722) +static inline int sci_rxd_in(struct uart_port *port) +{ + if (port->mapbase == 0xffe00000) + return ctrl_inb(PSDR) & 0x02 ? 1 : 0; /* SCIF0 */ + if (port->mapbase == 0xffe10000) + return ctrl_inb(PADR) & 0x40 ? 1 : 0; /* SCIF1 */ + if (port->mapbase == 0xffe20000) + return ctrl_inb(PWDR) & 0x04 ? 1 : 0; /* SCIF2 */ + + return 1; +} #elif defined(CONFIG_CPU_SUBTYPE_SH7723) static inline int sci_rxd_in(struct uart_port *port) { diff --git a/include/asm-sh/cpu-sh3/dma.h b/include/asm-sh/cpu-sh3/dma.h index 092ff9d872c..6813c3220a1 100644 --- a/include/asm-sh/cpu-sh3/dma.h +++ b/include/asm-sh/cpu-sh3/dma.h @@ -3,19 +3,19 @@ #if defined(CONFIG_CPU_SUBTYPE_SH7720) || \ - defined(CONFIG_CPU_SUBTYPE_SH7721) || \ - defined(CONFIG_CPU_SUBTYPE_SH7709) + defined(CONFIG_CPU_SUBTYPE_SH7721) #define SH_DMAC_BASE 0xa4010020 +#else +#define SH_DMAC_BASE 0xa4000020 +#endif +#if defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7709) #define DMTE0_IRQ 48 #define DMTE1_IRQ 49 #define DMTE2_IRQ 50 #define DMTE3_IRQ 51 #define DMTE4_IRQ 76 #define DMTE5_IRQ 77 - -#else -#define SH_DMAC_BASE 0xa4000020 #endif /* Definitions for the SuperH DMAC */ diff --git a/include/asm-sh/hw_irq.h b/include/asm-sh/hw_irq.h index c958fdaa009..7438d1e21bc 100644 --- a/include/asm-sh/hw_irq.h +++ b/include/asm-sh/hw_irq.h @@ -79,6 +79,10 @@ struct intc_desc { struct intc_sense_reg *sense_regs; unsigned int nr_sense_regs; char *name; +#ifdef CONFIG_CPU_SH3 + struct intc_mask_reg *ack_regs; + unsigned int nr_ack_regs; +#endif }; #define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a) @@ -91,10 +95,25 @@ struct intc_desc symbol __initdata = { \ chipname, \ } +#ifdef CONFIG_CPU_SH3 +#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \ + mask_regs, prio_regs, sense_regs, ack_regs) \ +struct intc_desc symbol __initdata = { \ + _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \ + _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \ + _INTC_ARRAY(sense_regs), \ + chipname, \ + _INTC_ARRAY(ack_regs), \ +} +#endif + void __init register_intc_controller(struct intc_desc *desc); int intc_set_priority(unsigned int irq, unsigned int prio); void __init plat_irq_setup(void); +#ifdef CONFIG_CPU_SH3 +void __init plat_irq_setup_sh3(void); +#endif enum { IRQ_MODE_IRQ, IRQ_MODE_IRQ7654, IRQ_MODE_IRQ3210, IRQ_MODE_IRL7654_MASK, IRQ_MODE_IRL3210_MASK, diff --git a/include/asm-sh/io.h b/include/asm-sh/io.h index 356e50d0674..a4fbf0c84fb 100644 --- a/include/asm-sh/io.h +++ b/include/asm-sh/io.h @@ -268,11 +268,6 @@ unsigned long long peek_real_address_q(unsigned long long addr); unsigned long long poke_real_address_q(unsigned long long addr, unsigned long long val); -/* arch/sh/mm/ioremap_64.c */ -unsigned long onchip_remap(unsigned long addr, unsigned long size, - const char *name); -extern void onchip_unmap(unsigned long vaddr); - #if !defined(CONFIG_MMU) #define virt_to_phys(address) ((unsigned long)(address)) #define phys_to_virt(address) ((void *)(address)) @@ -302,9 +297,16 @@ extern void onchip_unmap(unsigned long vaddr); void __iomem *__ioremap(unsigned long offset, unsigned long size, unsigned long flags); void __iounmap(void __iomem *addr); + +/* arch/sh/mm/ioremap_64.c */ +unsigned long onchip_remap(unsigned long addr, unsigned long size, + const char *name); +extern void onchip_unmap(unsigned long vaddr); #else #define __ioremap(offset, size, flags) ((void __iomem *)(offset)) #define __iounmap(addr) do { } while (0) +#define onchip_remap(addr, size, name) (addr) +#define onchip_unmap(addr) do { } while (0) #endif /* CONFIG_MMU */ static inline void __iomem * diff --git a/include/asm-sh/keyboard.h b/include/asm-sh/keyboard.h deleted file mode 100644 index 31dcc4fa5f2..00000000000 --- a/include/asm-sh/keyboard.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef __ASM_SH_KEYBOARD_H -#define __ASM_SH_KEYBOARD_H -/* - * $Id: keyboard.h,v 1.1.1.1 2001/10/15 20:45:09 mrbrown Exp $ - */ - -#include <linux/kd.h> -#include <asm/machvec.h> - -#ifdef CONFIG_SH_MPC1211 -#include <asm/mpc1211/keyboard-mpc1211.h> -#endif -#endif diff --git a/include/asm-sh/mmu_context.h b/include/asm-sh/mmu_context.h index fe58d00b250..87e812f68bb 100644 --- a/include/asm-sh/mmu_context.h +++ b/include/asm-sh/mmu_context.h @@ -27,6 +27,7 @@ /* ASID is 8-bit value, so it can't be 0x100 */ #define MMU_NO_ASID 0x100 +#ifdef CONFIG_MMU #define asid_cache(cpu) (cpu_data[cpu].asid_cache) #define cpu_context(cpu, mm) ((mm)->context.id[cpu]) @@ -38,7 +39,6 @@ */ #define MMU_VPN_MASK 0xfffff000 -#ifdef CONFIG_MMU #if defined(CONFIG_SUPERH32) #include "mmu_context_32.h" #else @@ -129,6 +129,8 @@ static inline void switch_mm(struct mm_struct *prev, #define destroy_context(mm) do { } while (0) #define set_asid(asid) do { } while (0) #define get_asid() (0) +#define cpu_asid(cpu, mm) ({ (void)cpu; 0; }) +#define switch_and_save_asid(asid) (0) #define set_TTB(pgd) do { } while (0) #define get_TTB() (0) #define activate_context(mm,cpu) do { } while (0) diff --git a/include/asm-sh/mmzone.h b/include/asm-sh/mmzone.h index 7969f381dff..2969253c404 100644 --- a/include/asm-sh/mmzone.h +++ b/include/asm-sh/mmzone.h @@ -41,6 +41,8 @@ void __init plat_mem_setup(void); /* arch/sh/kernel/setup.c */ void __init setup_bootmem_allocator(unsigned long start_pfn); +void __init __add_active_range(unsigned int nid, unsigned long start_pfn, + unsigned long end_pfn); #endif /* __KERNEL__ */ #endif /* __ASM_SH_MMZONE_H */ diff --git a/include/asm-sh/mpc1211/dma.h b/include/asm-sh/mpc1211/dma.h deleted file mode 100644 index e506d1aaa0d..00000000000 --- a/include/asm-sh/mpc1211/dma.h +++ /dev/null @@ -1,303 +0,0 @@ -/* $Id: dma.h,v 1.7 1992/12/14 00:29:34 root Exp root $ - * linux/include/asm/dma.h: Defines for using and allocating dma channels. - * Written by Hennus Bergman, 1992. - * High DMA channel support & info by Hannu Savolainen - * and John Boyd, Nov. 1992. - */ - -#ifndef _ASM_MPC1211_DMA_H -#define _ASM_MPC1211_DMA_H - -#include <linux/spinlock.h> /* And spinlocks */ -#include <asm/io.h> /* need byte IO */ -#include <linux/delay.h> - - -#ifdef HAVE_REALLY_SLOW_DMA_CONTROLLER -#define dma_outb outb_p -#else -#define dma_outb outb -#endif - -#define dma_inb inb - -/* - * NOTES about DMA transfers: - * - * controller 1: channels 0-3, byte operations, ports 00-1F - * controller 2: channels 4-7, word operations, ports C0-DF - * - * - ALL registers are 8 bits only, regardless of transfer size - * - channel 4 is not used - cascades 1 into 2. - * - channels 0-3 are byte - addresses/counts are for physical bytes - * - channels 5-7 are word - addresses/counts are for physical words - * - transfers must not cross physical 64K (0-3) or 128K (5-7) boundaries - * - transfer count loaded to registers is 1 less than actual count - * - controller 2 offsets are all even (2x offsets for controller 1) - * - page registers for 5-7 don't use data bit 0, represent 128K pages - * - page registers for 0-3 use bit 0, represent 64K pages - * - * DMA transfers are limited to the lower 16MB of _physical_ memory. - * Note that addresses loaded into registers must be _physical_ addresses, - * not logical addresses (which may differ if paging is active). - * - * Address mapping for channels 0-3: - * - * A23 ... A16 A15 ... A8 A7 ... A0 (Physical addresses) - * | ... | | ... | | ... | - * | ... | | ... | | ... | - * | ... | | ... | | ... | - * P7 ... P0 A7 ... A0 A7 ... A0 - * | Page | Addr MSB | Addr LSB | (DMA registers) - * - * Address mapping for channels 5-7: - * - * A23 ... A17 A16 A15 ... A9 A8 A7 ... A1 A0 (Physical addresses) - * | ... | \ \ ... \ \ \ ... \ \ - * | ... | \ \ ... \ \ \ ... \ (not used) - * | ... | \ \ ... \ \ \ ... \ - * P7 ... P1 (0) A7 A6 ... A0 A7 A6 ... A0 - * | Page | Addr MSB | Addr LSB | (DMA registers) - * - * Again, channels 5-7 transfer _physical_ words (16 bits), so addresses - * and counts _must_ be word-aligned (the lowest address bit is _ignored_ at - * the hardware level, so odd-byte transfers aren't possible). - * - * Transfer count (_not # bytes_) is limited to 64K, represented as actual - * count - 1 : 64K => 0xFFFF, 1 => 0x0000. Thus, count is always 1 or more, - * and up to 128K bytes may be transferred on channels 5-7 in one operation. - * - */ - -#define MAX_DMA_CHANNELS 8 - -/* The maximum address that we can perform a DMA transfer to on this platform */ -#define MAX_DMA_ADDRESS (PAGE_OFFSET+0x10000000) - -/* 8237 DMA controllers */ -#define IO_DMA1_BASE 0x00 /* 8 bit slave DMA, channels 0..3 */ -#define IO_DMA2_BASE 0xC0 /* 16 bit master DMA, ch 4(=slave input)..7 */ - -/* DMA controller registers */ -#define DMA1_CMD_REG 0x08 /* command register (w) */ -#define DMA1_STAT_REG 0x08 /* status register (r) */ -#define DMA1_REQ_REG 0x09 /* request register (w) */ -#define DMA1_MASK_REG 0x0A /* single-channel mask (w) */ -#define DMA1_MODE_REG 0x0B /* mode register (w) */ -#define DMA1_CLEAR_FF_REG 0x0C /* clear pointer flip-flop (w) */ -#define DMA1_TEMP_REG 0x0D /* Temporary Register (r) */ -#define DMA1_RESET_REG 0x0D /* Master Clear (w) */ -#define DMA1_CLR_MASK_REG 0x0E /* Clear Mask */ -#define DMA1_MASK_ALL_REG 0x0F /* all-channels mask (w) */ - -#define DMA2_CMD_REG 0xD0 /* command register (w) */ -#define DMA2_STAT_REG 0xD0 /* status register (r) */ -#define DMA2_REQ_REG 0xD2 /* request register (w) */ -#define DMA2_MASK_REG 0xD4 /* single-channel mask (w) */ -#define DMA2_MODE_REG 0xD6 /* mode register (w) */ -#define DMA2_CLEAR_FF_REG 0xD8 /* clear pointer flip-flop (w) */ -#define DMA2_TEMP_REG 0xDA /* Temporary Register (r) */ -#define DMA2_RESET_REG 0xDA /* Master Clear (w) */ -#define DMA2_CLR_MASK_REG 0xDC /* Clear Mask */ -#define DMA2_MASK_ALL_REG 0xDE /* all-channels mask (w) */ - -#define DMA_ADDR_0 0x00 /* DMA address registers */ -#define DMA_ADDR_1 0x02 -#define DMA_ADDR_2 0x04 -#define DMA_ADDR_3 0x06 -#define DMA_ADDR_4 0xC0 -#define DMA_ADDR_5 0xC4 -#define DMA_ADDR_6 0xC8 -#define DMA_ADDR_7 0xCC - -#define DMA_CNT_0 0x01 /* DMA count registers */ -#define DMA_CNT_1 0x03 -#define DMA_CNT_2 0x05 -#define DMA_CNT_3 0x07 -#define DMA_CNT_4 0xC2 -#define DMA_CNT_5 0xC6 -#define DMA_CNT_6 0xCA -#define DMA_CNT_7 0xCE - -#define DMA_PAGE_0 0x87 /* DMA page registers */ -#define DMA_PAGE_1 0x83 -#define DMA_PAGE_2 0x81 -#define DMA_PAGE_3 0x82 -#define DMA_PAGE_5 0x8B -#define DMA_PAGE_6 0x89 -#define DMA_PAGE_7 0x8A - -#define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */ -#define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */ -#define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */ - -#define DMA_AUTOINIT 0x10 - - -extern spinlock_t dma_spin_lock; - -static __inline__ unsigned long claim_dma_lock(void) -{ - unsigned long flags; - spin_lock_irqsave(&dma_spin_lock, flags); - return flags; -} - -static __inline__ void release_dma_lock(unsigned long flags) -{ - spin_unlock_irqrestore(&dma_spin_lock, flags); -} - -/* enable/disable a specific DMA channel */ -static __inline__ void enable_dma(unsigned int dmanr) -{ - if (dmanr<=3) - dma_outb(dmanr, DMA1_MASK_REG); - else - dma_outb(dmanr & 3, DMA2_MASK_REG); -} - -static __inline__ void disable_dma(unsigned int dmanr) -{ - if (dmanr<=3) - dma_outb(dmanr | 4, DMA1_MASK_REG); - else - dma_outb((dmanr & 3) | 4, DMA2_MASK_REG); -} - -/* Clear the 'DMA Pointer Flip Flop'. - * Write 0 for LSB/MSB, 1 for MSB/LSB access. - * Use this once to initialize the FF to a known state. - * After that, keep track of it. :-) - * --- In order to do that, the DMA routines below should --- - * --- only be used while holding the DMA lock ! --- - */ -static __inline__ void clear_dma_ff(unsigned int dmanr) -{ - if (dmanr<=3) - dma_outb(0, DMA1_CLEAR_FF_REG); - else - dma_outb(0, DMA2_CLEAR_FF_REG); -} - -/* set mode (above) for a specific DMA channel */ -static __inline__ void set_dma_mode(unsigned int dmanr, char mode) -{ - if (dmanr<=3) - dma_outb(mode | dmanr, DMA1_MODE_REG); - else - dma_outb(mode | (dmanr&3), DMA2_MODE_REG); -} - -/* Set only the page register bits of the transfer address. - * This is used for successive transfers when we know the contents of - * the lower 16 bits of the DMA current address register, but a 64k boundary - * may have been crossed. - */ -static __inline__ void set_dma_page(unsigned int dmanr, unsigned int pagenr) -{ - switch(dmanr) { - case 0: - dma_outb( pagenr & 0xff, DMA_PAGE_0); - dma_outb((pagenr >> 8) & 0xff, DMA_PAGE_0 + 0x400); - break; - case 1: - dma_outb( pagenr & 0xff, DMA_PAGE_1); - dma_outb((pagenr >> 8) & 0xff, DMA_PAGE_1 + 0x400); - break; - case 2: - dma_outb( pagenr & 0xff, DMA_PAGE_2); - dma_outb((pagenr >> 8) & 0xff, DMA_PAGE_2 + 0x400); - break; - case 3: - dma_outb( pagenr & 0xff, DMA_PAGE_3); - dma_outb((pagenr >> 8) & 0xff, DMA_PAGE_3 + 0x400); - break; - case 5: - dma_outb( pagenr & 0xfe, DMA_PAGE_5); - dma_outb((pagenr >> 8) & 0xff, DMA_PAGE_5 + 0x400); - break; - case 6: - dma_outb( pagenr & 0xfe, DMA_PAGE_6); - dma_outb((pagenr >> 8) & 0xff, DMA_PAGE_6 + 0x400); - break; - case 7: - dma_outb( pagenr & 0xfe, DMA_PAGE_7); - dma_outb((pagenr >> 8) & 0xff, DMA_PAGE_7 + 0x400); - break; - } -} - - -/* Set transfer address & page bits for specific DMA channel. - * Assumes dma flipflop is clear. - */ -static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a) -{ - set_dma_page(dmanr, a>>16); - if (dmanr <= 3) { - dma_outb( a & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE ); - dma_outb( (a>>8) & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE ); - } else { - dma_outb( (a>>1) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE ); - dma_outb( (a>>9) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE ); - } -} - - -/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for - * a specific DMA channel. - * You must ensure the parameters are valid. - * NOTE: from a manual: "the number of transfers is one more - * than the initial word count"! This is taken into account. - * Assumes dma flip-flop is clear. - * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7. - */ -static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count) -{ - count--; - if (dmanr <= 3) { - dma_outb( count & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE ); - dma_outb( (count>>8) & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE ); - } else { - dma_outb( (count>>1) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE ); - dma_outb( (count>>9) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE ); - } -} - - -/* Get DMA residue count. After a DMA transfer, this - * should return zero. Reading this while a DMA transfer is - * still in progress will return unpredictable results. - * If called before the channel has been used, it may return 1. - * Otherwise, it returns the number of _bytes_ left to transfer. - * - * Assumes DMA flip-flop is clear. - */ -static __inline__ int get_dma_residue(unsigned int dmanr) -{ - unsigned int io_port = (dmanr<=3)? ((dmanr&3)<<1) + 1 + IO_DMA1_BASE - : ((dmanr&3)<<2) + 2 + IO_DMA2_BASE; - - /* using short to get 16-bit wrap around */ - unsigned short count; - - count = 1 + dma_inb(io_port); - count += dma_inb(io_port) << 8; - return (dmanr<=3)? count : (count<<1); -} - - -/* These are in kernel/dma.c: */ -extern int request_dma(unsigned int dmanr, const char * device_id); /* reserve a DMA channel */ -extern void free_dma(unsigned int dmanr); /* release it again */ - -/* From PCI */ - -#ifdef CONFIG_PCI -extern int isa_dma_bridge_buggy; -#else -#define isa_dma_bridge_buggy (0) -#endif - -#endif /* _ASM_MPC1211_DMA_H */ diff --git a/include/asm-sh/mpc1211/io.h b/include/asm-sh/mpc1211/io.h deleted file mode 100644 index 6298370bec2..00000000000 --- a/include/asm-sh/mpc1211/io.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * include/asm-sh/mpc1211/io.h - * - * Copyright 2001 Saito.K & Jeanne - * - * IO functions for an Interface MPC-1211 - */ - -#ifndef _ASM_SH_IO_MPC1211_H -#define _ASM_SH_IO_MPC1211_H - -#include <linux/time.h> - -extern int mpc1211_irq_demux(int irq); - -extern void init_mpc1211_IRQ(void); -extern void heartbeat_mpc1211(void); - -extern void mpc1211_rtc_gettimeofday(struct timeval *tv); -extern int mpc1211_rtc_settimeofday(const struct timeval *tv); - -#endif /* _ASM_SH_IO_MPC1211_H */ diff --git a/include/asm-sh/mpc1211/keyboard.h b/include/asm-sh/mpc1211/keyboard.h deleted file mode 100644 index 9020feee7b4..00000000000 --- a/include/asm-sh/mpc1211/keyboard.h +++ /dev/null @@ -1,60 +0,0 @@ -/* - * MPC1211 specific keybord definitions - * Taken from the old asm-i386/keybord.h for PC/AT-style definitions - * created 3 Nov 1996 by Geert Uytterhoeven. - */ - -#ifdef __KERNEL__ - -#include <linux/kernel.h> -#include <linux/ioport.h> -#include <linux/kd.h> -#include <linux/pm.h> -#include <asm/io.h> - -#define KEYBOARD_IRQ 1 -#define DISABLE_KBD_DURING_INTERRUPTS 0 - -extern int pckbd_setkeycode(unsigned int scancode, unsigned int keycode); -extern int pckbd_getkeycode(unsigned int scancode); -extern int pckbd_translate(unsigned char scancode, unsigned char *keycode, - char raw_mode); -extern char pckbd_unexpected_up(unsigned char keycode); -extern void pckbd_leds(unsigned char leds); -extern void pckbd_init_hw(void); -extern int pckbd_pm_resume(struct pm_dev *, pm_request_t, void *); -extern pm_callback pm_kbd_request_override; - -#define kbd_setkeycode pckbd_setkeycode -#define kbd_getkeycode pckbd_getkeycode -#define kbd_translate pckbd_translate -#define kbd_unexpected_up pckbd_unexpected_up -#define kbd_leds pckbd_leds -#define kbd_init_hw pckbd_init_hw - -/* resource allocation */ -#define kbd_request_region() -#define kbd_request_irq(handler) request_irq(KEYBOARD_IRQ, handler, 0, \ - "keyboard", NULL) - -/* How to access the keyboard macros on this platform. */ -#define kbd_read_input() inb(KBD_DATA_REG) -#define kbd_read_status() inb(KBD_STATUS_REG) -#define kbd_write_output(val) outb(val, KBD_DATA_REG) -#define kbd_write_command(val) outb(val, KBD_CNTL_REG) - -/* Some stoneage hardware needs delays after some operations. */ -#define kbd_pause() do { } while(0) - -/* - * Machine specific bits for the PS/2 driver - */ - -#define AUX_IRQ 12 - -#define aux_request_irq(hand, dev_id) \ - request_irq(AUX_IRQ, hand, IRQF_SHARED, "PS2 Mouse", dev_id) - -#define aux_free_irq(dev_id) free_irq(AUX_IRQ, dev_id) - -#endif /* __KERNEL__ */ diff --git a/include/asm-sh/mpc1211/m1543c.h b/include/asm-sh/mpc1211/m1543c.h deleted file mode 100644 index c95d13236c3..00000000000 --- a/include/asm-sh/mpc1211/m1543c.h +++ /dev/null @@ -1,200 +0,0 @@ -#ifndef __ASM_SH_M1543C_H -#define __ASM_SH_M1543C_H - -/* - * linux/include/asm-sh/m1543c.h - * Copyright (C) 2001 Nobuhiro Sakawa - * M1543C:PCI-ISA Bus Bridge with Super IO Chip support - * - * from - * - * linux/include/asm-sh/smc37c93x.h - * - * Copyright (C) 2000 Kazumoto Kojima - * - * SMSC 37C93x Super IO Chip support - */ - -/* Default base I/O address */ -#define FDC_PRIMARY_BASE 0x3f0 -#define IDE1_PRIMARY_BASE 0x1f0 -#define IDE1_SECONDARY_BASE 0x170 -#define PARPORT_PRIMARY_BASE 0x378 -#define COM1_PRIMARY_BASE 0x2f8 -#define COM2_PRIMARY_BASE 0x3f8 -#define COM3_PRIMARY_BASE 0x3e8 -#define RTC_PRIMARY_BASE 0x070 -#define KBC_PRIMARY_BASE 0x060 -#define AUXIO_PRIMARY_BASE 0x000 /* XXX */ -#define I8259_M_CR 0x20 -#define I8259_M_MR 0x21 -#define I8259_S_CR 0xa0 -#define I8259_S_MR 0xa1 - -/* Logical device number */ -#define LDN_FDC 0 -#define LDN_IDE1 1 -#define LDN_IDE2 2 -#define LDN_PARPORT 3 -#define LDN_COM1 4 -#define LDN_COM2 5 -#define LDN_COM3 11 -#define LDN_RTC 6 -#define LDN_KBC 7 - -/* Configuration port and key */ -#define CONFIG_PORT 0x3f0 -#define INDEX_PORT CONFIG_PORT -#define DATA_PORT 0x3f1 -#define CONFIG_ENTER1 0x51 -#define CONFIG_ENTER2 0x23 -#define CONFIG_EXIT 0xbb - -/* Configuration index */ -#define CURRENT_LDN_INDEX 0x07 -#define POWER_CONTROL_INDEX 0x22 -#define ACTIVATE_INDEX 0x30 -#define IO_BASE_HI_INDEX 0x60 -#define IO_BASE_LO_INDEX 0x61 -#define IRQ_SELECT_INDEX 0x70 -#define PS2_IRQ_INDEX 0x72 -#define DMA_SELECT_INDEX 0x74 - -/* UART stuff. Only for debugging. */ -/* UART Register */ - -#define UART_RBR 0x0 /* Receiver Buffer Register (Read Only) */ -#define UART_THR 0x0 /* Transmitter Holding Register (Write Only) */ -#define UART_IER 0x2 /* Interrupt Enable Register */ -#define UART_IIR 0x4 /* Interrupt Ident Register (Read Only) */ -#define UART_FCR 0x4 /* FIFO Control Register (Write Only) */ -#define UART_LCR 0x6 /* Line Control Register */ -#define UART_MCR 0x8 /* MODEM Control Register */ -#define UART_LSR 0xa /* Line Status Register */ -#define UART_MSR 0xc /* MODEM Status Register */ -#define UART_SCR 0xe /* Scratch Register */ -#define UART_DLL 0x0 /* Divisor Latch (LS) */ -#define UART_DLM 0x2 /* Divisor Latch (MS) */ - -#ifndef __ASSEMBLY__ -typedef struct uart_reg { - volatile __u16 rbr; - volatile __u16 ier; - volatile __u16 iir; - volatile __u16 lcr; - volatile __u16 mcr; - volatile __u16 lsr; - volatile __u16 msr; - volatile __u16 scr; -} uart_reg; -#endif /* ! __ASSEMBLY__ */ - -/* Alias for Write Only Register */ - -#define thr rbr -#define tcr iir - -/* Alias for Divisor Latch Register */ - -#define dll rbr -#define dlm ier -#define fcr iir - -/* Interrupt Enable Register */ - -#define IER_ERDAI 0x0100 /* Enable Received Data Available Interrupt */ -#define IER_ETHREI 0x0200 /* Enable Transmitter Holding Register Empty Interrupt */ -#define IER_ELSI 0x0400 /* Enable Receiver Line Status Interrupt */ -#define IER_EMSI 0x0800 /* Enable MODEM Status Interrupt */ - -/* Interrupt Ident Register */ - -#define IIR_IP 0x0100 /* "0" if Interrupt Pending */ -#define IIR_IIB0 0x0200 /* Interrupt ID Bit 0 */ -#define IIR_IIB1 0x0400 /* Interrupt ID Bit 1 */ -#define IIR_IIB2 0x0800 /* Interrupt ID Bit 2 */ -#define IIR_FIFO 0xc000 /* FIFOs enabled */ - -/* FIFO Control Register */ - -#define FCR_FEN 0x0100 /* FIFO enable */ -#define FCR_RFRES 0x0200 /* Receiver FIFO reset */ -#define FCR_TFRES 0x0400 /* Transmitter FIFO reset */ -#define FCR_DMA 0x0800 /* DMA mode select */ -#define FCR_RTL 0x4000 /* Receiver triger (LSB) */ -#define FCR_RTM 0x8000 /* Receiver triger (MSB) */ - -/* Line Control Register */ - -#define LCR_WLS0 0x0100 /* Word Length Select Bit 0 */ -#define LCR_WLS1 0x0200 /* Word Length Select Bit 1 */ -#define LCR_STB 0x0400 /* Number of Stop Bits */ -#define LCR_PEN 0x0800 /* Parity Enable */ -#define LCR_EPS 0x1000 /* Even Parity Select */ -#define LCR_SP 0x2000 /* Stick Parity */ -#define LCR_SB 0x4000 /* Set Break */ -#define LCR_DLAB 0x8000 /* Divisor Latch Access Bit */ - -/* MODEM Control Register */ - -#define MCR_DTR 0x0100 /* Data Terminal Ready */ -#define MCR_RTS 0x0200 /* Request to Send */ -#define MCR_OUT1 0x0400 /* Out 1 */ -#define MCR_IRQEN 0x0800 /* IRQ Enable */ -#define MCR_LOOP 0x1000 /* Loop */ - -/* Line Status Register */ - -#define LSR_DR 0x0100 /* Data Ready */ -#define LSR_OE 0x0200 /* Overrun Error */ -#define LSR_PE 0x0400 /* Parity Error */ -#define LSR_FE 0x0800 /* Framing Error */ -#define LSR_BI 0x1000 /* Break Interrupt */ -#define LSR_THRE 0x2000 /* Transmitter Holding Register Empty */ -#define LSR_TEMT 0x4000 /* Transmitter Empty */ -#define LSR_FIFOE 0x8000 /* Receiver FIFO error */ - -/* MODEM Status Register */ - -#define MSR_DCTS 0x0100 /* Delta Clear to Send */ -#define MSR_DDSR 0x0200 /* Delta Data Set Ready */ -#define MSR_TERI 0x0400 /* Trailing Edge Ring Indicator */ -#define MSR_DDCD 0x0800 /* Delta Data Carrier Detect */ -#define MSR_CTS 0x1000 /* Clear to Send */ -#define MSR_DSR 0x2000 /* Data Set Ready */ -#define MSR_RI 0x4000 /* Ring Indicator */ -#define MSR_DCD 0x8000 /* Data Carrier Detect */ - -/* Baud Rate Divisor */ - -#define UART_CLK (1843200) /* 1.8432 MHz */ -#define UART_BAUD(x) (UART_CLK / (16 * (x))) - -/* RTC register definition */ -#define RTC_SECONDS 0 -#define RTC_SECONDS_ALARM 1 -#define RTC_MINUTES 2 -#define RTC_MINUTES_ALARM 3 -#define RTC_HOURS 4 -#define RTC_HOURS_ALARM 5 -#define RTC_DAY_OF_WEEK 6 -#define RTC_DAY_OF_MONTH 7 -#define RTC_MONTH 8 -#define RTC_YEAR 9 -#define RTC_FREQ_SELECT 10 -# define RTC_UIP 0x80 -# define RTC_DIV_CTL 0x70 -/* This RTC can work under 32.768KHz clock only. */ -# define RTC_OSC_ENABLE 0x20 -# define RTC_OSC_DISABLE 0x00 -#define RTC_CONTROL 11 -# define RTC_SET 0x80 -# define RTC_PIE 0x40 -# define RTC_AIE 0x20 -# define RTC_UIE 0x10 -# define RTC_SQWE 0x08 -# define RTC_DM_BINARY 0x04 -# define RTC_24H 0x02 -# define RTC_DST_EN 0x01 - -#endif /* __ASM_SH_M1543C_H */ diff --git a/include/asm-sh/mpc1211/mc146818rtc.h b/include/asm-sh/mpc1211/mc146818rtc.h deleted file mode 100644 index e245f2a3cd7..00000000000 --- a/include/asm-sh/mpc1211/mc146818rtc.h +++ /dev/null @@ -1,6 +0,0 @@ -/* - * MPC1211 uses PC/AT style RTC definitions. - */ -#include <asm-x86/mc146818rtc_32.h> - - diff --git a/include/asm-sh/mpc1211/mpc1211.h b/include/asm-sh/mpc1211/mpc1211.h deleted file mode 100644 index fa456c3e4e0..00000000000 --- a/include/asm-sh/mpc1211/mpc1211.h +++ /dev/null @@ -1,18 +0,0 @@ -#ifndef __ASM_SH_MPC1211_H -#define __ASM_SH_MPC1211_H - -/* - * linux/include/asm-sh/mpc1211.h - * - * Copyright (C) 2001 Saito.K & Jeanne - * - * Interface MPC-1211 support - */ - -#define PA_PCI_IO (0xa4000000) /* PCI I/O space */ -#define PA_PCI_MEM (0xb0000000) /* PCI MEM space */ - -#define PCIPAR (0xa4000cf8) /* PCI Config address */ -#define PCIPDR (0xa4000cfc) /* PCI Config data */ - -#endif /* __ASM_SH_MPC1211_H */ diff --git a/include/asm-sh/mpc1211/pci.h b/include/asm-sh/mpc1211/pci.h deleted file mode 100644 index d9162c5ed76..00000000000 --- a/include/asm-sh/mpc1211/pci.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Low-Level PCI Support for MPC-1211 - * - * (c) 2002 Saito.K & Jeanne - * - */ - -#ifndef _PCI_MPC1211_H_ -#define _PCI_MPC1211_H_ - -#include <linux/pci.h> - -/* set debug level 4=verbose...1=terse */ -//#define DEBUG_PCI 3 -#undef DEBUG_PCI - -#ifdef DEBUG_PCI -#define PCIDBG(n, x...) { if(DEBUG_PCI>=n) printk(x); } -#else -#define PCIDBG(n, x...) -#endif - -/* startup values */ -#define PCI_PROBE_BIOS 1 -#define PCI_PROBE_CONF1 2 -#define PCI_PROBE_CONF2 4 -#define PCI_NO_CHECKS 0x400 -#define PCI_ASSIGN_ROMS 0x1000 -#define PCI_BIOS_IRQ_SCAN 0x2000 - -/* MPC-1211 Specific Values */ -#define PCIPAR (0xa4000cf8) /* PCI Config address */ -#define PCIPDR (0xa4000cfc) /* PCI Config data */ - -#define PA_PCI_IO (0xa4000000) /* PCI I/O space */ -#define PA_PCI_MEM (0xb0000000) /* PCI MEM space */ - -#endif /* _PCI_MPC1211_H_ */ diff --git a/include/asm-sh/r7780rp.h b/include/asm-sh/r7780rp.h index a33838f23a6..306f7359f7d 100644 --- a/include/asm-sh/r7780rp.h +++ b/include/asm-sh/r7780rp.h @@ -193,8 +193,6 @@ #define IRQ_SCIF0 (HL_FPGA_IRQ_BASE + 15) #define IRQ_SCIF1 (HL_FPGA_IRQ_BASE + 16) -unsigned char *highlander_init_irq_r7780mp(void); -unsigned char *highlander_init_irq_r7780rp(void); -unsigned char *highlander_init_irq_r7785rp(void); +unsigned char *highlander_plat_irq_setup(void); #endif /* __ASM_SH_RENESAS_R7780RP */ diff --git a/include/asm-sh/tlb_64.h b/include/asm-sh/tlb_64.h index 0308e05fc57..0a96f3af69e 100644 --- a/include/asm-sh/tlb_64.h +++ b/include/asm-sh/tlb_64.h @@ -56,6 +56,7 @@ static inline void __flush_tlb_slot(unsigned long long slot) __asm__ __volatile__ ("putcfg %0, 0, r63\n" : : "r" (slot)); } +#ifdef CONFIG_MMU /* arch/sh64/mm/tlb.c */ int sh64_tlb_init(void); unsigned long long sh64_next_free_dtlb_entry(void); @@ -64,6 +65,13 @@ int sh64_put_wired_dtlb_entry(unsigned long long entry); void sh64_setup_tlb_slot(unsigned long long config_addr, unsigned long eaddr, unsigned long asid, unsigned long paddr); void sh64_teardown_tlb_slot(unsigned long long config_addr); - +#else +#define sh64_tlb_init() do { } while (0) +#define sh64_next_free_dtlb_entry() (0) +#define sh64_get_wired_dtlb_entry() (0) +#define sh64_put_wired_dtlb_entry(entry) do { } while (0) +#define sh64_setup_tlb_slot(conf, virt, asid, phys) do { } while (0) +#define sh64_teardown_tlb_slot(addr) do { } while (0) +#endif /* CONFIG_MMU */ #endif /* __ASSEMBLY__ */ #endif /* __ASM_SH_TLB_64_H */ diff --git a/include/asm-sh/topology.h b/include/asm-sh/topology.h index 34cdb28e8f4..95f0085e098 100644 --- a/include/asm-sh/topology.h +++ b/include/asm-sh/topology.h @@ -29,6 +29,17 @@ .nr_balance_failed = 0, \ } +#define cpu_to_node(cpu) ((void)(cpu),0) +#define parent_node(node) ((void)(node),0) + +#define node_to_cpumask(node) ((void)node, cpu_online_map) +#define node_to_first_cpu(node) ((void)(node),0) + +#define pcibus_to_node(bus) ((void)(bus), -1) +#define pcibus_to_cpumask(bus) (pcibus_to_node(bus) == -1 ? \ + CPU_MASK_ALL : \ + node_to_cpumask(pcibus_to_node(bus)) \ + ) #endif #include <asm-generic/topology.h> diff --git a/include/asm-sh/uaccess_64.h b/include/asm-sh/uaccess_64.h index f956b7b316c..a9b68d09484 100644 --- a/include/asm-sh/uaccess_64.h +++ b/include/asm-sh/uaccess_64.h @@ -274,7 +274,9 @@ struct exception_table_entry unsigned long insn, fixup; }; +#ifdef CONFIG_MMU #define ARCH_HAS_SEARCH_EXTABLE +#endif /* Returns 0 if exception not found and fixup.unit otherwise. */ extern unsigned long search_exception_table(unsigned long addr); |