diff options
| author | Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> | 2012-11-19 09:37:24 +0100 |
|---|---|---|
| committer | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2012-11-20 16:03:35 +0100 |
| commit | 49f175b9fed5dbfc370057ae0a2a57d1be750c0a (patch) | |
| tree | a4f4348ac9bfb58592c37e8f1759e1cd26d84b77 | |
| parent | c896ed0fd72505104db3e78fffe3d8c604d25277 (diff) | |
arm: dove: Convert Dove to DT XOR DMA engine
With DT support for Marvell XOR DMA engine, make use of it on Dove.
Also remove the now redundant code in DT board init for xor engines.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
| -rw-r--r-- | arch/arm/boot/dts/dove.dtsi | 42 | ||||
| -rw-r--r-- | arch/arm/mach-dove/common.c | 10 |
2 files changed, 42 insertions, 10 deletions
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi index b524ee377f8..b1cfa52ae22 100644 --- a/arch/arm/boot/dts/dove.dtsi +++ b/arch/arm/boot/dts/dove.dtsi @@ -174,5 +174,47 @@ clocks = <&gate_clk 15>; status = "okay"; }; + + xor0: dma-engine@60800 { + compatible = "marvell,orion-xor"; + reg = <0x60800 0x100 + 0x60a00 0x100>; + clocks = <&gate_clk 23>; + status = "okay"; + + channel0 { + interrupts = <39>; + dmacap,memcpy; + dmacap,xor; + }; + + channel1 { + interrupts = <40>; + dmacap,memset; + dmacap,memcpy; + dmacap,xor; + }; + }; + + xor1: dma-engine@60900 { + compatible = "marvell,orion-xor"; + reg = <0x60900 0x100 + 0x60b00 0x100>; + clocks = <&gate_clk 24>; + status = "okay"; + + channel0 { + interrupts = <42>; + dmacap,memcpy; + dmacap,xor; + }; + + channel1 { + interrupts = <43>; + dmacap,memset; + dmacap,memcpy; + dmacap,xor; + }; + }; }; }; diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c index f4ac5b06014..89f4f993cd0 100644 --- a/arch/arm/mach-dove/common.c +++ b/arch/arm/mach-dove/common.c @@ -409,14 +409,6 @@ static void __init dove_legacy_clk_init(void) clkspec.args[0] = CLOCK_GATING_BIT_PCIE1; orion_clkdev_add("1", "pcie", of_clk_get_from_provider(&clkspec)); - - clkspec.args[0] = CLOCK_GATING_BIT_XOR0; - orion_clkdev_add(NULL, MV_XOR_NAME ".0", - of_clk_get_from_provider(&clkspec)); - - clkspec.args[0] = CLOCK_GATING_BIT_XOR1; - orion_clkdev_add(NULL, MV_XOR_NAME ".1", - of_clk_get_from_provider(&clkspec)); } static void __init dove_of_clk_init(void) @@ -444,8 +436,6 @@ static void __init dove_dt_init(void) /* Internal devices not ported to DT yet */ dove_rtc_init(); - dove_xor0_init(); - dove_xor1_init(); dove_ge00_init(&dove_dt_ge00_data); dove_ehci0_init(); |