diff options
author | Russ Anderson <rja@sgi.com> | 2006-09-18 18:37:15 -0500 |
---|---|---|
committer | Tony Luck <tony.luck@intel.com> | 2006-09-26 15:20:35 -0700 |
commit | 8f9e146732dcba5161dad3747ee73be1f8c13133 (patch) | |
tree | 463488a8c6c2ca1e5b74a6b80bdd8d1699e8bec7 | |
parent | 43ed3baf623410b3fa6ca14a9d3f6deca3493c56 (diff) |
[IA64] ar.fpsr not set on MCA/INIT kernel entry
When entering the kernel due to an MCA or INIT, ar.fpsr (ar40)
was not getting set to the kernel default value (remaining
at the user value). The effect depends on the user setting
of ar.fpsr. In the test case, the effect was addresses
printing with strange hex values.
Setting ar.fpsr in ia64_set_kernel_registers sets it for both
the MCA and INIT paths. The user value of ar.fpsr is correctly
saved (in ia64_state_save) and restored (in ia64_state_restore).
Below is an example of output with very strange hex values.
Anyone know the value of hex 'g'? :-)
Processes interrupted by INIT - 0 (cpu 14 task 0xdfffg55g7a4c6gA)
Signed-off-by: Russ Anderson (rja@sgi.com)
Signed-off-by: Tony Luck <tony.luck@intel.com>
-rw-r--r-- | arch/ia64/kernel/mca_asm.S | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/ia64/kernel/mca_asm.S b/arch/ia64/kernel/mca_asm.S index ee3ff76c8a3..c6b607c00de 100644 --- a/arch/ia64/kernel/mca_asm.S +++ b/arch/ia64/kernel/mca_asm.S @@ -1062,6 +1062,10 @@ ia64_set_kernel_registers: mov cr.itir=r18 mov cr.ifa=r13 mov r20=IA64_TR_CURRENT_STACK + + movl r17=FPSR_DEFAULT + ;; + mov.m ar.fpsr=r17 // set ar.fpsr to kernel default value ;; itr.d dtr[r20]=r21 ;; |