diff options
| author | Bruce Allan <bruce.w.allan@intel.com> | 2009-11-20 23:22:39 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2009-11-21 11:33:46 -0800 |
| commit | f4e2c6db7f4453ed5fb2e4342128d0ee3cfcf6bd (patch) | |
| tree | 5229cf5f87ff3e043e6256a81c20787f0dd84dd2 | |
| parent | f89271dda9431b432dad7505ccdcb57666233c1d (diff) | |
e1000e: clearing interrupt timers causes descriptors to get flushed
Clearing the interrupt timers following an IMS clear has the unwanted
side-effect of flushing all descriptors immediately following a partial
write when interrupts are disabled.
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
| -rw-r--r-- | drivers/net/e1000e/netdev.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/net/e1000e/netdev.c b/drivers/net/e1000e/netdev.c index 3caa1d5893c..3845fb698b4 100644 --- a/drivers/net/e1000e/netdev.c +++ b/drivers/net/e1000e/netdev.c @@ -2441,8 +2441,6 @@ static void e1000_configure_rx(struct e1000_adapter *adapter) ew32(ITR, 1000000000 / (adapter->itr * 256)); ctrl_ext = er32(CTRL_EXT); - /* Reset delay timers after every interrupt */ - ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR; /* Auto-Mask interrupts upon ICR access */ ctrl_ext |= E1000_CTRL_EXT_IAME; ew32(IAM, 0xffffffff); |