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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2006-06-25 11:17:23 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-06-25 11:17:23 +0100
commit7999d8d7a611bee902446939952859caf1367c25 (patch)
tree98dd4b81951f25b60012f2d91203fab3e0fd9010
parentdfd8317d3340f03bc06eba6b58f0ec0861da4a13 (diff)
[ARM] Remove RETINSTR macro
RETINSTR is a left-over from the days when we had 26-bit and 32-bit CPU support integrated into the same tree. Since this is no longer the case, we can now remove RETINSTR. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/kernel/entry-common.S2
-rw-r--r--arch/arm/lib/delay.S18
-rw-r--r--arch/arm/lib/findbit.S10
-rw-r--r--arch/arm/lib/io-readsw-armv3.S2
-rw-r--r--arch/arm/lib/io-writesw-armv3.S2
-rw-r--r--arch/arm/lib/memchr.S2
-rw-r--r--arch/arm/lib/memset.S2
-rw-r--r--arch/arm/lib/memzero.S2
-rw-r--r--arch/arm/lib/strchr.S2
-rw-r--r--arch/arm/lib/strrchr.S2
-rw-r--r--include/asm-arm/assembler.h6
11 files changed, 22 insertions, 28 deletions
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index b5bcebca1cd..75af6d6e2f2 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -340,7 +340,7 @@ sys_mmap2:
streq r5, [sp, #4]
beq do_mmap2
mov r0, #-EINVAL
- RETINSTR(mov,pc, lr)
+ mov pc, lr
#else
str r5, [sp, #4]
b do_mmap2
diff --git a/arch/arm/lib/delay.S b/arch/arm/lib/delay.S
index 9183b06c0e2..930a7025922 100644
--- a/arch/arm/lib/delay.S
+++ b/arch/arm/lib/delay.S
@@ -31,7 +31,7 @@ ENTRY(__const_udelay) @ 0 <= r0 <= 0x7fffff06
mov r2, r2, lsr #10 @ max = 0x00007fff
mul r0, r2, r0 @ max = 2^32-1
movs r0, r0, lsr #6
- RETINSTR(moveq,pc,lr)
+ moveq pc, lr
/*
* loops = r0 * HZ * loops_per_jiffy / 1000000
@@ -43,20 +43,20 @@ ENTRY(__const_udelay) @ 0 <= r0 <= 0x7fffff06
ENTRY(__delay)
subs r0, r0, #1
#if 0
- RETINSTR(movls,pc,lr)
+ movls pc, lr
subs r0, r0, #1
- RETINSTR(movls,pc,lr)
+ movls pc, lr
subs r0, r0, #1
- RETINSTR(movls,pc,lr)
+ movls pc, lr
subs r0, r0, #1
- RETINSTR(movls,pc,lr)
+ movls pc, lr
subs r0, r0, #1
- RETINSTR(movls,pc,lr)
+ movls pc, lr
subs r0, r0, #1
- RETINSTR(movls,pc,lr)
+ movls pc, lr
subs r0, r0, #1
- RETINSTR(movls,pc,lr)
+ movls pc, lr
subs r0, r0, #1
#endif
bhi __delay
- RETINSTR(mov,pc,lr)
+ mov pc, lr
diff --git a/arch/arm/lib/findbit.S b/arch/arm/lib/findbit.S
index 6f8e27a58c7..a5ca0248aa4 100644
--- a/arch/arm/lib/findbit.S
+++ b/arch/arm/lib/findbit.S
@@ -32,7 +32,7 @@ ENTRY(_find_first_zero_bit_le)
2: cmp r2, r1 @ any more?
blo 1b
3: mov r0, r1 @ no free bits
- RETINSTR(mov,pc,lr)
+ mov pc, lr
/*
* Purpose : Find next 'zero' bit
@@ -66,7 +66,7 @@ ENTRY(_find_first_bit_le)
2: cmp r2, r1 @ any more?
blo 1b
3: mov r0, r1 @ no free bits
- RETINSTR(mov,pc,lr)
+ mov pc, lr
/*
* Purpose : Find next 'one' bit
@@ -98,7 +98,7 @@ ENTRY(_find_first_zero_bit_be)
2: cmp r2, r1 @ any more?
blo 1b
3: mov r0, r1 @ no free bits
- RETINSTR(mov,pc,lr)
+ mov pc, lr
ENTRY(_find_next_zero_bit_be)
teq r1, #0
@@ -126,7 +126,7 @@ ENTRY(_find_first_bit_be)
2: cmp r2, r1 @ any more?
blo 1b
3: mov r0, r1 @ no free bits
- RETINSTR(mov,pc,lr)
+ mov pc, lr
ENTRY(_find_next_bit_be)
teq r1, #0
@@ -164,5 +164,5 @@ ENTRY(_find_next_bit_be)
addeq r2, r2, #1
mov r0, r2
#endif
- RETINSTR(mov,pc,lr)
+ mov pc, lr
diff --git a/arch/arm/lib/io-readsw-armv3.S b/arch/arm/lib/io-readsw-armv3.S
index 146d47c1545..2639983219b 100644
--- a/arch/arm/lib/io-readsw-armv3.S
+++ b/arch/arm/lib/io-readsw-armv3.S
@@ -28,7 +28,7 @@
strb r3, [r1], #1
subs r2, r2, #1
- RETINSTR(moveq, pc, lr)
+ moveq pc, lr
ENTRY(__raw_readsw)
teq r2, #0 @ do we have to check for the zero len?
diff --git a/arch/arm/lib/io-writesw-armv3.S b/arch/arm/lib/io-writesw-armv3.S
index 52d62b48129..c421f92eeb2 100644
--- a/arch/arm/lib/io-writesw-armv3.S
+++ b/arch/arm/lib/io-writesw-armv3.S
@@ -29,7 +29,7 @@
orr r3, r3, r3, lsl #16
str r3, [r0]
subs r2, r2, #1
- RETINSTR(moveq, pc, lr)
+ moveq pc, lr
ENTRY(__raw_writesw)
teq r2, #0 @ do we have to check for the zero len?
diff --git a/arch/arm/lib/memchr.S b/arch/arm/lib/memchr.S
index ac34fe55d21..e7ab1ea8eba 100644
--- a/arch/arm/lib/memchr.S
+++ b/arch/arm/lib/memchr.S
@@ -22,4 +22,4 @@ ENTRY(memchr)
bne 1b
sub r0, r0, #1
2: movne r0, #0
- RETINSTR(mov,pc,lr)
+ mov pc, lr
diff --git a/arch/arm/lib/memset.S b/arch/arm/lib/memset.S
index a1795f59993..69e7c31f338 100644
--- a/arch/arm/lib/memset.S
+++ b/arch/arm/lib/memset.S
@@ -77,4 +77,4 @@ ENTRY(memset)
strneb r1, [r0], #1
tst r2, #1
strneb r1, [r0], #1
- RETINSTR(mov,pc,lr)
+ mov pc, lr
diff --git a/arch/arm/lib/memzero.S b/arch/arm/lib/memzero.S
index 51ccc60160f..764e7de8bba 100644
--- a/arch/arm/lib/memzero.S
+++ b/arch/arm/lib/memzero.S
@@ -77,4 +77,4 @@ ENTRY(__memzero)
strneb r2, [r0], #1 @ 1
tst r1, #1 @ 1 a byte left over
strneb r2, [r0], #1 @ 1
- RETINSTR(mov,pc,lr) @ 1
+ mov pc, lr @ 1
diff --git a/arch/arm/lib/strchr.S b/arch/arm/lib/strchr.S
index 5b9b493733f..9f18d6fdee6 100644
--- a/arch/arm/lib/strchr.S
+++ b/arch/arm/lib/strchr.S
@@ -23,4 +23,4 @@ ENTRY(strchr)
teq r2, r1
movne r0, #0
subeq r0, r0, #1
- RETINSTR(mov,pc,lr)
+ mov pc, lr
diff --git a/arch/arm/lib/strrchr.S b/arch/arm/lib/strrchr.S
index fa923f026f1..538df220aa4 100644
--- a/arch/arm/lib/strrchr.S
+++ b/arch/arm/lib/strrchr.S
@@ -22,4 +22,4 @@ ENTRY(strrchr)
teq r2, #0
bne 1b
mov r0, r3
- RETINSTR(mov,pc,lr)
+ mov pc, lr
diff --git a/include/asm-arm/assembler.h b/include/asm-arm/assembler.h
index d53bafa9bf1..930dd905f1e 100644
--- a/include/asm-arm/assembler.h
+++ b/include/asm-arm/assembler.h
@@ -74,12 +74,6 @@
#endif
/*
- * Build a return instruction for this processor type.
- */
-#define RETINSTR(instr, regs...)\
- instr regs
-
-/*
* Enable and disable interrupts
*/
#if __LINUX_ARM_ARCH__ >= 6