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authorMagnus Damm <damm@opensource.se>2010-05-19 10:29:47 +0000
committerPaul Mundt <lethal@linux-sh.org>2010-05-20 12:00:36 +0900
commit9b7c23adb350a108737a993c9c781463c1439dc6 (patch)
treee0fd47a728a1e39bcf53cd1eb8715eb7bf600163
parentffee72d4681c8777918268a96aef42bdeb6c367b (diff)
ARM: mach-shmobile: Use 0x2200 as INTCS_VECT_BASE
Change INTCS_VECT_BASE from 0x3400 to 0x2200. The old value 0x3400 gave the INTCA and INTCS interrupt conrollers separated spaces, but required ARM support for more than 512 NR_IRQS which is not in place at this point. The value 0x2200 will make some of the INTCA interrupts make use of empty INTCS areas. This is a bit more error prone but works fine as a workaround for G3, G3 and AP4. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r--arch/arm/mach-shmobile/include/mach/irqs.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-shmobile/include/mach/irqs.h b/arch/arm/mach-shmobile/include/mach/irqs.h
index 51b4a6ab6c6..e881797648a 100644
--- a/arch/arm/mach-shmobile/include/mach/irqs.h
+++ b/arch/arm/mach-shmobile/include/mach/irqs.h
@@ -9,7 +9,7 @@
#define irq2evt(irq) (((irq) + 16) << 5)
/* INTCS */
-#define INTCS_VECT_BASE 0x3400
+#define INTCS_VECT_BASE 0x2200
#define INTCS_VECT(n, vect) INTC_VECT((n), INTCS_VECT_BASE + (vect))
#define intcs_evt2irq(evt) evt2irq(INTCS_VECT_BASE + (evt))