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authorJaehoon Chung <jh80.chung@samsung.com>2012-01-05 19:12:57 +0900
committerChris Ball <cjb@laptop.org>2012-01-12 15:17:15 -0500
commitee5d19b20a711dca3848450979e3cd20b6b795cc (patch)
treeaa00b7c437235a663c5dfd3570ec1c5f2fee67f9
parent8bc0678b845531221ba2ea6efe34db66e587705b (diff)
mmc: dw_mmc: fixed wrong bit operation for SDMMC_GET_FCNT()
In status register, fifo_count is bit[29:17]. (0x1FFF is correct) Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Will Newton <will.newton@imgtec.com> Signed-off-by: Chris Ball <cjb@laptop.org>
-rw-r--r--drivers/mmc/host/dw_mmc.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h
index 72c071f6e00..df392a1143f 100644
--- a/drivers/mmc/host/dw_mmc.h
+++ b/drivers/mmc/host/dw_mmc.h
@@ -126,7 +126,7 @@
#define SDMMC_CMD_RESP_EXP BIT(6)
#define SDMMC_CMD_INDX(n) ((n) & 0x1F)
/* Status register defines */
-#define SDMMC_GET_FCNT(x) (((x)>>17) & 0x1FF)
+#define SDMMC_GET_FCNT(x) (((x)>>17) & 0x1FFF)
/* Internal DMAC interrupt defines */
#define SDMMC_IDMAC_INT_AI BIT(9)
#define SDMMC_IDMAC_INT_NI BIT(8)