diff options
author | Tony Prisk <linux@prisktech.co.nz> | 2013-04-14 17:28:35 +1200 |
---|---|---|
committer | Mike Turquette <mturquette@linaro.org> | 2013-04-14 00:02:44 -0700 |
commit | bdca21ecc252b5d390065de03d03c5a9df491025 (patch) | |
tree | dbe085a3162013787ac0c44c12c8b4012edd74d0 | |
parent | 38e4aa00975cf37afd63d7cd1cefd754dcf66e07 (diff) |
clk: vt8500: Missing breaks in vtwm_pll_round_rate/_set_rate.
The case of PLL_TYPE_WM8750 in both these functions is missing a break
statement causing a fall-through to the default: case.
Insert the missing break statements.
Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
-rw-r--r-- | drivers/clk/clk-vt8500.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/clk-vt8500.c b/drivers/clk/clk-vt8500.c index b5538bba7a1..6bc82d1bfe7 100644 --- a/drivers/clk/clk-vt8500.c +++ b/drivers/clk/clk-vt8500.c @@ -488,6 +488,7 @@ static int vtwm_pll_set_rate(struct clk_hw *hw, unsigned long rate, case PLL_TYPE_WM8750: wm8750_find_pll_bits(rate, parent_rate, &filter, &mul, &div1, &div2); pll_val = WM8750_BITS_TO_VAL(filter, mul, div1, div2); + break; default: pr_err("%s: invalid pll type\n", __func__); return 0; @@ -523,6 +524,7 @@ static long vtwm_pll_round_rate(struct clk_hw *hw, unsigned long rate, case PLL_TYPE_WM8750: wm8750_find_pll_bits(rate, *prate, &filter, &mul, &div1, &div2); round_rate = WM8750_BITS_TO_FREQ(*prate, mul, div1, div2); + break; default: round_rate = 0; } |