diff options
| author | Gertjan van Wingerde <gwingerde@gmail.com> | 2012-02-06 23:45:12 +0100 |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2012-02-08 15:26:31 -0500 |
| commit | 58b8ae14d58319bff63a30a9e1c0ebb9c07f2243 (patch) | |
| tree | 9a5c8a3f799c4de4bfd40f9e79e70d069c551a79 | |
| parent | 0cd461efcc1df6763b86b29ef4d6ee1cb923aa47 (diff) | |
rt2x00: Fix RT3572 channel switch RFCSR 7 programming.
Align with the v2.5.0.0 Ralink RT3572 driver.
Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
Acked-by: Stanislaw Gruszka <sgruszka@redhat.com>
Acked-by: Ivo van Doorn <IvDoorn@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
| -rw-r--r-- | drivers/net/wireless/rt2x00/rt2800.h | 10 | ||||
| -rw-r--r-- | drivers/net/wireless/rt2x00/rt2800lib.c | 7 |
2 files changed, 12 insertions, 5 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2800.h b/drivers/net/wireless/rt2x00/rt2800.h index 8aabd0dc02c..c6648b02bf8 100644 --- a/drivers/net/wireless/rt2x00/rt2800.h +++ b/drivers/net/wireless/rt2x00/rt2800.h @@ -1819,10 +1819,12 @@ struct mac_iveiv_entry { * RFCSR 7: */ #define RFCSR7_RF_TUNING FIELD8(0x01) -#define RFCSR7_R02 FIELD8(0x07) -#define RFCSR7_R3 FIELD8(0x08) -#define RFCSR7_R45 FIELD8(0x30) -#define RFCSR7_R67 FIELD8(0xc0) +#define RFCSR7_BIT1 FIELD8(0x02) +#define RFCSR7_BIT2 FIELD8(0x04) +#define RFCSR7_BIT3 FIELD8(0x08) +#define RFCSR7_BIT4 FIELD8(0x10) +#define RFCSR7_BIT5 FIELD8(0x20) +#define RFCSR7_BITS67 FIELD8(0xc0) /* * RFCSR 11: diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c index 135e8a40edd..395453c41e2 100644 --- a/drivers/net/wireless/rt2x00/rt2800lib.c +++ b/drivers/net/wireless/rt2x00/rt2800lib.c @@ -1865,7 +1865,12 @@ static void rt2800_config_channel_rf3052(struct rt2x00_dev *rt2x00dev, rt2800_rfcsr_write(rt2x00dev, 27, 0x00); rt2800_rfcsr_write(rt2x00dev, 29, 0x9b); } else { - rt2800_rfcsr_write(rt2x00dev, 7, 0x14); + rt2800_rfcsr_read(rt2x00dev, 7, &rfcsr); + rt2x00_set_field8(&rfcsr, RFCSR7_BIT2, 1); + rt2x00_set_field8(&rfcsr, RFCSR7_BIT3, 0); + rt2x00_set_field8(&rfcsr, RFCSR7_BIT4, 1); + rt2x00_set_field8(&rfcsr, RFCSR7_BITS67, 0); + rt2800_rfcsr_write(rt2x00dev, 7, rfcsr); rt2800_rfcsr_write(rt2x00dev, 9, 0xc0); rt2800_rfcsr_write(rt2x00dev, 10, 0xf1); rt2800_rfcsr_write(rt2x00dev, 11, 0x00); |