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authorAlex Deucher <alexander.deucher@amd.com>2013-05-14 17:55:03 -0400
committerAlex Deucher <alexander.deucher@amd.com>2013-06-27 19:40:12 -0400
commit915203c1878427f93e5ede56024fa9a73f1f88d1 (patch)
tree74577c5f81f863a43364c5f69aaf7e8257e343ed
parent71de795c6c3e72c820b0f1b06cd997acb16d3f62 (diff)
drm/radeon/dpm: add support for setting UVD clock on rs780
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/radeon/rs780_dpm.c38
1 files changed, 38 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/rs780_dpm.c b/drivers/gpu/drm/radeon/rs780_dpm.c
index e844c737ef7..bef832a62fe 100644
--- a/drivers/gpu/drm/radeon/rs780_dpm.c
+++ b/drivers/gpu/drm/radeon/rs780_dpm.c
@@ -542,6 +542,40 @@ static void rs780_enable_voltage_scaling(struct radeon_device *rdev,
WREG32_P(GFX_MACRO_BYPASS_CNTL, 0, ~SPLL_BYPASS_CNTL);
}
+static void rs780_set_uvd_clock_before_set_eng_clock(struct radeon_device *rdev,
+ struct radeon_ps *new_ps,
+ struct radeon_ps *old_ps)
+{
+ struct igp_ps *new_state = rs780_get_ps(new_ps);
+ struct igp_ps *current_state = rs780_get_ps(old_ps);
+
+ if ((new_ps->vclk == old_ps->vclk) &&
+ (new_ps->dclk == old_ps->dclk))
+ return;
+
+ if (new_state->sclk_high >= current_state->sclk_high)
+ return;
+
+ radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk);
+}
+
+static void rs780_set_uvd_clock_after_set_eng_clock(struct radeon_device *rdev,
+ struct radeon_ps *new_ps,
+ struct radeon_ps *old_ps)
+{
+ struct igp_ps *new_state = rs780_get_ps(new_ps);
+ struct igp_ps *current_state = rs780_get_ps(old_ps);
+
+ if ((new_ps->vclk == old_ps->vclk) &&
+ (new_ps->dclk == old_ps->dclk))
+ return;
+
+ if (new_state->sclk_high < current_state->sclk_high)
+ return;
+
+ radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk);
+}
+
int rs780_dpm_enable(struct radeon_device *rdev)
{
struct igp_power_info *pi = rs780_get_pi(rdev);
@@ -611,6 +645,8 @@ int rs780_dpm_set_power_state(struct radeon_device *rdev)
rs780_get_pm_mode_parameters(rdev);
+ rs780_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps);
+
if (pi->voltage_control) {
rs780_force_voltage_to_high(rdev);
mdelay(5);
@@ -626,6 +662,8 @@ int rs780_dpm_set_power_state(struct radeon_device *rdev)
if (pi->voltage_control)
rs780_enable_voltage_scaling(rdev, new_ps);
+ rs780_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps);
+
return 0;
}