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authorManuel Lauss <mano@roarinelk.homelinux.net>2009-03-31 18:51:27 +0200
committerRalf Baechle <ralf@linux-mips.org>2009-05-14 13:50:24 +0100
commitb7863ee144a99ff54fee90d851e24d73f38af661 (patch)
tree0b51504a6b833b7241e60b444998eb866839aca3
parentbcf11801e77946533767bbb368130220e241d824 (diff)
MIPS: Alchemy: Fix AU1100 interrupt numbers off-by-one
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/include/asm/mach-au1x00/au1000.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/include/asm/mach-au1x00/au1000.h b/arch/mips/include/asm/mach-au1x00/au1000.h
index 62f91f50b5b..87a16598ebc 100644
--- a/arch/mips/include/asm/mach-au1x00/au1000.h
+++ b/arch/mips/include/asm/mach-au1x00/au1000.h
@@ -715,7 +715,7 @@ enum soc_au1500_ints {
#ifdef CONFIG_SOC_AU1100
enum soc_au1100_ints {
AU1100_FIRST_INT = MIPS_CPU_IRQ_BASE + 8,
- AU1100_UART0_INT,
+ AU1100_UART0_INT = AU1100_FIRST_INT,
AU1100_UART1_INT,
AU1100_SD_INT,
AU1100_UART3_INT,