diff options
| author | Mark Brown <broonie@sirena.org.uk> | 2008-02-13 16:39:21 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-04-19 11:29:02 +0100 |
| commit | dcc88a170ce9f90e4b819c67feebb16e8a123f79 (patch) | |
| tree | a4407f2d6ebdce9d386c27252dbaeec3f210abc1 | |
| parent | 184dd48102425467fbbb209765894b04f668a9de (diff) | |
[ARM] 4830/1: Add support for the CLK_POUT pin on PXA3xx CPUs
Expose control of the PXA3xx 13MHz CLK_POUT pin via the clock API
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| -rw-r--r-- | arch/arm/mach-pxa/pxa3xx.c | 22 | ||||
| -rw-r--r-- | include/asm-arm/arch-pxa/pxa3xx-regs.h | 9 |
2 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index 35f25fdaeba..54c9e8371a2 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c @@ -156,6 +156,21 @@ static const struct clkops clk_pxa3xx_hsio_ops = { .getrate = clk_pxa3xx_hsio_getrate, }; +static void clk_pout_enable(struct clk *clk) +{ + OSCC |= OSCC_PEN; +} + +static void clk_pout_disable(struct clk *clk) +{ + OSCC &= ~OSCC_PEN; +} + +static const struct clkops clk_pout_ops = { + .enable = clk_pout_enable, + .disable = clk_pout_disable, +}; + #define PXA3xx_CKEN(_name, _cken, _rate, _delay, _dev) \ { \ .name = _name, \ @@ -175,6 +190,13 @@ static const struct clkops clk_pxa3xx_hsio_ops = { } static struct clk pxa3xx_clks[] = { + { + .name = "CLK_POUT", + .ops = &clk_pout_ops, + .rate = 13000000, + .delay = 70, + }, + PXA3xx_CK("LCDCLK", LCD, &clk_pxa3xx_hsio_ops, &pxa_device_fb.dev), PXA3xx_CK("CAMCLK", CAMERA, &clk_pxa3xx_hsio_ops, NULL), diff --git a/include/asm-arm/arch-pxa/pxa3xx-regs.h b/include/asm-arm/arch-pxa/pxa3xx-regs.h index 8e1b3ead827..fe9364c83a2 100644 --- a/include/asm-arm/arch-pxa/pxa3xx-regs.h +++ b/include/asm-arm/arch-pxa/pxa3xx-regs.h @@ -12,6 +12,15 @@ #ifndef __ASM_ARCH_PXA3XX_REGS_H #define __ASM_ARCH_PXA3XX_REGS_H + +/* + * Oscillator Configuration Register (OSCC) + */ +#define OSCC __REG(0x41350000) /* Oscillator Configuration Register */ + +#define OSCC_PEN (1 << 11) /* 13MHz POUT */ + + /* * Service Power Management Unit (MPMU) */ |