diff options
| author | Guenter Roeck <linux@roeck-us.net> | 2013-08-17 13:58:40 -0700 |
|---|---|---|
| committer | Wim Van Sebroeck <wim@iguana.be> | 2013-11-18 21:34:08 +0100 |
| commit | 8f526389599fc543b204c12a36de8345eb298085 (patch) | |
| tree | 9a95ff30277a2afc4382dd49d103ee55d08132ac | |
| parent | 30a83695aa2ed3ffb1445d6daef1e620c3ca4e6d (diff) | |
watchdog: w83627hf: Enable watchdog only once
It is unnecessary to enable the logical device and WDT0 each time
the watchdog is accessed. Do it only once during initialization.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
| -rw-r--r-- | drivers/watchdog/w83627hf_wdt.c | 35 |
1 files changed, 17 insertions, 18 deletions
diff --git a/drivers/watchdog/w83627hf_wdt.c b/drivers/watchdog/w83627hf_wdt.c index ab5ec6d84b1..910d4373682 100644 --- a/drivers/watchdog/w83627hf_wdt.c +++ b/drivers/watchdog/w83627hf_wdt.c @@ -72,28 +72,10 @@ MODULE_PARM_DESC(nowayout, static void w83627hf_select_wd_register(void) { - unsigned char c; outb_p(0x87, WDT_EFER); /* Enter extended function mode */ outb_p(0x87, WDT_EFER); /* Again according to manual */ - - outb(0x20, WDT_EFER); /* check chip version */ - c = inb(WDT_EFDR); - if (c == 0x82) { /* W83627THF */ - outb_p(0x2b, WDT_EFER); /* select GPIO3 */ - c = ((inb_p(WDT_EFDR) & 0xf7) | 0x04); /* select WDT0 */ - outb_p(0x2b, WDT_EFER); - outb_p(c, WDT_EFDR); /* set GPIO3 to WDT0 */ - } else if (c == 0x88 || c == 0xa0) { /* W83627EHF / W83627DHG */ - outb_p(0x2d, WDT_EFER); /* select GPIO5 */ - c = inb_p(WDT_EFDR) & ~0x01; /* PIN77 -> WDT0# */ - outb_p(0x2d, WDT_EFER); - outb_p(c, WDT_EFDR); /* set GPIO5 to WDT0 */ - } - outb_p(0x07, WDT_EFER); /* point to logical device number reg */ outb_p(0x08, WDT_EFDR); /* select logical device 8 (GPIO2) */ - outb_p(0x30, WDT_EFER); /* select CR30 */ - outb_p(0x01, WDT_EFDR); /* set bit 0 to activate GPIO2 */ } static void w83627hf_unselect_wd_register(void) @@ -110,6 +92,23 @@ static void w83627hf_init(struct watchdog_device *wdog) w83627hf_select_wd_register(); + outb(0x20, WDT_EFER); /* check chip version */ + t = inb(WDT_EFDR); + if (t == 0x82) { /* W83627THF */ + outb_p(0x2b, WDT_EFER); /* select GPIO3 */ + t = ((inb_p(WDT_EFDR) & 0xf7) | 0x04); /* select WDT0 */ + outb_p(0x2b, WDT_EFER); + outb_p(t, WDT_EFDR); /* set GPIO3 to WDT0 */ + } else if (t == 0x88 || t == 0xa0) { /* W83627EHF / W83627DHG */ + outb_p(0x2d, WDT_EFER); /* select GPIO5 */ + t = inb_p(WDT_EFDR) & ~0x01; /* PIN77 -> WDT0# */ + outb_p(0x2d, WDT_EFER); + outb_p(t, WDT_EFDR); /* set GPIO5 to WDT0 */ + } + + outb_p(0x30, WDT_EFER); /* select CR30 */ + outb_p(0x01, WDT_EFDR); /* set bit 0 to activate GPIO2 */ + outb_p(0xF6, WDT_EFER); /* Select CRF6 */ t = inb_p(WDT_EFDR); /* read CRF6 */ if (t != 0) { |