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authorFelipe Balbi <balbi@ti.com>2012-09-06 15:45:40 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2012-09-06 09:17:02 -0700
commit6721ab7f77f2614ab43e3de2f908b1d7436331df (patch)
treed77f97af3e60931b62d6ec775f5fbb6b2bab7b23
parentd37c6cebcb0c7ab4fc9e000061c93cca9d2a3941 (diff)
serial: omap: enable RX and TX FIFO usage
enable RX FIFO for 16 characters and TX FIFO for 16 spaces. Tested-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/tty/serial/omap-serial.c10
1 files changed, 7 insertions, 3 deletions
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index 164c3c94067..cfd209485af 100644
--- a/drivers/tty/serial/omap-serial.c
+++ b/drivers/tty/serial/omap-serial.c
@@ -56,8 +56,8 @@
#define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK (1 << 7)
/* FCR register bitmasks */
-#define OMAP_UART_FCR_RX_FIFO_TRIG_SHIFT 6
#define OMAP_UART_FCR_RX_FIFO_TRIG_MASK (0x3 << 6)
+#define OMAP_UART_FCR_TX_FIFO_TRIG_MASK (0x3 << 4)
/* MVR register bitmasks */
#define OMAP_UART_MVR_SCHEME_SHIFT 30
@@ -834,9 +834,13 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK;
- /* Set receive FIFO threshold to 1 byte */
+ /* Set receive FIFO threshold to 16 characters and
+ * transmit FIFO threshold to 16 spaces
+ */
up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK;
- up->fcr |= (0x1 << OMAP_UART_FCR_RX_FIFO_TRIG_SHIFT);
+ up->fcr &= ~OMAP_UART_FCR_TX_FIFO_TRIG_MASK;
+ up->fcr |= UART_FCR6_R_TRIGGER_16 | UART_FCR6_T_TRIGGER_24 |
+ UART_FCR_ENABLE_FIFO;
serial_out(up, UART_FCR, up->fcr);
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);