diff options
| author | Magnus Damm <damm@opensource.se> | 2011-01-18 08:53:06 +0000 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2011-01-18 20:01:10 +0900 |
| commit | dcdb318f2a60a479761d961e7d61bba452228561 (patch) | |
| tree | b4765e31c3a39eb43b884bbcca3c55b930400aaf | |
| parent | 39f308242edcf623690fd65c3c91e587ce402755 (diff) | |
ARM: mach-shmobile: sh73a0 CPGA fix for FRQCRA M3
Fix the M3 field offset for the FRQCRA register
in the sh73a0 CPGA. It should be 12, not 8.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| -rw-r--r-- | arch/arm/mach-shmobile/clock-sh73a0.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c index aa1c51dc6d7..af7d4c20ad7 100644 --- a/arch/arm/mach-shmobile/clock-sh73a0.c +++ b/arch/arm/mach-shmobile/clock-sh73a0.c @@ -212,7 +212,7 @@ enum { DIV4_I, DIV4_ZG, DIV4_M3, DIV4_B, DIV4_M1, DIV4_M2, static struct clk div4_clks[DIV4_NR] = { [DIV4_I] = DIV4(FRQCRA, 20, 0xfff, CLK_ENABLE_ON_INIT), [DIV4_ZG] = DIV4(FRQCRA, 16, 0xbff, CLK_ENABLE_ON_INIT), - [DIV4_M3] = DIV4(FRQCRA, 8, 0xfff, CLK_ENABLE_ON_INIT), + [DIV4_M3] = DIV4(FRQCRA, 12, 0xfff, CLK_ENABLE_ON_INIT), [DIV4_B] = DIV4(FRQCRA, 8, 0xfff, CLK_ENABLE_ON_INIT), [DIV4_M1] = DIV4(FRQCRA, 4, 0xfff, 0), [DIV4_M2] = DIV4(FRQCRA, 0, 0xfff, 0), |