diff options
| author | Yinghai Lu <yinghai@kernel.org> | 2012-02-10 15:33:46 -0800 |
|---|---|---|
| committer | Jesse Barnes <jbarnes@virtuousgeek.org> | 2012-02-23 11:59:45 -0800 |
| commit | dcef0d06b34a80071da4496556e85f9bf3b3c0bf (patch) | |
| tree | 0801a6c7dbbcc2ac3ba05b59e506ebf6cc5d3df7 | |
| parent | 5b415f1e79e0c09366f26e3eabe751642059285a (diff) | |
PCI: Disable cardbus bridge MEM1 prefetchable bit
Some BIOSes enable prefetch on both MEM0 and MEM1. But the cardbus code
assumes MEM1 is non-pref...
Discussion could be found at:
https://lkml.org/lkml/2012/1/12/1
https://bugzilla.kernel.org/show_bug.cgi?id=41622#c23
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Tested-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| -rw-r--r-- | drivers/pci/setup-bus.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index 090217afb4e..d5897c32f66 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -914,6 +914,14 @@ static void pci_bus_size_cardbus(struct pci_bus *bus, if (realloc_head) add_to_list(realloc_head, bridge, b_res+1, pci_cardbus_io_size, 0 /* dont care */); + /* MEM1 must not be pref mmio */ + pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl); + if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM1) { + ctrl &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM1; + pci_write_config_word(bridge, PCI_CB_BRIDGE_CONTROL, ctrl); + pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl); + } + /* * Check whether prefetchable memory is supported * by this bridge. |