diff options
| author | Gary King <gking@nvidia.com> | 2010-08-03 14:53:05 -0700 |
|---|---|---|
| committer | Colin Cross <ccross@android.com> | 2011-02-10 17:50:23 -0800 |
| commit | 537f5af0f63eea9cd06f477e1c0fe363d1656e08 (patch) | |
| tree | 41db11104b2d80c9f09f57741317d28489740116 | |
| parent | 26d902c0c6d6254f471663305d48b63f027ddb0c (diff) | |
ARM: tegra: iomap: Add missing devices
Adds gart, hdmi, avp, host1x, and pwm controllers to mach/iomap.h
Signed-off-by: Gary King <gking@nvidia.com>
Signed-off-by: Colin Cross <ccross@android.com>
| -rw-r--r-- | arch/arm/mach-tegra/include/mach/iomap.h | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/include/mach/iomap.h b/arch/arm/mach-tegra/include/mach/iomap.h index 325eca37348..691cdabd69c 100644 --- a/arch/arm/mach-tegra/include/mach/iomap.h +++ b/arch/arm/mach-tegra/include/mach/iomap.h @@ -26,6 +26,9 @@ #define TEGRA_IRAM_BASE 0x40000000 #define TEGRA_IRAM_SIZE SZ_256K +#define TEGRA_HOST1X_BASE 0x50000000 +#define TEGRA_HOST1X_SIZE 0x24000 + #define TEGRA_ARM_PERIF_BASE 0x50040000 #define TEGRA_ARM_PERIF_SIZE SZ_8K @@ -35,12 +38,30 @@ #define TEGRA_ARM_INT_DIST_BASE 0x50041000 #define TEGRA_ARM_INT_DIST_SIZE SZ_4K +#define TEGRA_MPE_BASE 0x54040000 +#define TEGRA_MPE_SIZE SZ_256K + +#define TEGRA_VI_BASE 0x54080000 +#define TEGRA_VI_SIZE SZ_256K + +#define TEGRA_ISP_BASE 0x54100000 +#define TEGRA_ISP_SIZE SZ_256K + #define TEGRA_DISPLAY_BASE 0x54200000 #define TEGRA_DISPLAY_SIZE SZ_256K #define TEGRA_DISPLAY2_BASE 0x54240000 #define TEGRA_DISPLAY2_SIZE SZ_256K +#define TEGRA_HDMI_BASE 0x54280000 +#define TEGRA_HDMI_SIZE SZ_256K + +#define TEGRA_GART_BASE 0x58000000 +#define TEGRA_GART_SIZE SZ_32M + +#define TEGRA_RES_SEMA_BASE 0x60001000 +#define TEGRA_RES_SEMA_SIZE SZ_4K + #define TEGRA_PRIMARY_ICTLR_BASE 0x60004000 #define TEGRA_PRIMARY_ICTLR_SIZE SZ_64 @@ -140,6 +161,18 @@ #define TEGRA_PWFM_BASE 0x7000A000 #define TEGRA_PWFM_SIZE SZ_256 +#define TEGRA_PWFM0_BASE 0x7000A000 +#define TEGRA_PWFM0_SIZE 4 + +#define TEGRA_PWFM1_BASE 0x7000A010 +#define TEGRA_PWFM1_SIZE 4 + +#define TEGRA_PWFM2_BASE 0x7000A020 +#define TEGRA_PWFM2_SIZE 4 + +#define TEGRA_PWFM3_BASE 0x7000A030 +#define TEGRA_PWFM3_SIZE 4 + #define TEGRA_MIPI_BASE 0x7000B000 #define TEGRA_MIPI_SIZE SZ_256 |