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authorMichal Simek <monstr@monstr.eu>2010-04-26 13:49:01 +0200
committerMichal Simek <monstr@monstr.eu>2010-05-06 11:21:59 +0200
commitde925d9d3b64390ef6363e16e9d6a84d7dd7cee1 (patch)
tree55b5418a6f9338be57590c13784a21ba6730246b
parentc17e1a1cedb723d48d4822cae1af1c010b608b5c (diff)
microblaze: Fix kmalloc alignment on non-coherent DMA platforms
Based on PowerPC patche 52142e756e9bf6485d3d53596e8aff2e816a7253 PowerPC description: On platforms doing non-coherent DMA (4xx, 8xx, ...), it's important that the kmalloc minimum alignment is set to the cache line size, to avoid sharing cache lines between different objects, so that DMA to one of the objects doesn't corrupt the other. Signed-off-by: Michal Simek <monstr@monstr.eu>
-rw-r--r--arch/microblaze/include/asm/page.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/microblaze/include/asm/page.h b/arch/microblaze/include/asm/page.h
index 9b12902b981..de493f86d28 100644
--- a/arch/microblaze/include/asm/page.h
+++ b/arch/microblaze/include/asm/page.h
@@ -31,6 +31,9 @@
#ifndef __ASSEMBLY__
+/* MS be sure that SLAB allocates aligned objects */
+#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
+
#define PAGE_UP(addr) (((addr)+((PAGE_SIZE)-1))&(~((PAGE_SIZE)-1)))
#define PAGE_DOWN(addr) ((addr)&(~((PAGE_SIZE)-1)))