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authorAnton Vorontsov <avorontsov@ru.mvista.com>2007-07-31 00:38:43 -0700
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-07-31 15:39:40 -0700
commit6f166e3833d953f0acf77eb7d426840da9e1a87f (patch)
tree95a15d4662f41b7a6b86c05d2558de16a86bc27e
parent4ef7af50373778ee248a2493c9cf62a2299806a8 (diff)
spidev supports more communications modes
The spidev driver doesn't currently expose all SPI communications modes to userspace. This passes them all through to the driver. Two of them are potentially troublesome, in the sense that they could cause hardware conflicts on shared busses. It might be appropriate to add some privilege checks for for those modes. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
-rw-r--r--drivers/spi/spidev.c13
-rw-r--r--include/linux/spi/spidev.h4
2 files changed, 14 insertions, 3 deletions
diff --git a/drivers/spi/spidev.c b/drivers/spi/spidev.c
index 38b60ad0eda..630f781aeb1 100644
--- a/drivers/spi/spidev.c
+++ b/drivers/spi/spidev.c
@@ -55,9 +55,16 @@
static unsigned long minors[N_SPI_MINORS / BITS_PER_LONG];
-/* Bit masks for spi_device.mode management */
-#define SPI_MODE_MASK (SPI_CPHA | SPI_CPOL)
-
+/* Bit masks for spi_device.mode management. Note that incorrect
+ * settings for CS_HIGH and 3WIRE can cause *lots* of trouble for other
+ * devices on a shared bus: CS_HIGH, because this device will be
+ * active when it shouldn't be; 3WIRE, because when active it won't
+ * behave as it should.
+ *
+ * REVISIT should changing those two modes be privileged?
+ */
+#define SPI_MODE_MASK (SPI_CPHA | SPI_CPOL | SPI_CS_HIGH \
+ | SPI_LSB_FIRST | SPI_3WIRE | SPI_LOOP)
struct spidev_data {
struct device dev;
diff --git a/include/linux/spi/spidev.h b/include/linux/spi/spidev.h
index 7d700be5749..c93ef9d42a0 100644
--- a/include/linux/spi/spidev.h
+++ b/include/linux/spi/spidev.h
@@ -35,6 +35,10 @@
#define SPI_MODE_2 (SPI_CPOL|0)
#define SPI_MODE_3 (SPI_CPOL|SPI_CPHA)
+#define SPI_CS_HIGH 0x04
+#define SPI_LSB_FIRST 0x08
+#define SPI_3WIRE 0x10
+#define SPI_LOOP 0x20
/*---------------------------------------------------------------------------*/