diff options
author | Bruno Randolf <br1@einfach.org> | 2010-06-07 13:11:25 +0900 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2010-06-08 09:31:20 -0400 |
commit | 39d5b2c83ca8904b6826a0713263a4e5a9c0730a (patch) | |
tree | f808861ade19d3f138d358a77261285f95684ae3 | |
parent | 84efa0e7aab9f41451bdf4bff5e2414bb59c6a93 (diff) |
ath5k: update AR5K_PHY_RESTART_DIV_GC values to match masks
#define AR5K_PHY_RESTART_DIV_GC 0x001c0000
is 3 bit wide.
The previous values of 0xc and 0x8 are 4bit wide and bigger than the mask.
Writing 0 and 1 to AR5K_PHY_RESTART_DIV_GC is consistent with the comments and
initvals we have in the HAL.
Signed-off-by: Bruno Randolf <br1@einfach.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r-- | drivers/net/wireless/ath/ath5k/phy.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/wireless/ath/ath5k/phy.c b/drivers/net/wireless/ath/ath5k/phy.c index 34ba576d274..0f3b9beca2c 100644 --- a/drivers/net/wireless/ath/ath5k/phy.c +++ b/drivers/net/wireless/ath/ath5k/phy.c @@ -1768,13 +1768,13 @@ ath5k_hw_set_fast_div(struct ath5k_hw *ah, u8 ee_mode, bool enable) if (enable) { AR5K_REG_WRITE_BITS(ah, AR5K_PHY_RESTART, - AR5K_PHY_RESTART_DIV_GC, 0xc); + AR5K_PHY_RESTART_DIV_GC, 1); AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_FAST_ANT_DIV, AR5K_PHY_FAST_ANT_DIV_EN); } else { AR5K_REG_WRITE_BITS(ah, AR5K_PHY_RESTART, - AR5K_PHY_RESTART_DIV_GC, 0x8); + AR5K_PHY_RESTART_DIV_GC, 0); AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_FAST_ANT_DIV, AR5K_PHY_FAST_ANT_DIV_EN); |