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authorBorislav Petkov <bp@suse.de>2014-11-22 11:22:35 +0100
committerBorislav Petkov <bp@suse.de>2014-11-25 13:09:37 +0100
commit21690934d93408bb7247943f886b960cf30ecd19 (patch)
tree45219ea03c3ef132b3dfda4ec9002d4a3e85d1b2
parentfd19fcd6324d29c97ba69ac3433e392989af401c (diff)
EDAC, mce_amd_inj: Enable direct writes to MCE MSRs
Normally, writing those causes a #GP but HWCR[McStatusWrEn] controls that. Provide a knob. Signed-off-by: Borislav Petkov <bp@suse.de>
-rw-r--r--drivers/edac/mce_amd_inj.c24
1 files changed, 24 insertions, 0 deletions
diff --git a/drivers/edac/mce_amd_inj.c b/drivers/edac/mce_amd_inj.c
index 9b5023d6f55..9b5ca92737a 100644
--- a/drivers/edac/mce_amd_inj.c
+++ b/drivers/edac/mce_amd_inj.c
@@ -55,6 +55,30 @@ DEFINE_SIMPLE_ATTRIBUTE(misc_fops, inj_misc_get, inj_misc_set, "%llx\n");
DEFINE_SIMPLE_ATTRIBUTE(addr_fops, inj_addr_get, inj_addr_set, "%llx\n");
/*
+ * Caller needs to be make sure this cpu doesn't disappear
+ * from under us, i.e.: get_cpu/put_cpu.
+ */
+static int toggle_hw_mce_inject(unsigned int cpu, bool enable)
+{
+ u32 l, h;
+ int err;
+
+ err = rdmsr_on_cpu(cpu, MSR_K7_HWCR, &l, &h);
+ if (err) {
+ pr_err("%s: error reading HWCR\n", __func__);
+ return err;
+ }
+
+ enable ? (l |= BIT(18)) : (l &= ~BIT(18));
+
+ err = wrmsr_on_cpu(cpu, MSR_K7_HWCR, l, h);
+ if (err)
+ pr_err("%s: error writing HWCR\n", __func__);
+
+ return err;
+}
+
+/*
* This denotes into which bank we're injecting and triggers
* the injection, at the same time.
*/