diff options
| author | Steve Longerbeam <slongerbeam@gmail.com> | 2014-06-25 18:05:55 -0700 |
|---|---|---|
| committer | Philipp Zabel <p.zabel@pengutronix.de> | 2014-09-02 14:55:56 +0200 |
| commit | 3feb049f378da6aa1209e05ef5c656a1f26a9183 (patch) | |
| tree | a6fca304e6c726762ec2d740c85a15f9ec95a6f7 | |
| parent | 60c04456f68f67f68180ebd84a47e4c58931f70f (diff) | |
gpu: ipu-v3: Add ipu_dump()
Adds ipu_dump() which dumps IPU register state to debug.
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| -rw-r--r-- | drivers/gpu/ipu-v3/ipu-common.c | 38 | ||||
| -rw-r--r-- | include/video/imx-ipu-v3.h | 1 |
2 files changed, 39 insertions, 0 deletions
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c index 5c3d5269056..df65d2bca52 100644 --- a/drivers/gpu/ipu-v3/ipu-common.c +++ b/drivers/gpu/ipu-v3/ipu-common.c @@ -1145,6 +1145,44 @@ static void ipu_irq_exit(struct ipu_soc *ipu) irq_domain_remove(ipu->domain); } +void ipu_dump(struct ipu_soc *ipu) +{ + int i; + + dev_dbg(ipu->dev, "IPU_CONF = \t0x%08X\n", + ipu_cm_read(ipu, IPU_CONF)); + dev_dbg(ipu->dev, "IDMAC_CONF = \t0x%08X\n", + ipu_idmac_read(ipu, IDMAC_CONF)); + dev_dbg(ipu->dev, "IDMAC_CHA_EN1 = \t0x%08X\n", + ipu_idmac_read(ipu, IDMAC_CHA_EN(0))); + dev_dbg(ipu->dev, "IDMAC_CHA_EN2 = \t0x%08X\n", + ipu_idmac_read(ipu, IDMAC_CHA_EN(32))); + dev_dbg(ipu->dev, "IDMAC_CHA_PRI1 = \t0x%08X\n", + ipu_idmac_read(ipu, IDMAC_CHA_PRI(0))); + dev_dbg(ipu->dev, "IDMAC_CHA_PRI2 = \t0x%08X\n", + ipu_idmac_read(ipu, IDMAC_CHA_PRI(32))); + dev_dbg(ipu->dev, "IDMAC_BAND_EN1 = \t0x%08X\n", + ipu_idmac_read(ipu, IDMAC_BAND_EN(0))); + dev_dbg(ipu->dev, "IDMAC_BAND_EN2 = \t0x%08X\n", + ipu_idmac_read(ipu, IDMAC_BAND_EN(32))); + dev_dbg(ipu->dev, "IPU_CHA_DB_MODE_SEL0 = \t0x%08X\n", + ipu_cm_read(ipu, IPU_CHA_DB_MODE_SEL(0))); + dev_dbg(ipu->dev, "IPU_CHA_DB_MODE_SEL1 = \t0x%08X\n", + ipu_cm_read(ipu, IPU_CHA_DB_MODE_SEL(32))); + dev_dbg(ipu->dev, "IPU_FS_PROC_FLOW1 = \t0x%08X\n", + ipu_cm_read(ipu, IPU_FS_PROC_FLOW1)); + dev_dbg(ipu->dev, "IPU_FS_PROC_FLOW2 = \t0x%08X\n", + ipu_cm_read(ipu, IPU_FS_PROC_FLOW2)); + dev_dbg(ipu->dev, "IPU_FS_PROC_FLOW3 = \t0x%08X\n", + ipu_cm_read(ipu, IPU_FS_PROC_FLOW3)); + dev_dbg(ipu->dev, "IPU_FS_DISP_FLOW1 = \t0x%08X\n", + ipu_cm_read(ipu, IPU_FS_DISP_FLOW1)); + for (i = 0; i < 15; i++) + dev_dbg(ipu->dev, "IPU_INT_CTRL(%d) = \t%08X\n", i, + ipu_cm_read(ipu, IPU_INT_CTRL(i))); +} +EXPORT_SYMBOL_GPL(ipu_dump); + static int ipu_probe(struct platform_device *pdev) { const struct of_device_id *of_id = diff --git a/include/video/imx-ipu-v3.h b/include/video/imx-ipu-v3.h index b41c17d5afc..c74bf4a0520 100644 --- a/include/video/imx-ipu-v3.h +++ b/include/video/imx-ipu-v3.h @@ -151,6 +151,7 @@ int ipu_idmac_channel_irq(struct ipu_soc *ipu, struct ipuv3_channel *channel, */ void ipu_set_csi_src_mux(struct ipu_soc *ipu, int csi_id, bool mipi_csi2); void ipu_set_ic_src_mux(struct ipu_soc *ipu, int csi_id, bool vdi); +void ipu_dump(struct ipu_soc *ipu); /* * IPU Image DMA Controller (idmac) functions |