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authorWolfram Sang <wsa@sang-engineering.com>2014-02-24 20:57:11 +0100
committerMike Turquette <mturquette@linaro.org>2014-02-25 00:26:37 -0800
commit95aa4f9b5fe577de902aa780e91140c6e89c73a2 (patch)
tree1be7fd0d0f4016f6758c98dee31641e49f268ded
parentad077ceb8a90c7ef1fc15758ed3811448181ee80 (diff)
clk: shmobile: div6: use proper description in kernel doc
These variable clocks have nothing to do with MSTP gating, probably a copy&paste leftover. Signed-off-by: Wolfram Sang <wsa@sang-engineering.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
-rw-r--r--drivers/clk/shmobile/clk-div6.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/shmobile/clk-div6.c b/drivers/clk/shmobile/clk-div6.c
index aac4756ec52..f065f694cb6 100644
--- a/drivers/clk/shmobile/clk-div6.c
+++ b/drivers/clk/shmobile/clk-div6.c
@@ -23,7 +23,7 @@
#define CPG_DIV6_DIV_MASK 0x3f
/**
- * struct div6_clock - MSTP gating clock
+ * struct div6_clock - CPG 6 bit divider clock
* @hw: handle between common and hardware-specific interfaces
* @reg: IO-remapped register
* @div: divisor value (1-64)