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authorMugunthan V N <mugunthanvnm@ti.com>2012-08-06 05:05:58 +0000
committerDavid S. Miller <davem@davemloft.net>2012-08-07 16:24:55 -0700
commite07b94f1352723994d8b588ac5ed8af91bcc9fb6 (patch)
treef1b6b94a52456bf0f4494f478eb5b684f8f3d440
parentec03e6a89e5168c92581a769681207c29ad2030f (diff)
documentation: dt: bindings: cpsw: fixing the examples for directly using it in dts file
Fixing the cpsw device tree example to make it simpler to copy pastable to dts file and use it directly. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--Documentation/devicetree/bindings/net/cpsw.txt101
1 files changed, 53 insertions, 48 deletions
diff --git a/Documentation/devicetree/bindings/net/cpsw.txt b/Documentation/devicetree/bindings/net/cpsw.txt
index acca48c4246..dcaabe9fe86 100644
--- a/Documentation/devicetree/bindings/net/cpsw.txt
+++ b/Documentation/devicetree/bindings/net/cpsw.txt
@@ -11,6 +11,7 @@ Required properties:
- cpdma_channels : Specifies number of channels in CPDMA
- host_port_no : Specifies host port shift
- cpdma_reg_ofs : Specifies CPDMA submodule register offset
+- cpdma_sram_ofs : Specifies CPDMA SRAM offset
- ale_reg_ofs : Specifies ALE submodule register offset
- ale_entries : Specifies No of entries ALE can hold
- host_port_reg_ofs : Specifies host port register offset
@@ -43,62 +44,66 @@ Examples:
reg = <0x4A100000 0x1000>;
interrupts = <55 0x4>;
interrupt-parent = <&intc>;
- cpdma_channels = 8;
- host_port_no = 0;
- cpdma_reg_ofs = 0x800;
- ale_reg_ofs = 0xd00;
- ale_entries = 1024;
- host_port_reg_ofs = 0x108;
- hw_stats_reg_ofs = 0x900;
- bd_ram_ofs = 0x2000;
- bd_ram_size = 0x2000;
- no_bd_ram = 0;
- rx_descs = 64;
- mac_control = 0x20;
- slaves = 2;
- slave@0 {
- slave_reg_ofs = 0x208;
- sliver_reg_ofs = 0xd80;
- phy_id = "davinci_mdio-0:00"
- mac-address = [00 04 9F 01 1B B8];
+ cpdma_channels = <8>;
+ host_port_no = <0>;
+ cpdma_reg_ofs = <0x800>;
+ cpdma_sram_ofs = <0xa00>;
+ ale_reg_ofs = <0xd00>;
+ ale_entries = <1024>;
+ host_port_reg_ofs = <0x108>;
+ hw_stats_reg_ofs = <0x900>;
+ bd_ram_ofs = <0x2000>;
+ bd_ram_size = <0x2000>;
+ no_bd_ram = <0>;
+ rx_descs = <64>;
+ mac_control = <0x20>;
+ slaves = <2>;
+ cpsw_emac0: slave@0 {
+ slave_reg_ofs = <0x208>;
+ sliver_reg_ofs = <0xd80>;
+ phy_id = "davinci_mdio.16:00";
+ /* Filled in by U-Boot */
+ mac-address = [ 00 00 00 00 00 00 ];
};
- slave@1 {
- slave_reg_ofs = 0x208;
- sliver_reg_ofs = 0xd80;
- phy_id = "davinci_mdio-0:01"
- mac-address = [00 04 9F 01 1B B9];
+ cpsw_emac1: slave@1 {
+ slave_reg_ofs = <0x308>;
+ sliver_reg_ofs = <0xdc0>;
+ phy_id = "davinci_mdio.16:01";
+ /* Filled in by U-Boot */
+ mac-address = [ 00 00 00 00 00 00 ];
};
};
(or)
-
mac: ethernet@4A100000 {
compatible = "ti,cpsw";
ti,hwmods = "cpgmac0";
- cpdma_channels = 8;
- host_port_no = 0;
- cpdma_reg_ofs = 0x800;
- ale_reg_ofs = 0xd00;
- ale_entries = 1024;
- host_port_reg_ofs = 0x108;
- hw_stats_reg_ofs = 0x900;
- bd_ram_ofs = 0x2000;
- bd_ram_size = 0x2000;
- no_bd_ram = 0;
- rx_descs = 64;
- mac_control = 0x20;
- slaves = 2;
- slave@0 {
- slave_reg_ofs = 0x208;
- sliver_reg_ofs = 0xd80;
- phy_id = "davinci_mdio-0:00"
- mac-address = [00 04 9F 01 1B B8];
+ cpdma_channels = <8>;
+ host_port_no = <0>;
+ cpdma_reg_ofs = <0x800>;
+ cpdma_sram_ofs = <0xa00>;
+ ale_reg_ofs = <0xd00>;
+ ale_entries = <1024>;
+ host_port_reg_ofs = <0x108>;
+ hw_stats_reg_ofs = <0x900>;
+ bd_ram_ofs = <0x2000>;
+ bd_ram_size = <0x2000>;
+ no_bd_ram = <0>;
+ rx_descs = <64>;
+ mac_control = <0x20>;
+ slaves = <2>;
+ cpsw_emac0: slave@0 {
+ slave_reg_ofs = <0x208>;
+ sliver_reg_ofs = <0xd80>;
+ phy_id = "davinci_mdio.16:00";
+ /* Filled in by U-Boot */
+ mac-address = [ 00 00 00 00 00 00 ];
};
- slave@1 {
- slave_reg_ofs = 0x208;
- sliver_reg_ofs = 0xd80;
- phy_id = "davinci_mdio-0:01"
- mac-address = [00 04 9F 01 1B B9];
+ cpsw_emac1: slave@1 {
+ slave_reg_ofs = <0x308>;
+ sliver_reg_ofs = <0xdc0>;
+ phy_id = "davinci_mdio.16:01";
+ /* Filled in by U-Boot */
+ mac-address = [ 00 00 00 00 00 00 ];
};
-
};