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authorRalf Baechle <ralf@linux-mips.org>2005-10-01 17:34:35 +0100
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 19:32:33 +0100
commit5090dfb5bcf51479370b501e934edadc4d781f67 (patch)
tree77644f77c4884a8aee74fa985b166a1257cbe255
parent6aaf7786ed02da7797432708fbcdd242f9c0764e (diff)
Provide 64-bit address space definitions for the Sibyte SB1 CPU core.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--include/asm-mips/addrspace.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h
index a54cdd41795..7abdb926faf 100644
--- a/include/asm-mips/addrspace.h
+++ b/include/asm-mips/addrspace.h
@@ -162,6 +162,16 @@
#define TO_PHYS_MASK _LLCONST_(0x000000ffffffffff) /* 2^^40 - 1 */
#endif
+#if defined(CONFIG_CPU_SB1)
+#define KUSIZE _LLCONST_(0x0000100000000000) /* 2^^44 */
+#define KUSIZE_64 _LLCONST_(0x0000100000000000) /* 2^^44 */
+#define K0SIZE _LLCONST_(0x0000100000000000) /* 2^^44 */
+#define K1SIZE _LLCONST_(0x0000100000000000) /* 2^^44 */
+#define K2SIZE _LLCONST_(0x0000ffff80000000)
+#define KSEGSIZE _LLCONST_(0x0000ffff80000000) /* max syssegsz */
+#define TO_PHYS_MASK _LLCONST_(0x00000fffffffffff) /* 2^^44 - 1 */
+#endif
+
/*
* Further names for SGI source compatibility. These are stolen from
* IRIX's <sys/mips_addrspace.h>.