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authorMatthew Wilcox <matthew.r.wilcox@intel.com>2013-05-04 06:43:17 -0400
committerMatthew Wilcox <matthew.r.wilcox@intel.com>2013-05-08 09:54:31 -0400
commit44af146a84fa4a8e136d824207dcd356958a112b (patch)
treeb4985870b0cb802dd004d551152fe80a104c8d3d
parentba47e3865e8023e79b670793a41508222b5f0322 (diff)
NVMe: Only clear the enable bit when disabling controller
Many of the bits in the Controller Configuration register may only be modified when the Enable bit is clear. Clearing them at the same time as the Enable bit might be OK, but let's play it safe and only touch the Enable bit. Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com> Reviewed-by: Keith Busch <keith.busch@intel.com>
-rw-r--r--drivers/block/nvme-core.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/block/nvme-core.c b/drivers/block/nvme-core.c
index 2b1b5a74dc7..310d573b9e8 100644
--- a/drivers/block/nvme-core.c
+++ b/drivers/block/nvme-core.c
@@ -1137,7 +1137,10 @@ static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
*/
static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
{
- writel(0, &dev->bar->cc);
+ u32 cc = readl(&dev->bar->cc);
+
+ if (cc & NVME_CC_ENABLE)
+ writel(cc & ~NVME_CC_ENABLE, &dev->bar->cc);
return nvme_wait_ready(dev, cap, false);
}