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authorAlex Deucher <alexander.deucher@amd.com>2013-07-03 15:01:45 -0400
committerAlex Deucher <alexander.deucher@amd.com>2013-07-03 17:37:30 -0400
commit62fa44bf7b75e3e482655baa15309bf3ea122bd3 (patch)
tree558720917c4e42433ee524960596b4b8d9febf1a
parent2b90eddcd7091dd631ead1d79e28e79ad589bb8d (diff)
drm/radeon/tn: disable PG when changing UVD clocks
Causes hangs for some people. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/radeon/trinity_dpm.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/trinity_dpm.c b/drivers/gpu/drm/radeon/trinity_dpm.c
index b02b5ad9212..8a32bcc6bbb 100644
--- a/drivers/gpu/drm/radeon/trinity_dpm.c
+++ b/drivers/gpu/drm/radeon/trinity_dpm.c
@@ -921,6 +921,10 @@ static void trinity_setup_uvd_clocks(struct radeon_device *rdev,
{
struct trinity_power_info *pi = trinity_get_pi(rdev);
+ if (pi->enable_gfx_power_gating) {
+ trinity_gfx_powergating_enable(rdev, false);
+ }
+
if (pi->uvd_dpm) {
if (trinity_uvd_clocks_zero(new_rps) &&
!trinity_uvd_clocks_zero(old_rps)) {
@@ -946,6 +950,10 @@ static void trinity_setup_uvd_clocks(struct radeon_device *rdev,
radeon_set_uvd_clocks(rdev, new_rps->vclk, new_rps->dclk);
}
+
+ if (pi->enable_gfx_power_gating) {
+ trinity_gfx_powergating_enable(rdev, true);
+ }
}
static void trinity_set_uvd_clock_before_set_eng_clock(struct radeon_device *rdev,