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authorEli Cohen <eli@dev.mellanox.co.il>2015-02-11 16:40:38 +0200
committerDavid S. Miller <davem@davemloft.net>2015-02-11 19:42:23 -0800
commitde61390cb3e03186f85997fe08a11dcb9f7a01a3 (patch)
treeb098e7409297f328ce863a9738ae5ae68fa3a2bc
parentf7d70f74811f5a522885b2962edeccb417e950c7 (diff)
net/mlx5_core: Fix configuration of log_uar_page_sz
The current code failed to configure the page size for architectures with page size different than 4K - PPC for example. Signed-off-by: Carol L Soto <clsoto@us.ibm.com> Signed-off-by: Eli Cohen <eli@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/ethernet/mellanox/mlx5/core/main.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/main.c b/drivers/net/ethernet/mellanox/mlx5/core/main.c
index d6651937d89..5394a848655 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/main.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/main.c
@@ -291,6 +291,7 @@ static void copy_rw_fields(void *to, struct mlx5_caps *from)
MLX5_SET(cmd_hca_cap, to, log_max_ra_req_dc, from->gen.log_max_ra_req_dc);
MLX5_SET(cmd_hca_cap, to, log_max_ra_res_dc, from->gen.log_max_ra_res_dc);
MLX5_SET(cmd_hca_cap, to, pkey_table_size, to_fw_pkey_sz(from->gen.pkey_table_size));
+ MLX5_SET(cmd_hca_cap, to, log_uar_page_sz, PAGE_SHIFT - 12);
v64 = from->gen.flags & MLX5_CAP_BITS_RW_MASK;
*flags_off = cpu_to_be64(v64);
}