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authorAlexander Duyck <alexander.h.duyck@intel.com>2009-03-31 20:38:00 +0000
committerDavid S. Miller <davem@davemloft.net>2009-04-02 00:59:06 -0700
commit59c3de8944e04799643e6980c3ea6a30860ad39b (patch)
tree7d0b1568bc779c832cde38dbdd2bab9c4addf703 /COPYING
parent9404c82b5ea3237f43732d8afd4d1c0dc8f0f3ed (diff)
igb: add support for x2 link width configurations
When device is on PCIe link trained as x2 the driver is currently reporting link width as "unknown". The original patch provided by Myron adds the x2 link support and my changes are cosmetic to clean up the readability of the conditional operators. Based on work by: Myron Stowe <myron.stowe@hp.com> Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'COPYING')
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