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| author | Thierry Reding <thierry.reding@gmail.com> | 2013-08-09 16:49:28 +0200 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2013-08-12 14:20:22 -0600 |
| commit | bb034cb5eb7fa6596c40d405e31cef02de21ad30 (patch) | |
| tree | 54ba1bdd2556fd57ba703068bfc0265a36b39608 /CREDITS | |
| parent | 89e7ada41674197387fa67ea0a853f3651b4e375 (diff) | |
ARM: tegra: Enable PCIe controller on Beaver
PCIe lane 0 is connected to an onboard Gigabit Ethernet (RTL8168evl) and
lane 4 is routed to the board's miniPCIe slot.
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'CREDITS')
0 files changed, 0 insertions, 0 deletions