diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2009-06-12 09:53:47 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2009-06-12 11:32:58 +0200 |
| commit | 5b02ee3d219f9e01b6e9146e25613822cfc2e5ce (patch) | |
| tree | 7ce9126738c3cf4b37d67170d0e4b34818c057a9 /Documentation/ABI/testing/sysfs-devices-cache_disable | |
| parent | 26a28fa4fea5b8c65713aa50c124f76a88c7924d (diff) | |
| parent | 8ebf975608aaebd7feb33d77f07ba21a6380e086 (diff) | |
asm-generic: merge branch 'master' of torvalds/linux-2.6
Fixes a merge conflict against the x86 tree caused by a fix to
atomic.h which I renamed to atomic_long.h.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'Documentation/ABI/testing/sysfs-devices-cache_disable')
| -rw-r--r-- | Documentation/ABI/testing/sysfs-devices-cache_disable | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/Documentation/ABI/testing/sysfs-devices-cache_disable b/Documentation/ABI/testing/sysfs-devices-cache_disable new file mode 100644 index 00000000000..175bb4f7051 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-devices-cache_disable @@ -0,0 +1,18 @@ +What: /sys/devices/system/cpu/cpu*/cache/index*/cache_disable_X +Date: August 2008 +KernelVersion: 2.6.27 +Contact: mark.langsdorf@amd.com +Description: These files exist in every cpu's cache index directories. + There are currently 2 cache_disable_# files in each + directory. Reading from these files on a supported + processor will return that cache disable index value + for that processor and node. Writing to one of these + files will cause the specificed cache index to be disabled. + + Currently, only AMD Family 10h Processors support cache index + disable, and only for their L3 caches. See the BIOS and + Kernel Developer's Guide at + http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/31116-Public-GH-BKDG_3.20_2-4-09.pdf + for formatting information and other details on the + cache index disable. +Users: joachim.deguara@amd.com |