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authorXi Wang <xi.wang@gmail.com>2012-11-16 14:40:03 -0500
committerJames Bottomley <JBottomley@Parallels.com>2012-11-30 09:20:17 +0000
commitbeecadea1b8d67f591b13f7099559f32f3fd601d (patch)
treee96c70ef947343902268e9d6d294333f275706aa /Documentation/DocBook
parent072f19b4bea31cdd482d79f805413f2f9ac9e233 (diff)
[SCSI] mvsas: fix undefined bit shift
The macro bit(n) is defined as ((u32)1 << n), and thus it doesn't work with n >= 32, such as in mvs_94xx_assign_reg_set(): if (i >= 32) { mvi->sata_reg_set |= bit(i); ... } The shift ((u32)1 << n) with n >= 32 also leads to undefined behavior. The result varies depending on the architecture. This patch changes bit(n) to do a 64-bit shift. It also simplifies mv_ffc64() using __ffs64(), since invoking ffz() with ~0 is undefined. Signed-off-by: Xi Wang <xi.wang@gmail.com> Acked-by: Xiangliang Yu <yuxiangl@marvell.com> Cc: stable@vger.kernel.org Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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