diff options
| author | Len Brown <len.brown@intel.com> | 2010-06-01 22:53:36 -0400 |
|---|---|---|
| committer | Len Brown <len.brown@intel.com> | 2010-06-01 22:53:36 -0400 |
| commit | b42f5b0f0fd8c1c442c1b29a3fbcb338e8bd7732 (patch) | |
| tree | 194e13dfa85d2d2af8bd125acd80a445ee0def62 /Documentation/atomic_ops.txt | |
| parent | fe955682d2153b35dffcf1673dff0491096a3f0a (diff) | |
| parent | 0a76a34ff0804f1f413807b2e2d12117c2b602ca (diff) | |
Merge branches 'bugzilla-14668' and 'misc-2.6.35' into release
Diffstat (limited to 'Documentation/atomic_ops.txt')
| -rw-r--r-- | Documentation/atomic_ops.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/atomic_ops.txt b/Documentation/atomic_ops.txt index 396bec3b74e..ac4d4718712 100644 --- a/Documentation/atomic_ops.txt +++ b/Documentation/atomic_ops.txt @@ -320,7 +320,7 @@ counter decrement would not become globally visible until the obj->active update does. As a historical note, 32-bit Sparc used to only allow usage of -24-bits of it's atomic_t type. This was because it used 8 bits +24-bits of its atomic_t type. This was because it used 8 bits as a spinlock for SMP safety. Sparc32 lacked a "compare and swap" type instruction. However, 32-bit Sparc has since been moved over to a "hash table of spinlocks" scheme, that allows the full 32-bit |