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authorArchit Taneja <architt@codeaurora.org>2014-09-29 10:03:07 +0530
committerVinod Koul <vinod.koul@intel.com>2014-11-17 13:50:39 +0530
commitfb93f520e0a5df581f5432bdb901539240391568 (patch)
treed99e067f184598518303b5bf9fec1b54754a5c1c /Documentation/crypto
parent0b04ddf8638ca5652b1f7ab7794beb363942407d (diff)
dmaengine: qcom_bam_dma: Generalize BAM register offset calculations
The BAM DMA IP comes in different versions. The register offset layout varies among these versions. The layouts depend on which generation/family of SoCs they belong to. The current SoCs(like 8084, 8074) have a layout where the Top level registers come in the beginning of the address range, followed by pipe and event registers. The BAM revision numbers fall above 1.4.0. The older SoCs (like 8064, 8960) have a layout where the pipe registers come first, and the top level come later. These have BAM revision numbers lesser than 1.4.0. It isn't suitable to have macros provide the register offsets with the layouts changed. Future BAM revisions may have different register layouts too. The register addresses are now calculated by referring a table which contains a base offset and multipliers for pipe/evnt/ee registers. We have a common function bam_addr() which computes addresses for all the registers. When computing address of top level/ee registers, we pass 0 to the pipe argument in addr() since they don't have any multiple instances. Some of the unused register definitions are removed. We can add new registers as we need them. Reviewed-by: Kumar Gala <galak@codeaurora.org> Reviewed-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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