summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/arm
diff options
context:
space:
mode:
authorArnd Bergmann <arnd@arndb.de>2014-11-20 17:18:43 +0100
committerArnd Bergmann <arnd@arndb.de>2014-11-20 17:18:43 +0100
commit2db0aea590246b570b9352659f065727900c6f69 (patch)
treee2c084add2bab79a1407cde49cbbc76ea036680c /Documentation/devicetree/bindings/arm
parent4eca459bc10d8400407d0fc04e90dac45b571c87 (diff)
parent3ee851e212d0bb6be8c462059fba74ce2e3f6064 (diff)
Merge tag 'v3.19-rockchip-soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/soc
Pull "code part of the rk3288 smp support" from Heiko Stübner: here is the second batch of soc related changes, consisting only of the smp support for rk3288. Due to the slight misheap of the v3.18 cpuclk pull being merge, it is based on exactly this merge commit from Olof to next/soc. * tag 'v3.19-rockchip-soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: rockchip: add basic smp support for rk3288 ARM: rockchip: add option to access the pmu via a phandle in smp_operations ARM: rockchip: convert to regmap and use pmu syscon if available Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'Documentation/devicetree/bindings/arm')
-rw-r--r--Documentation/devicetree/bindings/arm/cpus.txt9
1 files changed, 9 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index fc446347ab6..b2aacbe16ed 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -227,6 +227,15 @@ nodes to be present and contain the properties described below.
# List of phandles to idle state nodes supported
by this cpu [3].
+ - rockchip,pmu
+ Usage: optional for systems that have an "enable-method"
+ property value of "rockchip,rk3066-smp"
+ While optional, it is the preferred way to get access to
+ the cpu-core power-domains.
+ Value type: <phandle>
+ Definition: Specifies the syscon node controlling the cpu core
+ power domains.
+
Example 1 (dual-cluster big.LITTLE system 32-bit):
cpus {