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authorLinus Torvalds <torvalds@linux-foundation.org>2013-11-18 15:50:07 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2013-11-18 15:50:07 -0800
commit13509c3a9d20a9df93dc9b944e8bd20fe1b454a7 (patch)
treed7a97d1d10e88bcb93852cb0143a000710e9e246 /Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
parent1ea406c0e08c717241275064046d29b5bac1b1db (diff)
parentcfff1f4a9367bfe0d88413e8807f8369e9564729 (diff)
Merge branch 'i2c/for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c changes from Wolfram Sang: - new drivers for exynos5, bcm kona, and st micro - bigger overhauls for drivers mxs and rcar - typical driver bugfixes, cleanups, improvements - got rid of the superfluous 'driver' member in i2c_client struct This touches a few drivers in other subsystems. All acked. * 'i2c/for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (38 commits) i2c: bcm-kona: fix error return code in bcm_kona_i2c_probe() i2c: i2c-eg20t: do not print error message in syslog if no ACK received i2c: bcm-kona: Introduce Broadcom I2C Driver i2c: cbus-gpio: Fix device tree binding i2c: wmt: add missing clk_disable_unprepare() on error i2c: designware: add new ACPI IDs i2c: i801: Add Device IDs for Intel Wildcat Point-LP PCH i2c: exynos5: Remove incorrect clk_disable_unprepare i2c: i2c-st: Add ST I2C controller i2c: exynos5: add High Speed I2C controller driver i2c: rcar: fixup rcar type naming i2c: scmi: remove some bogus NULL checks i2c: sh_mobile & rcar: Enable the driver on all ARM platforms i2c: sh_mobile: Convert to clk_prepare/unprepare i2c: mux: gpio: use reg value for i2c_add_mux_adapter i2c: mux: gpio: use gpio_set_value_cansleep() i2c: Include linux/of.h header i2c: mxs: Fix PIO mode on i.MX23 i2c: mxs: Rework the PIO mode operation i2c: mxs: distinguish i.MX23 and i.MX28 based I2C controller ...
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+* Samsung's High Speed I2C controller
+
+The Samsung's High Speed I2C controller is used to interface with I2C devices
+at various speeds ranging from 100khz to 3.4Mhz.
+
+Required properties:
+ - compatible: value should be.
+ -> "samsung,exynos5-hsi2c", for i2c compatible with exynos5 hsi2c.
+ - reg: physical base address of the controller and length of memory mapped
+ region.
+ - interrupts: interrupt number to the cpu.
+ - #address-cells: always 1 (for i2c addresses)
+ - #size-cells: always 0
+
+ - Pinctrl:
+ - pinctrl-0: Pin control group to be used for this controller.
+ - pinctrl-names: Should contain only one value - "default".
+
+Optional properties:
+ - clock-frequency: Desired operating frequency in Hz of the bus.
+ -> If not specified, the bus operates in fast-speed mode at
+ at 100khz.
+ -> If specified, the bus operates in high-speed mode only if the
+ clock-frequency is >= 1Mhz.
+
+Example:
+
+hsi2c@12ca0000 {
+ compatible = "samsung,exynos5-hsi2c";
+ reg = <0x12ca0000 0x100>;
+ interrupts = <56>;
+ clock-frequency = <100000>;
+
+ pinctrl-0 = <&i2c4_bus>;
+ pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ s2mps11_pmic@66 {
+ compatible = "samsung,s2mps11-pmic";
+ reg = <0x66>;
+ };
+};