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author | Paul Mundt <lethal@linux-sh.org> | 2012-08-01 13:49:13 +0900 |
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committer | Paul Mundt <lethal@linux-sh.org> | 2012-08-01 13:49:13 +0900 |
commit | 91ba548cfd5cc8ee93b9435527efb8fa4caf5c5e (patch) | |
tree | c96ed92413044a28d17783e84a8824bfd2437af1 /Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt | |
parent | b9ccfda293ee6fca9a89a1584f0900e0627b975e (diff) | |
parent | 4dc4c51675c137c30838425ecc8d471ff5eb138b (diff) |
Merge branch 'sh/dmaengine' into sh-latest
Diffstat (limited to 'Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt')
-rw-r--r-- | Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt new file mode 100644 index 00000000000..bbbeedb4ec0 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt @@ -0,0 +1,18 @@ +Tegra SoC PWFM controller + +Required properties: +- compatible: should be one of: + - "nvidia,tegra20-pwm" + - "nvidia,tegra30-pwm" +- reg: physical base address and length of the controller's registers +- #pwm-cells: On Tegra the number of cells used to specify a PWM is 2. The + first cell specifies the per-chip index of the PWM to use and the second + cell is the duty cycle in nanoseconds. + +Example: + + pwm: pwm@7000a000 { + compatible = "nvidia,tegra20-pwm"; + reg = <0x7000a000 0x100>; + #pwm-cells = <2>; + }; |