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author | Mark Brown <broonie@linaro.org> | 2014-01-14 20:41:53 +0000 |
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committer | Mark Brown <broonie@linaro.org> | 2014-01-14 20:41:53 +0000 |
commit | 64a9aa9cf57dd551a9ae9bf48f5e63be608aae72 (patch) | |
tree | d5776aa6b85c7a0c4fa3565bd3881f9607c293dc /Documentation/devicetree/bindings/rng/qcom,prng.txt | |
parent | 16d7ea9167839d0b971ab29030886280595dd5fc (diff) | |
parent | 374b105797c3d4f29c685f3be535c35f5689b30e (diff) |
Merge tag 'v3.13-rc3' into asoc-pcm
Linux 3.13-rc3
Diffstat (limited to 'Documentation/devicetree/bindings/rng/qcom,prng.txt')
-rw-r--r-- | Documentation/devicetree/bindings/rng/qcom,prng.txt | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/rng/qcom,prng.txt b/Documentation/devicetree/bindings/rng/qcom,prng.txt new file mode 100644 index 00000000000..8e5853c2879 --- /dev/null +++ b/Documentation/devicetree/bindings/rng/qcom,prng.txt @@ -0,0 +1,17 @@ +Qualcomm MSM pseudo random number generator. + +Required properties: + +- compatible : should be "qcom,prng" +- reg : specifies base physical address and size of the registers map +- clocks : phandle to clock-controller plus clock-specifier pair +- clock-names : "core" clocks all registers, FIFO and circuits in PRNG IP block + +Example: + + rng@f9bff000 { + compatible = "qcom,prng"; + reg = <0xf9bff000 0x200>; + clocks = <&clock GCC_PRNG_AHB_CLK>; + clock-names = "core"; + }; |