summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/timer/efm32,timer.txt
diff options
context:
space:
mode:
authorOlof Johansson <olof@lixom.net>2013-11-15 15:17:59 -0800
committerOlof Johansson <olof@lixom.net>2013-11-15 15:17:59 -0800
commit6886059f2ef5d62c73e87a905e84fa4f87d56074 (patch)
treedfe6e1611d7c50057df52db7b55eafbfb8e33a93 /Documentation/devicetree/bindings/timer/efm32,timer.txt
parentca439c9b983ffa14e9eae6030e3ee80ad039388f (diff)
parent26273e02a0cf18eb72416559310d3294390a9024 (diff)
Merge tag 'omap-for-v3.13/fixes-for-merge-window-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Few clock fixes, a runtime PM fix, and pinctrl-single fix along with few other fixes that popped up during the merge window. * tag 'omap-for-v3.13/fixes-for-merge-window-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: Fix build for dra7xx without omap4 and 5 ARM: OMAP2+: omap_device: maintain sane runtime pm status around suspend/resume doc: devicetree: Add bindings documentation for omap-des driver ARM: dts: doc: Document missing compatible property for omap-sham driver ARM: OMAP3: Beagle: fix return value check in beagle_opp_init() ARM: OMAP: devicetree: fix SPI node compatible property syntax items pinctrl: single: call pcs_soc->rearm() whenever IRQ mask is changed ARM: OMAP2+: smsc911x: fix return value check in gpmc_smsc911x_init() + sync with newer trunk
Diffstat (limited to 'Documentation/devicetree/bindings/timer/efm32,timer.txt')
-rw-r--r--Documentation/devicetree/bindings/timer/efm32,timer.txt23
1 files changed, 23 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/timer/efm32,timer.txt b/Documentation/devicetree/bindings/timer/efm32,timer.txt
new file mode 100644
index 00000000000..97a568f696c
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/efm32,timer.txt
@@ -0,0 +1,23 @@
+* EFM32 timer hardware
+
+The efm32 Giant Gecko SoCs come with four 16 bit timers. Two counters can be
+connected to form a 32 bit counter. Each timer has three Compare/Capture
+channels and can be used as PWM or Quadrature Decoder. Available clock sources
+are the cpu's HFPERCLK (with a 10-bit prescaler) or an external pin.
+
+Required properties:
+- compatible : Should be efm32,timer
+- reg : Address and length of the register set
+- clocks : Should contain a reference to the HFPERCLK
+
+Optional properties:
+- interrupts : Reference to the timer interrupt
+
+Example:
+
+timer@40010c00 {
+ compatible = "efm32,timer";
+ reg = <0x40010c00 0x400>;
+ interrupts = <14>;
+ clocks = <&cmu clk_HFPERCLKTIMER3>;
+};