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authorMaxime Ripard <maxime.ripard@free-electrons.com>2012-11-12 15:07:50 +0100
committerMaxime Ripard <maxime.ripard@free-electrons.com>2012-11-16 21:56:50 +0100
commitb2ac5d7549710173ea0217bf8c7b3f71da5220d4 (patch)
tree317bd4c0c1d2e47afb7177bdf22b18780a7ff62d /Documentation/devicetree/bindings/timer
parent404525d5a7ecc847b5ac178dad96402f1e102ccc (diff)
clocksource: sunxi: Add Allwinner A1X Timer Driver
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> CC: Thomas Gleixner <tglx@linutronix.de> CC: John Stultz <johnstul@us.ibm.com>
Diffstat (limited to 'Documentation/devicetree/bindings/timer')
-rw-r--r--Documentation/devicetree/bindings/timer/allwinner,sunxi-timer.txt17
1 files changed, 17 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/timer/allwinner,sunxi-timer.txt b/Documentation/devicetree/bindings/timer/allwinner,sunxi-timer.txt
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+++ b/Documentation/devicetree/bindings/timer/allwinner,sunxi-timer.txt
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+Allwinner A1X SoCs Timer Controller
+
+Required properties:
+
+- compatible : should be "allwinner,sunxi-timer"
+- reg : Specifies base physical address and size of the registers.
+- interrupts : The interrupt of the first timer
+- clocks: phandle to the source clock (usually a 24 MHz fixed clock)
+
+Example:
+
+timer {
+ compatible = "allwinner,sunxi-timer";
+ reg = <0x01c20c00 0x400>;
+ interrupts = <22>;
+ clocks = <&osc>;
+};