diff options
author | David Brown <davidb@codeaurora.org> | 2011-08-04 01:55:24 -0700 |
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committer | David Brown <davidb@codeaurora.org> | 2011-08-29 12:47:36 -0700 |
commit | cfdad2aba7398021f6eec415b9271b9cb40065f9 (patch) | |
tree | a38cd210577bdba2affd72322fa36b41404adcd1 /Documentation/devicetree/bindings/tty/serial | |
parent | 886a451bd2491de3551c2aea2a2f155f159716c8 (diff) |
msm_serial: Add devicetree support
Add devicetree support to the msm_serial driver. Clocks are still
queried by direct name from the driver until device tree clock support
is implemented.
Change-Id: Ia6b2ddfcf1e5dc3bd25dd502662f971202e6d56f
Signed-off-by: David Brown <davidb@codeaurora.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'Documentation/devicetree/bindings/tty/serial')
-rw-r--r-- | Documentation/devicetree/bindings/tty/serial/msm_serial.txt | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/tty/serial/msm_serial.txt b/Documentation/devicetree/bindings/tty/serial/msm_serial.txt new file mode 100644 index 00000000000..aef383eb887 --- /dev/null +++ b/Documentation/devicetree/bindings/tty/serial/msm_serial.txt @@ -0,0 +1,27 @@ +* Qualcomm MSM UART + +Required properties: +- compatible : + - "qcom,msm-uart", and one of "qcom,msm-hsuart" or + "qcom,msm-lsuart". +- reg : offset and length of the register set for the device + for the hsuart operating in compatible mode, there should be a + second pair describing the gsbi registers. +- interrupts : should contain the uart interrupt. + +There are two different UART blocks used in MSM devices, +"qcom,msm-hsuart" and "qcom,msm-lsuart". The msm-serial driver is +able to handle both of these, and matches against the "qcom,msm-uart" +as the compatibility. + +The registers for the "qcom,msm-hsuart" device need to specify both +register blocks, even for the common driver. + +Example: + + uart@19c400000 { + compatible = "qcom,msm-hsuart", "qcom,msm-uart"; + reg = <0x19c40000 0x1000>, + <0x19c00000 0x1000>; + interrupts = <195>; + }; |