summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings
diff options
context:
space:
mode:
authorArnd Bergmann <arnd@arndb.de>2013-04-09 22:07:37 +0200
committerArnd Bergmann <arnd@arndb.de>2013-04-09 22:18:24 +0200
commit228e3023eb0430b4b9ed0736f8f87c96a6cd9c7a (patch)
tree4115d59b698a2a6e1953c5b263cab6d2a113d81b /Documentation/devicetree/bindings
parent894b7382cf20e81d38097d43b8802af6e79d48c4 (diff)
parent354599f460ba79c9fb00f220e42de5a7509ceeb4 (diff)
Merge tag 'mct-exynos-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers
From Kukjin Kim <kgene.kim@samsung.com>: add support exynos mct device tree and move into drivers/clocksource * tag 'mct-exynos-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: clocksource: mct: Add terminating entry for exynos_mct_ids table clocksource: mct: Add missing semicolons in exynos_mct.c ARM: EXYNOS: move mct driver to drivers/clocksource ARM: EXYNOS: remove static io-remapping of mct registers for Exynos5 ARM: dts: add mct device tree node for all supported Exynos SoC's ARM: EXYNOS: allow dt based discovery of mct controller using clocksource_of_init ARM: EXYNOS: add device tree support for MCT controller driver ARM: EXYNOS: prepare an array of MCT interrupt numbers and use it ARM: EXYNOS: add a register base address variable in mct controller driver Conflicts: drivers/clocksource/Makefile drivers/clocksource/exynos_mct.c [arnd: adapt to CLOCKSOURCE_OF_DECLARE interface change] Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'Documentation/devicetree/bindings')
-rw-r--r--Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt68
1 files changed, 68 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
new file mode 100644
index 00000000000..cb47bfbcaee
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
@@ -0,0 +1,68 @@
+Samsung's Multi Core Timer (MCT)
+
+The Samsung's Multi Core Timer (MCT) module includes two main blocks, the
+global timer and CPU local timers. The global timer is a 64-bit free running
+up-counter and can generate 4 interrupts when the counter reaches one of the
+four preset counter values. The CPU local timers are 32-bit free running
+down-counters and generate an interrupt when the counter expires. There is
+one CPU local timer instantiated in MCT for every CPU in the system.
+
+Required properties:
+
+- compatible: should be "samsung,exynos4210-mct".
+ (a) "samsung,exynos4210-mct", for mct compatible with Exynos4210 mct.
+ (b) "samsung,exynos4412-mct", for mct compatible with Exynos4412 mct.
+
+- reg: base address of the mct controller and length of the address space
+ it occupies.
+
+- interrupts: the list of interrupts generated by the controller. The following
+ should be the order of the interrupts specified. The local timer interrupts
+ should be specified after the four global timer interrupts have been
+ specified.
+
+ 0: Global Timer Interrupt 0
+ 1: Global Timer Interrupt 1
+ 2: Global Timer Interrupt 2
+ 3: Global Timer Interrupt 3
+ 4: Local Timer Interrupt 0
+ 5: Local Timer Interrupt 1
+ 6: ..
+ 7: ..
+ i: Local Timer Interrupt n
+
+Example 1: In this example, the system uses only the first global timer
+ interrupt generated by MCT and the remaining three global timer
+ interrupts are unused. Two local timer interrupts have been
+ specified.
+
+ mct@10050000 {
+ compatible = "samsung,exynos4210-mct";
+ reg = <0x10050000 0x800>;
+ interrupts = <0 57 0>, <0 0 0>, <0 0 0>, <0 0 0>,
+ <0 42 0>, <0 48 0>;
+ };
+
+Example 2: In this example, the MCT global and local timer interrupts are
+ connected to two seperate interrupt controllers. Hence, an
+ interrupt-map is created to map the interrupts to the respective
+ interrupt controllers.
+
+ mct@101C0000 {
+ compatible = "samsung,exynos4210-mct";
+ reg = <0x101C0000 0x800>;
+ interrupt-controller;
+ #interrups-cells = <2>;
+ interrupt-parent = <&mct_map>;
+ interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
+ <4 0>, <5 0>;
+
+ mct_map: mct-map {
+ #interrupt-cells = <2>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ interrupt-map = <0x0 0 &combiner 23 3>,
+ <0x4 0 &gic 0 120 0>,
+ <0x5 0 &gic 0 121 0>;
+ };
+ };