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authorBarry Song <Baohua.Song@csr.com>2012-12-14 15:24:01 +0800
committerLinus Walleij <linus.walleij@linaro.org>2012-12-26 01:59:52 +0100
commit408f181e0d4210ef7c77e825289d31fac530291c (patch)
tree704c61d090f1cf80b24dfccf4ed3c81ee1fe70df /Documentation/devicetree
parentb0666ba4745e35adc4e4f25e46c883cc84075ced (diff)
pinctrl: sirf: add missing DT-binding document
While sending email to Linus for reviewing: "pinctrl: sirf: add DT-binding pinmux mapping support" https://patchwork.kernel.org/patch/1364361/ i have included the devicetree/bindings/pinctrl/pinctrl-sirf.txt But while sending pull request with commit 056876f6c73406c, i missed the document. this patch takes the document back. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'Documentation/devicetree')
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diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-sirf.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-sirf.txt
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+CSR SiRFprimaII pinmux controller
+
+Required properties:
+- compatible : "sirf,prima2-pinctrl"
+- reg : Address range of the pinctrl registers
+- interrupts : Interrupts used by every GPIO group
+- gpio-controller : Indicates this device is a GPIO controller
+- interrupt-controller : Marks the device node as an interrupt controller
+
+Please refer to pinctrl-bindings.txt in this directory for details of the common
+pinctrl bindings used by client devices.
+
+SiRFprimaII's pinmux nodes act as a container for an abitrary number of subnodes.
+Each of these subnodes represents some desired configuration for a group of pins.
+
+Required subnode-properties:
+- sirf,pins : An array of strings. Each string contains the name of a group.
+- sirf,function: A string containing the name of the function to mux to the
+ group.
+
+ Valid values for group and function names can be found from looking at the
+ group and function arrays in driver files:
+ drivers/pinctrl/pinctrl-sirf.c
+
+For example, pinctrl might have subnodes like the following:
+ uart2_pins_a: uart2@0 {
+ uart {
+ sirf,pins = "uart2grp";
+ sirf,function = "uart2";
+ };
+ };
+ uart2_noflow_pins_a: uart2@1 {
+ uart {
+ sirf,pins = "uart2_nostreamctrlgrp";
+ sirf,function = "uart2_nostreamctrl";
+ };
+ };
+
+For a specific board, if it wants to use uart2 without hardware flow control,
+it can add the following to its board-specific .dts file.
+uart2: uart@0xb0070000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_noflow_pins_a>;
+}