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authorKyle Moffett <Kyle.D.Moffett@boeing.com>2011-12-22 10:19:10 +0000
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2012-02-23 10:49:58 +1100
commit98cca250aecaf3f1b2fec003e1c0ce0bfaa4be36 (patch)
treee87824ccffa41ac62898947a680c0c7d0f53db2e /Documentation/devicetree
parent3a7a7176e840f448aae929f7761ea80cf892c665 (diff)
fsl/mpic: Document and use the "big-endian" device-tree flag
The MPIC code checks for a "big-endian" property and sets the flag MPIC_BIG_ENDIAN if one is present, although prior to the "mpic->flags" fixup that would never have worked anways. Unfortunately, even now that it works properly, the Freescale mpic device-node (the "PowerQUICC-III"-compatible one) does not specify it, so all of the board ports need to manually pass it to mpic_alloc(). Document the flag and add it to the pq3 device tree. Existing code will still need to pass the MPIC_BIG_ENDIAN flag because their dtb may not have this property, but new platforms shouldn't need to do so. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/powerpc/fsl/mpic.txt9
1 files changed, 8 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt b/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt
index 2cf38bd841f..ebafba29fc5 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt
@@ -56,7 +56,14 @@ PROPERTIES
to the client. The presence of this property also mandates
that any initialization related to interrupt sources shall
be limited to sources explicitly referenced in the device tree.
-
+
+ - big-endian
+ Usage: optional
+ Value type: <empty>
+ If present the MPIC will be assumed to be big-endian. Some
+ device-trees omit this property on MPIC nodes even when the MPIC is
+ in fact big-endian, so certain boards override this property.
+
INTERRUPT SPECIFIER DEFINITION
Interrupt specifiers consists of 4 cells encoded as