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authorMark Brown <broonie@opensource.wolfsonmicro.com>2012-11-14 11:05:08 +0900
committerMark Brown <broonie@opensource.wolfsonmicro.com>2012-11-14 11:05:08 +0900
commit8266bdd2d716c08c3ebb1d6975daec88826d7f75 (patch)
tree8be8b69443da66029ac2afa3770850d192622db5 /Documentation/devicetree
parent19f15f0efdbdffeb29072208cfc666f61bf9897a (diff)
parent8528547bcc33622176a27963dc8a2513d116b832 (diff)
Merge branch 'spi-tegra' into spi-next
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.txt26
1 files changed, 26 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.txt b/Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.txt
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index 00000000000..8cf24f6f0a9
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+++ b/Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.txt
@@ -0,0 +1,26 @@
+NVIDIA Tegra20 SFLASH controller.
+
+Required properties:
+- compatible : should be "nvidia,tegra20-sflash".
+- reg: Should contain SFLASH registers location and length.
+- interrupts: Should contain SFLASH interrupts.
+- nvidia,dma-request-selector : The Tegra DMA controller's phandle and
+ request selector for this SFLASH controller.
+
+Recommended properties:
+- spi-max-frequency: Definition as per
+ Documentation/devicetree/bindings/spi/spi-bus.txt
+
+Example:
+
+spi@7000d600 {
+ compatible = "nvidia,tegra20-sflash";
+ reg = <0x7000c380 0x80>;
+ interrupts = <0 39 0x04>;
+ nvidia,dma-request-selector = <&apbdma 16>;
+ spi-max-frequency = <25000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+};
+