Merge tag 'mmc-v3.19-1' of git://git.linaro.org/people/ulf.hansson/mmc

Pull MMC updates from Ulf Hansson:
 "MMC core:
   - Consolidation and cleanups.
   - Some improvements regarding error handling.
   - Increase maximum amount of block devices.
   - Use correct OCR mask for SDIO when restoring power.
   - Fix prepared requests while doing BKOPS.
   - Convert to modern PM ops.
   - Add mmc_send_tuning() API and convert some hosts to use it.

  MMC host:
   - toshsd: New Toshiba PCI SD controller driver.
   - sdhci: 64-bit ADMA support.
   - sdhci: Some regulator fixes.
   - sdhci: HS400 support.
   - sdhci: Various fixes cleanups.
   - atmel-mci: Modernization and cleanups.
   - atmel-mci: Runtime PM support.
   - omap_hsmmc: Modernization and cleanups.
   - omap_hsmmc: Fix UHS card with DDR50 support.
   - dw_mmc: Support for ARM64 and Exynos 7 variant.
   - dw_mmc: Add support for IMG Pistachio variant.
   - dw_mmc: Various fixes and cleanups.
   - mvsdio: DMA fixes.
   - mxs-mmc: Modernization and cleanups.
   - mxcmmc: Various fixes"

* tag 'mmc-v3.19-1' of git://git.linaro.org/people/ulf.hansson/mmc: (126 commits)
  mmc: sdhci-msm: Convert to mmc_send_tuning()
  mmc: sdhci-esdhc-imx: Convert to mmc_send_tuning()
  mmc: core: Let mmc_send_tuning() to take struct mmc_host* as parameter
  mmc: queue: Improve error handling during allocation of bounce buffers
  mmc: sdhci-acpi: Add two host capabilities for Intel
  mmc: sdhci-pci: Add two host capabilities for BYT
  mmc: sdhci-acpi: Add SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
  mmc: sdhci-pci: Add SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC to BYT
  mmc: atmel-mci: use probe deferring if dma controller is not ready yet
  mmc: atmel-mci: stop using specific initcall
  mmc: atmel-mci: remove __init/__exit attributes
  mmc: atmel-mci: remove useless DMA stuff for non-dt devices
  mmc: omap_hsmmc: Fix UHS card with DDR50 support
  mmc: core: add core-level function for sending tuning commands
  mmc: core: hold SD Clock before CMD11 during Signal
  mmc: mxs-mmc: Check for clk_prepare_enable() error
  mmc: mxs-mmc: Propagate the real error
  mmc: mxs-mmc: No need to do NULL check on 'iores'
  mmc: dw_mmc: Add support for IMG Pistachio
  mmc: mxs-mmc: Simplify PM hooks
  ...

3 files changed, 40 insertions, 0 deletions

diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
index 6cd3525d0e0..ee4fc0576c7 100644
--- a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
@@ -18,6 +18,10 @@ Required Properties:
 	  specific extensions.
 	- "samsung,exynos5420-dw-mshc": for controllers with Samsung Exynos5420
 	  specific extensions.
+	- "samsung,exynos7-dw-mshc": for controllers with Samsung Exynos7
+	  specific extensions.
+	- "samsung,exynos7-dw-mshc-smu": for controllers with Samsung Exynos7
+	  specific extensions having an SMU.
 
 * samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface
   unit (ciu) clock. This property is applicable only for Exynos5 SoC's and
diff --git a/Documentation/devicetree/bindings/mmc/img-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/img-dw-mshc.txt
new file mode 100644
index 00000000000..85de99fcaa2
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/img-dw-mshc.txt
@@ -0,0 +1,29 @@
+* Imagination specific extensions to the Synopsys Designware Mobile Storage
+  Host Controller
+
+The Synopsys designware mobile storage host controller is used to interface
+a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
+differences between the core Synopsys dw mshc controller properties described
+by synopsys-dw-mshc.txt and the properties used by the Imagination specific
+extensions to the Synopsys Designware Mobile Storage Host Controller.
+
+Required Properties:
+
+* compatible: should be
+	- "img,pistachio-dw-mshc": for Pistachio SoCs
+
+Example:
+
+	mmc@18142000 {
+		compatible = "img,pistachio-dw-mshc";
+		reg = <0x18142000 0x400>;
+		interrupts = <GIC_SHARED 39 IRQ_TYPE_LEVEL_HIGH>;
+
+		clocks = <&system_clk>, <&sdhost_clk>;
+		clock-names = "biu", "ciu";
+
+		fifo-depth = <0x20>;
+		bus-width = <4>;
+		num-slots = <1>;
+		disable-wp;
+	};
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-pxa.txt b/Documentation/devicetree/bindings/mmc/sdhci-pxa.txt
index 86223c3eda9..4dd6deb9071 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-pxa.txt
+++ b/Documentation/devicetree/bindings/mmc/sdhci-pxa.txt
@@ -12,6 +12,10 @@ Required properties:
   * for "marvell,armada-380-sdhci", two register areas. The first one
     for the SDHCI registers themselves, and the second one for the
     AXI/Mbus bridge registers of the SDHCI unit.
+- clocks: Array of clocks required for SDHCI; requires at least one for
+    I/O clock.
+- clock-names: Array of names corresponding to clocks property; shall be
+    "io" for I/O clock and "core" for optional core clock.
 
 Optional properties:
 - mrvl,clk-delay-cycles: Specify a number of cycles to delay for tuning.
@@ -23,6 +27,8 @@ sdhci@d4280800 {
 	reg = <0xd4280800 0x800>;
 	bus-width = <8>;
 	interrupts = <27>;
+	clocks = <&chip CLKID_SDIO1XIN>, <&chip CLKID_SDIO1>;
+	clock-names = "io", "core";
 	non-removable;
 	mrvl,clk-delay-cycles = <31>;
 };
@@ -32,5 +38,6 @@ sdhci@d8000 {
 	reg = <0xd8000 0x1000>, <0xdc000 0x100>;
 	interrupts = <0 25 0x4>;
 	clocks = <&gateclk 17>;
+	clock-names = "io";
 	mrvl,clk-delay-cycles = <0x1F>;
 };