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authorDaniel Vetter <daniel.vetter@ffwll.ch>2012-06-01 10:49:16 +0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-06-01 10:52:54 +0200
commite269f90f3d3f7c70cf661c660bf445597261f54a (patch)
treef09685517e9efa7d675dad8fd13694157ce50521 /Documentation/parisc/debugging
parent112abd291db7d47974f166e742104d761bc76977 (diff)
parent63bc620b45af8c743ac291c8725933278c712692 (diff)
Merge remote-tracking branch 'airlied/drm-prime-vmap' into drm-intel-next-queued
We need the latest dma-buf code from Dave Airlie so that we can pimp the backing storage handling code in drm/i915 with Chris Wilson's unbound tracking and stolen mem backed gem object code. Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'Documentation/parisc/debugging')
-rw-r--r--Documentation/parisc/debugging2
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/parisc/debugging b/Documentation/parisc/debugging
index d728594058e..7d75223fa18 100644
--- a/Documentation/parisc/debugging
+++ b/Documentation/parisc/debugging
@@ -34,6 +34,6 @@ registers interruption handlers read to find out where the machine
was interrupted - so if you get an interruption between the instruction
that clears the Q bit and the RFI that sets it again you don't know
where exactly it happened. If you're lucky the IAOQ will point to the
-instrucion that cleared the Q bit, if you're not it points anywhere
+instruction that cleared the Q bit, if you're not it points anywhere
at all. Usually Q bit problems will show themselves in unexplainable
system hangs or running off the end of physical memory.